Engineering Papers⌕ Search

SEARCH · Engineering Papers

Results for “bloch”

Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

Quote a phrase for an exact phrase match. Source license links do not imply unrestricted reuse.

At least 19 records
All sourcesNASA NTRSDOE OSTI
NASA NTRS1995

Vertical bloch line memory

A new read gate design for the vertical Bloch line (VBL) memory is disclosed which offers larger operating margin than the existing read gate designs. In the existing read gate designs, a current is applied to all the stripes. The stripes that contain a VBL pair are chopped, while the stripes that do not contain a VBL pair are not chopped. The information is then detected by inspecting the presence or absence of the bubble. The margin of the chopping current amplitude is very small, and sometimes non-existent. A new method of reading Vertical Bloch Line memory is also disclosed. Instead of using the wall chirality to separate the two binary states, the spatial deflection of the stripe head is used. Also disclosed herein is a compact memory which uses vertical Bloch line (VBL) memory technology for providing data storage. A three-dimensional arrangement in the form of stacks of VBL memory layers is used to achieve high volumetric storage density. High data transfer rate is achieved by operating all the layers in parallel. Using Hall effect sensing, and optical sensing via the Faraday effect to access the data from within the three-dimensional packages, an even higher data transfer rate can be achieved due to parallel operation within each layer.

Katti, Romney R.↗
NASA NTRS1982

Calculation of the relativistic Bloch correction to stopping power

Bloch's technique of joining the nonrelativistic Bethe and Bohr stopping-power expressions by taking into account wave-packet effects for close collisions is extended to the relativistic case. It is found that Bloch's nonrelativistic correction term must be modified and that charge asymmetric terms appear. Excellent agreement is observed by comparing the results of these calculations to recent data on the stopping power of relativistic heavy ions.

Ahlen, S. P.↗
NASA NTRS1994

Half-State Readout In Vertical-Bloch-Line Memory

Potentially narrow margins of chirality-based chopping of magnetic stripes avoided. Half-state readout is experimental method of readout in Vertical-Bloch-Line (VBL) memory. Based on differential deflections of magnetic stripe domains in which data bits stored. To give meaning to explanation of half-state readout, see "Vertical-Bloch-Line Memory" (NPO-18467).

Katti, Romney R.↗
NASA NTRS1994

Three-Dimensional Vertical-Bloch-Line Memory System

In proposed magnetic memory system without moving parts, data is stored in stack of two-dimensional vertical-Bloch-line (VBL) memory chips or modules. System similar to one described in "Three-Dimensional Magnetic-Bubble Memory System" (NPO-18533). Each VBL module in this memory system silimar to module described in "Vertical-Bloch-Line Memory" (NPO-18467). Advantages include high storage density, high speed, nonvolatility, and insensitivity to ionizing radiation.

Katti, Romney R.↗
NASA NTRS1994

Bloch vector projection noise

In the optical measurement of the Bloch vector components describing a system of N two-level atoms, the quantum fluctuations in these components are coupled into the measuring optical field. This paper develops the quantum theory of optical measurement of Bloch vector projection noise. The preparation and probing of coherence in an effective two-level system consisting of the two ground states in an atomic three-level lambda-scheme are analyzed.

Wang, Li-Jun↗
NASA NTRS1998

Recent Developments in Vertical Bloch Line Data Storage

Data storage systems based on vertical Bloch lines have been fabricated in 2 um bubble garnet material. The input/output line was fully operational, and experiments in reading and writing showed an encouraging correlation between input and output.

data↗
NASA NTRS1991

Integrated Vertical Bloch Line (VBL) memory

Vertical Bloch Line (VBL) Memory is a recently conceived, integrated, solid state, block access, VLSI memory which offers the potential of 1 Gbit/sq cm areal storage density, data rates of hundreds of megabits/sec, and submillisecond average access time simultaneously at relatively low mass, volume, and power values when compared to alternative technologies. VBLs are micromagnetic structures within magnetic domain walls which can be manipulated using magnetic fields from integrated conductors. The presence or absence of BVL pairs are used to store binary information. At present, efforts are being directed at developing a single chip memory using 25 Mbit/sq cm technology in magnetic garnet material which integrates, at a single operating point, the writing, storage, reading, and amplification functions needed in a memory. The current design architecture, functional elements, and supercomputer simulation results are described which are used to assist the design process.

Katti, R. R.↗
NASA NTRS1991

Stripe stabilization in vertical Bloch line memory

Long, partial rectangular grooves have been made to reside below the stripe-confinement groove on a garnet surface, in order to stabilize minor loop stripes in a vertical Bloch-line memory. The test chip contained, in addition to either 10 or 20 minor-loop grooves, 10 read/write gate grooves and a major line groove; both 10 and 20 micron groove periods were tested. As the bias field was gradually decreased, bubbles began to stripe out. These stripes were stable at bias fields in the 70-80 Oe range. When stripes escaped from the groove, the even occurred from the end which does not face a read/write gate groove.

Wu, J. C.↗
NASA NTRS1991

Major line operation in vertical Bloch line memory

An experimental and numerical study is conducted of the operation of a major line in a vertical Bloch-line memory that employs a partial garnet-grooving architecture and contains (1) a bubble generator; (2) a bubble-propagation track; (3) a bubble-expander for detection; and (4) a bubble annihilator. The bubble expander is a modification of the propagation track; the meandering conductor and groove width were gradually increased to stretch the bubble into a stripe. The numerical model employed encompasses the garnet-grooving effect. Agreement is obtained between exparimental and simulation results.

Wu, J. C.↗
NASA NTRS1993

Vertical-Bloch-Line Memory

Vertical-Bloch-line memory is developmental very-large-scale integrated-circuit block-access magnetic memory. Stores data in form of localized pairs of twists (VBL pairs) in magnetic field at edge of ferromagnetic domain in each stripe. Presence or absence of VBL pair at bit position denotes one or zero, respectively. Offers advantages of resistance to ionizing radiation, potential areal storage density approximately less than 1 Gb/cm squared, data rates approximately less than 1 Gb/s, and average access times of order of milliseconds. Furthermore, mass, volume, and demand for power less than other magnetic and electronic memories.

Katti, Romney R.↗
NASA NTRS1994

Improved Reading Gate For Vertical-Bloch-Line Memory

Improved design for reading gate of vertical-Bloch-line magnetic-bubble memory increases reliability of discrimination between binary ones and zeros. Magnetic bubbles that signify binary "1" and "0" produced by applying sufficiently large chopping currents to memory stripes. Bubbles then propagated differentially in bubble sorter. Method of discriminating between ones and zeros more reliable.

Wu, Jiin-Chuan↗
NASA NTRS1990

Vertical bloch line memory

Vertical Bloch Line (VBL) memory is a recently conceived, integrated, solid-state, block-access, VLSI memory which offers the potential of 1Gbit/sq cm real storage density, gigabit per second data rates, and sub-millisecond average access times simultaneously at relatively low mass, volume, and power values when compared to alternative technologies. VBL's are micromagnetic structures within magnetic domain walls which can be manipulated using magnetic fields from integrated conductors. The presence or absence of VBL pairs are used to store binary information. At present, efforts are being directed at developing a single-chip memory using 25Mbit/sq cm technology in magnetic garnet material which integrates, at a single operating point, the writing, storage, reading, and amplification functions needed in a memory. This paper describes the current design architecture, functional elements, and supercomputer simulation results which are used to assist the design process. The current design architecture uses three metal layers, two ion implantation steps for modulating the thickness of the magnetic layer, one ion implantation step for assisting propagation in the major line track, one NiFe soft magnetic layer, one CoPt hard magnetic layer, and one reflective Cr layer for facilitating magneto-optic observation of magnetic structure. Data are stored in a series of elongated magnetic domains, called stripes, which serve as storage sites for arrays of VBL pairs. The ends of these stripes are placed near conductors which serve as VBL read/write gates. A major line track is present to provide a source and propagation path for magnetic bubbles. Writing and reading, respectively, are achieved by converting magnetic bubbles to VBL's and vice versa. The output function is effected by stretching a magnetic bubble and detecting it magnetoresistively. Experimental results from the past design cycle created four design goals for the current design cycle. First, the bias field ranges for the stripes and the major line needed to be matched. Second, the magnetic field barrier between the stripe and the read/write gates needed to be reduced. Third, current conductor routing needed to be improved to reduce occurrences of open-circuiting, short-circuiting, and eddy-current shielding. Fourth, a modified Co-alloy was needed with an increased coercivity and controlled magnetization to allow VBL stabilization to occur without affecting stripe stability.

Katti, R.↗
NASA NTRS1994

Vertical Bloch Line Storage Technology

Vertical Bloch Line storage is an emerging technology which has the potential for offering a number of desired data storage attributes in a single chip.

Vertical Block Line solid-state memory storage den↗
NASA NTRS1997

Maxwell-Bloch Equations Modeling of Ultrashort Optical Pulse Propagation in Semiconductor Materials

An algorithm has been developed that solves the semiconductor Maxwell-Bloch equations, without making the standard slowly-varying envelope (SVEA) and rotating-wave (RWA) approximations. It is applied to study the propagation of ultrashort pulses in semiconductor materials. The results include many-body effects due to the Coulomb interaction among the charge carriers as well as the nonlinear effects resulting from spectral hole-burning.

Goorjian, Peter M.↗