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At least 1,711 records · Page 95

Relationships among classes of self-oscillating transistor parallel inverters

It recently has been shown in the literature that many dc-to-square-wave parallel inverters which are widely used in power-conditioning applications can be grouped into one of two families. Each family is characterized by an equivalent RLC network. Based on this approach, a classification procedure is presented for self-oscillating parallel inverters which makes evident natural relationships which exist between various inverter configurations. By utilizing concepts from the basic theory of negative resistance oscillators and the principle of duality as applied to nonlinear networks, a chain of relationships is established which enables a methodical transfer of knowledge gained about one family of inverters to any of the other families in the classification array.

Wilson, T. G.↗

JAN transistor and diode characterization test program, JANTX diode 1N649-1

The data processing and calculation of statistical parameters was performed by the Tektronix computer system. The data acquired for easy vendor to vendor and date code to date code analysis are summarized. Each parameter is presented with test conditions, mean, standard deviation, lowest reading, 10% point (where 10% of all readings are equal to or less than the indicated reading), 90% point (where 90% of all readings are equal to or less than the indicated reading) and the highest reading.

Takeda, H.↗

JAN transistor and diode characterization test program: JANTX diode 1N759A

The necessary data to create a new class of specifications was the objective of this characterization program. Sample selection was made according to the following criteria: (1) manufacturer or qualified distributor; (2) two vendors; and (3) two date codes. The general guidelines for procurement were two QPL vendors, JAN or JANTX, and two manufacturing lots, 27 from each lot. All data were acquired with three digit accuracy. The data processing and calculation of statistical parameters were performed by the Tektronix computer system using 4 digit display.

Takeda, H.↗

Heavily doped transparent-emitter regions in junction solar cells, diodes, and transistors

The paper presents an analytical treatment of transparent-emitter devices, particularly solar cells, that is more complete than previously available treatments. The proposed approach includes the effects of bandgap narrowing, Fermi-Dirac statistics, built-in field due to impurity profile, and a finite surface recombination velocity at the emitter surface. It is demonstrated that the transparent-emitter model can predict experimental values of Voc observed on n(plus)-p thin diffused junction silicon solar cells made on low-resistivity (0.1 ohm-cm) substrates. A test is included for the self-consistent validity of the transparent-emitter model. This test compares the calculated transit time of minority carriers across the emitter with the Auger-impact minority-carrier lifetime within the emitter region.

Shibib, M. A.↗

JANTX2N2060 dual transistor

Report describes effects of power and temperature overstress on Motorola and Raytheon devices. Motorola devices were weak in power overstress. Raytheon devices succumbed to 160 hour temperature stress. Failure modes are detailed.

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JANTX2N2219A dual transistor

Report describes effects of power and temperature overstress on Texas Instruments and National Semiconductor devices. Texas Instruments devices had only two failures in 2500 hours of testing. National Semiconductor devices reached 50% failure limit. No consistent failure mode was detected.

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JANTX2N2432A transistor

Report evaluates effects of power and temperature overstress on Crystalonics and Texas Instruments devices. Crystalonics devices survived better, as Texas Instruments lot exceeded 50 percent failure at 225 deg C. Failure modes are evaluated.

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JANTX2N2484 transistor

Report evaluates effects of power and temperature overstress on Raytheon and Teledyne devices. Power overstress produced few failures. Both lots of devices exceeded 50 percent failure at 250 deg C. Failure modes are evaluated.

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JANTX2N2605 transistor

Report evaluates effects of power and temperature overstress on Raytheon and National Semiconductor devices. Breakdown voltage hysteresis, possibly due to contamination of semiconductor by gold from leads, was prominent.

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JANTX2N2905A transistor

Report evaluates effects of power and temperature overstress on Motorola and Texas Instruments devices. A variety of failure modes are described.

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