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At least 1,279 records · Page 71

Relationships among classes of self-oscillating transistor parallel inverters

A procedure is developed for classifying dc-to-square-wave two-transistor parallel inverters used in power conditioning applications. The inverters are reduced to equivalent RLC networks and are then grouped with other inverters with the same basic equivalent circuit. Distinction between inverter classes is based on the topology characteristics of the equivalent circuits. Information about one class can then be extended to another class using the basic oscillation theory and the concept of duality. Oscillograms from test circuits confirm the validity of the procedure adopted.

Wilson, T. G.↗

Power transistor performance tradeoffs

Recent advances in the understanding of bipolar device physics permit the derivation of a number of quantitative relationships which are useful for improving existing designs and also for assessing the feasibility of proposed devices. This paper describes three important tradeoffs which apply to the design and performance of high-voltage transistors in inverter circuits.

Hower, P. L.↗

Transistor-to-substrate bond quality

Quantitative measurement of X-ray images of bonded power-transistor chips is accomplished by using light meter, which determines percentage of voids in bond.

Telfer, T. A.↗

A Field-Effect Transistor (FET) model for ASAP

The derivation of the circuitry of a field effect transistor (FET) model, the procedure for adapting the model to automated statistical analysis program (ASAP), and the results of applying ASAP on this model are described.

Ming, L.↗

Semicustom integrated circuits and the standard transistor array radix (STAR)

The development, application, pros and cons of the semicustom and custom approach to the integration of circuits are described. Improvements in terms of cost, reliability, secrecy, power, and size reduction are examined. Also presented is the standard transistor array radix, a semicustom approach to digital integrated circuits that offers the advantages of both custom and semicustom approaches to integration.

Edge, T. M.↗

The charge-flow transistor - A new MOS device

A new device, the charge-flow transistor (CFT), has been developed to achieve integrated MOS compatibility in sensor applications, such as gas, humidity, and fire detection, where one is interested in monitoring the transverse resistance of a thin film. The resistive material is incorporated into the gate structure of the CFT in such a way that there is a time delay between the application of the gate-to-source voltage and the appearance of a complete channel. This time delay depends on the resistivity of the thin film. A theory of device operation is presented, together with experimental results on the first CFT's. These results confirm the principles of operation, and demonstrate the utility of the CFT for making fully integrated sensing devices.

Senturia, S. D.↗

JAN transistor and diode characterization test program

A statistical summary of electrical characterization was performed on JAN diodes and transistors. Parameters are presented with test conditions, mean, standard deviation, lowest reading, 10% point, 90% point and highest reading.

Takeda, H.↗

JAN transistor and diode characterization test program, JANTX diode 1N5623

A statistical summary of the electrical characterization of diodes and transistors is presented. Each parameter is presented with test conditions, mean, standard deviation, lowest reading, 10% point (where 10% of all readings are equal to or less than the indicated reading), 90% point (where 90% of all readings are equal to or less than indicated reading) and the highest reading.

Takeda, H.↗

Field effect transistor and method of construction thereof

A field effect transistor is constructed by placing a semi-conductor layer on an insulating substrate so that the gate region is separated from source and drain regions. The gate electrode and gate region of the layer are of generally reduced length, the gate region being of greatest length on its surface closest to the gate electrode. This is accomplished by initially creating a relatively large gate region of one polarity, and then reversing the polarity of a central portion of this gate region by ion bombardment, thus achieving a narrower final gate region of the stated configuration.

Fletner, W. R.↗

Transistor step stress testing program for JANTX2N2905A

The effect of power/temperature step stress when applied to the transistor JANTX2N2905A manufactured by Texas Instruments and Motorola is reported. A total of 48 samples from each manufacturer was submitted to the process outlined. In addition, two control sample units were maintained for verification of the electrical parametric testing. All test samples were subjected to the electrical tests outlined in Table 2 after completing the prior power/temperature step stress point.

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Transistor step stress testing program for JANTX2N4856

The effect of power/temperature step stress when applied to a field effect transistor JANTX2N4856 manufactured by Texas Instruments and Teledyne was evaluated. A total of 48 samples from each manufacturer was submitted to the process. In addition, two control units were maintained for verification of the electrical parametric testing.

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Transistor step stress testing program for JANTX2N3637

Data for the purpose of evaluating the effect of power/temperature step stress when applied to a variety of semiconductor devices are presented. The transistor JANTX2N3637 manufactured by Transitron and Motorola is studied. A total of 48 samples from Transitron and 41 samples from Motorola were submitted to the process. In addition, two control sample units were maintained for verification of the electrical parametric testing. Results are reported.

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Transistor step stress program for JANTX2N2920

Data on the effect of power/temperature step stress when applied to the dual transistor JANTX2N2920 manufactured by Fairchild and National Semiconductor are presented. Fifty one (51) samples from Fairchild and 44 from National Semiconductor were submitted to the process outlined. In addition, two control sample units were maintained for verification of the electrical parametric testing.

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Transistor step stress program for JANTX2N4150

Reliability analysis of the transistor JANTX2N4150 manufactured by General Semiconductor and Transitron is reported. The discrete devices were subjected to power and temperature step stress tests and then to electrical tests after completing the power/temperature step stress point. Control sample units were maintained for verification of the electrical parametric testing. Results are presented.

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Transistor step stress program for JANTX2N2432A

Power/temperature step stress was applied to the transistor JANTX2N2432A manufactured by Crystalonics and Texas Instruments. A total of 48 samples from each manufacturer were submitted to the process outlined. In addition, two control sample units were maintained for verification of the electrical parametric testing. All test samples were subjected to the electrical tests after completing the prior power/temperature step stress point.

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Transistor step stress program for JANTX2N2605

The effect was studied of power/temperature step stress when applied to the PNP transistor JANTX2N2605 manufactured by Raytheon and National Semiconductor. Test results and failure analyses are included.

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Transistor step stress program for JANTX2N2060

The effect of power/temperature step stress when applied to the dual transistor JANTX2N2060 manufactured by Raytheon and Motorola is reported. A total of 48 samples from each manufacturer were submitted to the process. In addition, two control sample units were maintained for verification of the electrical parametric testing. All test samples were subjected to the electrical tests after completing the prior power/temperature step stress point. Results are given.

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Transistor step stress program for JANTX2N2219A

Power/temperature step stress was applied to the dual transistor JANTX2N2219A manufactured by Texas Instruments and National Semiconductor. A total of 48 samples from each manufacturer were submitted to the process outlined. In addition, two control sample units were maintained for verification of the electrical parametric testing. All test samples were subjected to electrical tests after completing the prior power/temperature step stress point.

Source record↗