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At least 811 records · Page 45

An 8-PSK TDMA uplink modulation and coding system

The combination of 8-phase shift keying (8PSK) modulation and greater than 2 bits/sec/Hz drove the design of the Nyquist filter to one specified to have a rolloff factor of 0.2. This filter when built and tested was found to produce too much intersymbol interference and was abandoned for a design with a rolloff factor of 0.4. The preamble is limited to 100 bit periods of the uncoded bit period of 5 ns for a maximum preamble length of 500 ns or 40 8PSK symbol times at 12.5 ns per symbol. For 8PSK modulation, the required maximum degradation of 1 dB in -20 dB cochannel interference (CCI) drove the requirement for forward error correction coding. In this contract, the funding was not sufficient to develop the proposed codec so the codec was limited to a paper design during the preliminary design phase. The mechanization of the demodulator is digital, starting from the output of the analog to digital converters which quantize the outputs of the quadrature phase detectors. This approach is amenable to an application specific integrated circuit (ASIC) replacement in the next phase of development.

Ames, S. A.↗

Postirradiation Effects In Integrated Circuits

Two reports discuss postirradiation effects in integrated circuits. Presents examples of postirradiation measurements of performances of integrated circuits of five different types: dual complementary metal oxide/semiconductor (CMOS) flip-flop; CMOS analog multiplier; two CMOS multiplying digital-to-analog converters; electrically erasable programmable read-only memory; and semiconductor/oxide/semiconductor octal buffer driver.

Shaw, David C.↗

Compensated digital readout family

ISC has completed test on an IC which has 32 channels of amplifiers, low pass anti-aliasing filters, 13-bit analog-to-digital (A/D) converters with non-uniformity correction per channel and a digital multiplexer. The single slope class of A/D conversion is described, as are the unique variations required for incorporation of this technique for use with on-focal plane detector readout electronics. This paper describes the architecture used to implement the digital on-focal plane signal processing functions. Results from measured data on a test IC are presented for a circuit containing these functions operating at a sensor frame rate of 1000 hertz.

Ludwig, David E.↗

Nonvolatile random access memory

A nonvolatile magnetic random access memory can be achieved by an array of magnet-Hall effect (M-H) elements. The storage function is realized with a rectangular thin-film ferromagnetic material having an in-plane, uniaxial anisotropy and inplane bipolar remanent magnetization states. The thin-film magnetic element is magnetized by a local applied field, whose direction is used to form either a 0 or 1 state. The element remains in the 0 or 1 state until a switching field is applied to change its state. The stored information is detcted by a Hall-effect sensor which senses the fringing field from the magnetic storage element. The circuit design for addressing each cell includes transistor switches for providing a current of selected polarity to store a binary digit through a separate conductor overlying the magnetic element of the cell. To read out a stored binary digit, transistor switches are employed to provide a current through a row of Hall-effect sensors connected in series and enabling a differential voltage amplifier connected to all Hall-effect sensors of a column in series. To avoid read-out voltage errors due to shunt currents through resistive loads of the Hall-effect sensors of other cells in the same column, at least one transistor switch is provided between every pair of adjacent cells in every row which are not turned on except in the row of the selected cell.

Wu, Jiin-Chuan↗

Electrical Capacitance Volume Tomography with High-Contrast Dielectrics

The Electrical Capacitance Volume Tomography (ECVT) system has been designed to complement the tools created to sense the presence of water in nonconductive spacecraft materials, by helping to not only find the approximate location of moisture but also its quantity and depth. The ECVT system has been created for use with a new image reconstruction algorithm capable of imaging high-contrast dielectric distributions. Rather than relying solely on mutual capacitance readings as is done in traditional electrical capacitance tomography applications, this method reconstructs high-resolution images using only the self-capacitance measurements. The image reconstruction method assumes that the material under inspection consists of a binary dielectric distribution, with either a high relative dielectric value representing the water or a low dielectric value for the background material. By constraining the unknown dielectric material to one of two values, the inverse math problem that must be solved to generate the image is no longer ill-determined. The image resolution becomes limited only by the accuracy and resolution of the measurement circuitry. Images were reconstructed using this method with both synthetic and real data acquired using an aluminum structure inserted at different positions within the sensing region. The cuboid geometry of the system has two parallel planes of 16 conductors arranged in a 4 4 pattern. The electrode geometry consists of parallel planes of copper conductors, connected through custom-built switch electronics, to a commercially available capacitance to digital converter. The figure shows two 4 4 arrays of electrodes milled from square sections of copper-clad circuit-board material and mounted on two pieces of glass-filled plastic backing, which were cut to approximately square shapes, 10 cm on a side. Each electrode is placed on 2.0-cm centers. The parallel arrays were mounted with the electrode arrays approximately 3 cm apart. The open ends were surrounded by a metal guard to reduce the sensitivity of the electrodes to outside interference and to help maintain the spacing between the arrays. Other uses for this innovation potentially include quantifying the amount of commodity remaining in the fuel and oxidizer tanks while on-orbit without having to fire spacecraft engines. Another orbit application is moisture sensing in plant-growth experiments because microgravity causes moisture in soil to distribute itself in unusual ways. At the moment, the hardware and image reconstruction technique may only be of interest to people involved in nondestructive evaluation. The reconstructed image takes almost a full week to reproduce with existing computer power. However, because computer power and speeds follows Moore s Law, execution times are likely to become acceptable within the next five to eight years. The code was written in Mathematica for dedicated use with the ECVT system. In its present form, it is not suitable to be used directly as a consumer product. However, the code could be likely improved by rewriting it in a compiled language such as C or Fortran.

Nurge, Mark↗

Remote Memory Access Protocol Target Node Intellectual Property

The MagnetoSpheric Multiscale (MMS) mission had a requirement to use the Remote Memory Access Protocol (RMAP) over its SpaceWire network. At the time, no known intellectual property (IP) cores were available for purchase. Additionally, MMS preferred to implement the RMAP functionality with control over the low-level details of the design. For example, not all the RMAP standard functionality was needed, and it was desired to implement only the portions of the RMAP protocol that were needed. RMAP functionality had been previously implemented in commercial off-the-shelf (COTS) products, but the IP core was not available for purchase. The RMAP Target IP core is a VHDL (VHSIC Hardware Description Language description of a digital logic design suitable for implementation in an FPGA (field-programmable gate array) or ASIC (application-specific integrated circuit) that parses SpaceWire packets that conform to the RMAP standard. The RMAP packet protocol allows a network host to access and control a target device using address mapping. This capability allows SpaceWire devices to be managed in a standardized way that simplifies the hardware design of the device, as well as the development of the software that controls the device. The RMAP Target IP core has some features that are unique and not specified in the RMAP standard. One such feature is the ability to automatically abort transactions if the back-end logic does not respond to read/write requests within a predefined time. When a request times out, the RMAP Target IP core automatically retracts the request and returns a command response with an appropriate status in the response packet s header. Another such feature is the ability to control the SpaceWire node or router using RMAP transactions in the extended address range. This allows the SpaceWire network host to manage the SpaceWire network elements using RMAP packets, which reduces the number of protocols that the network host needs to support.

Haddad, Omar↗

Electro-optic architecture (EOA) for sensors and actuators in aircraft propulsion systems

Results of a study to design an optimal architecture for electro-optical sensing and control in advanced aircraft and space systems are described. The propulsion full authority digital Electronic Engine Control (EEC) was the focus for the study. The recommended architecture is an on-engine EEC which contains electro-optic interface circuits for fiber-optic sensors on the engine. Size and weight are reduced by multiplexing arrays of functionally similar sensors on a pair of optical fibers to common electro-optical interfaces. The architecture contains common, multiplex interfaces to seven sensor groups: (1) self luminous sensors; (2) high temperatures; (3) low temperatures; (4) speeds and flows; (5) vibration; (6) pressures; and (7) mechanical positions. Nine distinct fiber-optic sensor types were found to provide these sensing functions: (1) continuous wave (CW) intensity modulators; (2) time division multiplexing (TDM) digital optic codeplates; (3) time division multiplexing (TDM) analog self-referenced sensors; (4) wavelength division multiplexing (WDM) digital optic code plates; (5) wavelength division multiplexing (WDM) analog self-referenced intensity modulators; (6) analog optical spectral shifters; (7) self-luminous bodies; (8) coherent optical interferometers; and (9) remote electrical sensors. The report includes the results of a trade study including engine sensor requirements, environment, the basic sensor types, and relevant evaluation criteria. These figures of merit for the candidate interface types were calculated from the data supplied by leading manufacturers of fiber-optic sensors.

Glomb, W. L., Jr.↗

Two dimensional digital computer

The development of a two dimensional data processing system is reported that extracts data from optical images by performing multiple logical operations simultaneously. A two dimensional logical circuits is described that contains a liquid crystal negation element and an OR-ing element. The negation element performs 20,000 negations simultaneously, and the OR does 20,000 OR operations simultaneously.

Schaefer, D. H.↗

Graph Theory and IC Component Design Analysis

Graph analysis in large integrated circuit (IC) designs is an essential tool for verifying design logic and timing via dynamic timing analysis (DTA). IC designs resemble graphs with each logic gate as a vertex and the conductive connections between gates as edges. Using DTA digital statistical correlations, graph condensation, and graph partitioning, it is possible to identify high-entropy component centers and paths within an IC design. Identification of high-entropy component centers (HECC) enables focused DTA, effectively lowering the computational complexity of DTA on large integrated circuit graphs. In this paper, a devised methodology termed IC layout subgraph component center identification (CCI) is used to identify described. CCI lowers DTA computationally complexity by condensing IC graphs into reduced subgraphs in which dominant logic functions are verified.

42 ENGINEERING↗

180-GHz Interferometric Imager

A 180-GHz interferometric imager uses compact receiver modules, combined high- and low-gain antennas, and ASIC (application specific integrated circuit) correlator technology, enabling continuous, all-weather observations of water vapor with 25-km resolution and 0.3-K noise in 15 minutes of observation for numerical weather forecasting and tropical storm prediction. The GeoSTAR-II prototype instrument is broken down into four major subsystems: the compact, low-noise receivers; sub-array modules; IF signal distribution; and the digitizer/correlator. Instead of the single row of antennas adopted in GeoSTAR, this version has four rows of antennas on a coarser grid. This dramatically improves the sensitivity in the desired field of view. The GeoSTAR-II instrument is a 48-element, synthetic, thinned aperture radiometer operating at 165-183 GHz. The instrument has compact receivers integrated into tiles of 16 elements in a 4x4 arrangement. These tiles become the building block of larger arrays. The tiles contain signal distribution for bias controls, IF signal, and local oscillator signals. The IF signals are digitized and correlated using an ASIC correlator to minimize power consumption. Previous synthetic aperture imagers have used comparatively large multichip modules, whereas this approach uses chip-scale modules mounted on circuit boards, which are in turn mounted on the distribution manifolds. This minimizes the number of connectors and reduces system mass. The use of ASIC technology in the digitizers and correlators leads to a power reduction close to an order of magnitude.

Kangaslahti, Pekka P.↗

State-of-the-art oriented review of CIRCUS

Mathematical procedures for CIRCUS, digital computer program which is based on built-in model library and is capable of time domain analysis of certain circuits

Eskin, H. D.↗

Analog actuator-piston memory

Simple analog control system of digitally controlled acuator uses 'stopped' position of actuator as 'memory' and potentiometer as sensing element during power failure to reload drive circuit to value equal to its last position preceding power loss.

Sable, B. A.↗

Development of Boolean calculus and its applications

The development of Boolean calculus for its application to developing digital system design methodologies that would reduce system complexity, size, cost, speed, power requirements, etc., is discussed. Synthesis procedures for logic circuits are examined particularly asynchronous circuits using clock triggered flip flops.

Tapia, M. A.↗

Processing circuitry for single channel radiation detector

Processing circuitry is provided for a high voltage operated radiation detector. An event detector utilizes a comparator configured to produce an event signal based on a leading edge threshold value. A preferred event detector does not produce another event signal until a trailing edge threshold value is satisfied. The event signal can be utilized for counting the number of particle hits and also for controlling data collection operation for a peak detect circuit and timer. The leading edge threshold value is programmable such that it can be reprogrammed by a remote computer. A digital high voltage control is preferably operable to monitor and adjust high voltage for the detector.

Holland, Samuel D.↗

A Radiation Hardened by Design CMOS ASIC for Thermopile Readouts

A radiation hardened by design (RHBD) mixed-signal application specific integrated circuit (ASIC) has been designed for a thermopile readout for operation in the harsh Jovian orbital environment. The multi-channel digitizer (MCD) ASIC includes 18 low noise amplifier channels which have tunable gain/filtering coefficients, a 16-bit sigma-delta analog-digital converter (SDADC) and an on-chip controller. The 18 channels, SDADC and controller were designed to operate with immunity to single event latchup (SEL) and to at least 10 Mrad total ionizing dose (TID). The ASIC also contains a radiation tolerant 16-bit 20 MHz Nyquist ADC for general purpose instrumentation digitizer needs. The ASIC is currently undergoing fabrication in a commercial 180 nm CMOS process. Although this ASIC was designed specifically for the harsh radiation environment of the NASA led JEO mission it is suitable for integration into instrumentation payloads 011 the ESA JUICE mission where the radiation hardness requirements are slightly less stringent.

Quilligan, G.↗

A systolic architecture for the correlation and accumulation of digital sequences

A fully systolic architecture for the implementation of digital sequence correlator/accumulators is described. These devices consist of a two-dimensional array of processing elements that are conceived for efficient fabrication in Very Large Scale Integrated (VLSI) circuits. A custom VLSI chip that was implemented using these concepts is described. The chip, which contains a four-lag three-level sequence correlator and four bits of accumulation with overflow detection, was designed using the Integrated UNIX-Based Computer Aided Design (CAD) System. Applications of such devices include the synchronization of coded telemetry data, alignment of both real time and non-real time Very Large Baseline Interferometry (VLBI) signals, and the implementation of digital filters and processes of many types.

Deutsch, L. J.↗

A Single-Chip Programmable Digital CMOS Imager with Enhanced Low Light Detection Capability

Low-power, low-cost, miniature and integrated digital imaging systems are expected to be widely used in consumer electronics in the near future. While CMOS technology has been responsible for the phenomenal growth in consumer electronics, micro-porcessors, memory, audio systems, and radio-frequency circuits (e.g. cellular phones), till recently, the video technology remained outside this mainstream.

digital↗