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At least 55 records · Page 3

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NASA NTRS2019

Mechanisms of Heavy Ion-Induced Single Event Burnout in 4H-SiC Power MOSFETs

This describes the mechanisms behind the failure of 4H-SiC Power MOSFETs when struck by a heavy ion. The modeled device is designed to simulate a commercially available 1200 V power MOSFET and the ion simulated is a silver ion with a Linear Energy Transfer of 46 MeV-cm2/mg commonly used in single event effect (SEE) testing. The device is shown in simulation to fail near 500 V, which is in close agreement to experiments. These simulations go to show that the failure of SiC MOSFET occurs near the interface between the epi and substrate layers due to the rapid increase of the electric field in that region and destruction of the device from impact ionization. From this, two designs were proposed and investigated that would help to mitigate the electric field in these regions and improve the device's tolerance to single-event burnout (SEB). The new designs increased the voltage at which SEB occurs from 500 V to over 900 V and increased the Ron,sp by only 5%.

Mcpherson, Joseph A.↗

DOE OSTI2023

Achieving Single-Electron Sensitivity at Enhanced Speed in Fully-Depleted CCDs with Double-Gate MOSFETs

We introduce a new output amplifier for fully-depleted thick p-channel CCDs based on double-gate MOSFETs. The charge amplifier is an n-type MOSFET specifically designed and operated to couple the fully-depleted CCD with high charge-transfer efficiency. The junction coupling between the CCD and MOSFET channels has enabled high sensitivity, demonstrating sub-electron readout noise in one pixel charge measurement. We have also demonstrated the non-destructive readout capability of the device. Achieving single-electron and single-photon per pixel counting in the entire CCD pixel array has been made possible through the averaging of a small number of samples. We have demonstrated fully-depleted CCD readout with better performance than the floating diffusion and floating gate amplifiers available today, in both single and multisampling regimes, boasting at least six times the speed of floating gate amplifiers.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗

DOE OSTI2025

Radiation Response of Ga 2 O 3 MOSFETs Probed via Focused Particle Beams

Gallium Oxide (Ga 2 O 3 ), particularly in its β-phase, is attracting lots of interest for high-power and high-voltage electronics due to its wide bandgap, high breakdown field, and thermal stability. This study investigates the radiation response of Ga 2 O 3 Metal-Oxide-Semiconductor Field-Effect Transistors (MOSFETs) under Total Ionizing Dose (TID) and Displacement Damage (DD) conditions, which are critical for applications in radiation environments. Utilizing a dual-beam Focused Ion Beam and Scanning Electron Microscope setup, microscale analysis of radiation effects on individual devices is performed. The findings reveal distinct behaviors under TID and DD + TID conditions, with TID leading to threshold voltage shifts due to trapped charges, while DD results in decreased drive current attributed to increased carrier scattering from lattice defects. Notably, it is demonstrated that the TID effect can be mitigated through dynamic threshold voltage adjustments and that the predicted TID from ions calculated by Monte Carlo simulations overestimates actual TID due to unaccounted charge yield effects. In conclusion, this research enhances the understanding of Ga2O3 MOSFETs' performance in harsh radiation environments, providing insights for the design of robust electronic devices for space and nuclear applications.

MOSFET↗

DOE OSTI2021

A Study of Integrated Signal and Power Transfer for Compact Isolated SiC MOSFET Gate-Drivers

This work discusses a novel set of alternate implementations of isolated gate driver circuits for power electronic transistors. The proposed topologies for the driver have been designed specifically for SiC power MOSFET. Three different solutions are discussed, all of them providing the required gate turn-on and turn-off command signal with galvanic isolation, but also supplying power to the secondary side of the driver by means of magnetic transformers. The resulting solutions, all of them implemented with simple circuitry, enable the integration of the driver into the power cell, allowing for theoretical higher power density values in the final system. The principle of operation of the different solutions is discussed, and then the main relevant implementation details are presented. After that, the operation of the circuits is demonstrated experimentally, by testing a set of prototypes of these drivers. This provides a comprehensive design example that assesses the feasibility of the proposed solutions. Finally, the main results of the performance of the three gate drivers, on an SiC MOSFET-based prototype are presented and compared.

42 ENGINEERING↗

NASA NTRS2018

Reliability Concerns for Flying SiC Power MOSFETs in Space

SiC power MOSFETs are space-ready in terms of typical reliability measures. However, single event burnout (SEB) often occurs at voltages 50% or lower than specified breakdown. Data illustrating burnout for 1200 V devices is reviewed and the space reliability of SiC MOSFETs is discussed.

Single-event burnout↗

NASA NTRS2018

Reliability Concerns for Flying SiC Power MOSFETs in Space

silicon carbide↗

DOE OSTI2022

A trapping tolerant drain current based temperature measurement of β -Ga 2 O 3 MOSFETs

The drain current temperature dependence is an efficient way to determine the channel temperature in semiconductor devices; however, it has been challenging to use due to the potential interference of trapping effects. A trapping tolerant method is proposed, illustrated here for Ga 2 O 3 MOSFETs, making in situ temperature measurements possible, allowing a thermal resistance of 59 K∙mm/W to be measured in Ga 2 O 3 MOSFETs. However, neglecting the effect of trapping causes an error of ~15% in the channel temperature measured using the drain current. 3D simulations show that the measured channel temperature is the average temperature value between source and drain contact.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗

DOE OSTI2025

Off-state magnetoresistance in long-channel germanium Schottky-barrier MOSFETs

An increasing magnetic field perpendicular to an undoped semiconductor surface at low temperature is known to strengthen the binding of localized electrons to stationary ions, as the wavefunction's tails evolve from exponential to Gaussian. It is also known that application of a high bias voltage to a depleted semiconductor can liberate bound charge and induce a large drop in electrical resistance. We connect these established results to experimental electrical transport measurements on off-state germanium Schottky-barrier metal–oxide–semiconductor field-effect transistor (MOSFETs) with an aluminum oxide insulating dielectric and platinum germanide contacts. We make measurements at the three distinct orientations of the magnetic field with respect to the substrate and the current. At 6 K, we observe sharp attenuation of current by more than 2 orders of magnitude, within 60 mT, at a crossover magnetic field perpendicular to the substrate. A 1 T magnetic field attenuates the current by more than 4 orders of magnitude. The strength of the attenuation and the value of the crossover field are controlled by both the gate–source and drain–source voltages. The attenuation is much weaker when the magnetic field is parallel to the current. Finally, we orient the magnetic field parallel to the substrate, but perpendicular to the current, allowing us to distinguish charge hopping at the oxide interface from charge hopping in the bulk. In conclusion, this large off-state magnetoresistance can be exploited for cryogenic magnetic- and photo-detection, and for high-bias, low-leakage MOSFETs.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗

DOE OSTI2025

Temperature-Agnostic Pt/Au Ohmic Contacts on n -Type Gallium Nitride for Self-Aligned MOSFETs

Five alternative metals are investigated as ohmic contacts to n-GaN including Cr/Au, Mo/Au, Pt/Au, Pd/Au, and Ge/Au. Ti-based contacts are traditionally used for ohmic contacts on n-GaN. However, conventional Ti/Al/Ni/Au metallization is found to be incompatible with a self-aligned process for GaN trench MOSFETs due to wet etch restrictions. Therefore, an alternative metallization is needed that is unreactive to the etch chemistry used in the self-aligned process. Additionally, the contact should remain ohmic following anneal at 900 °C so that contact formation can precede the anneal required for p-dopant activation. Here, in the present work, an n-GaN bilayer, consisting of a thin heavily doped contact layer (n 0 = 1 × 10 20 cm −3 ) atop a thick lesser doped layer, is used to demonstrate ohmic contacts of alternative metals with low specific contact resistance and extended thermal budget. Cr/Au ohmic contacts are demonstrated up to anneal temperatures of 800 °C, an increase of 200 °C compared to the highest known reports for Cr/Au contacts on n-GaN. Pt/Au metallization is demonstrated as an ohmic contact to n-GaN for the first time and exhibits true temperature-agnostic behavior up to anneal temperatures of 900 °C with specific contact resistance that is near parity with Ti/Al/Ni/Au. The temperature-agnostic behavior of Pt/Au ohmic contacts on the n-GaN bilayer, in addition to chemical compatibility with the self-aligned process, positions Pt/Au contacts as a key enabling element for self-aligned trench MOSFETs on GaN.

Reilly, Kevin James [Sandia National Laboratories ↗

DOE OSTI2021

A Double-side Cooled SiC MOSFET Power Module with Sintered-silver Interposers: I. Design, Simulation, Fabrication, and Performance Characterization

Planar, double-side cooled power modules are emerging in electric-drive inverters because of their low profile, better heat extraction, and lower package parasitic inductances. However, there is still concern about their reliability due to the rigid interconnection between the device chips and two substrates of the power module. In this paper, a porous interposer made of low-temperature sintered silver is introduced to reduce the thermo-mechanical stresses in the module. A double-side cooled half-bridge module consisting of two 1200 V, 149 A SiC MOSFETs was designed, fabricated, and characterized. By using the sintered-Ag instead of solid copper interposers, our simulation results showed that at a total power loss of 200 W, the thermo-mechanical stress at the most vulnerable interfaces (interposer-attach layer) was reduced by 42 % and in the SiC MOSFET by 50 % with a trade-off of only 3.6 % increase in junction temperature. The sintered-Ag interposers were readily fabricated into desired dimensions without post-machining and did not require any surface finishing for die-bonding and substrate interconnection by silver sintering. Here, the porous interposers were also deformable under a low force or pressure, which helped to accommodate chip thickness and/or substrate-to-substrate gap variations in the planar module structure, thus simplifying module fabrication. Experimental results on the electrical performance of the fabricated SiC modules validated the success of using the porous silver interposers for fabricating planar, double-side cooled power modules.

42 ENGINEERING↗

DOE OSTI2023

Improved noise performance from the next-generation buried-channel p-MOSFET SiSeROs

The Single electron Sensitive Read Out (SiSeRO) is a novel on-chip charge detector output stage for charge-coupled device (CCD) image sensors. Developed at MIT Lincoln Laboratory, this technology uses a p-MOSFET transistor with a depleted internal gate beneath the transistor channel. The transistor source-drain current is modulated by the transfer of charge into the internal gate. At Stanford, we have developed a readout module based on the drain current of the on-chip transistor to characterize the device. In our earlier work, we characterized a number of first prototype SiSeROs with the MOSFET transistor channels at the surface layer. An equivalent noise charge (ENC) of around 15 electrons root mean square (RMS) was obtained. In this work, we examine the first buried-channel SiSeRO. Here we have achieved substantially improved noise performance of around 4.5 electrons root mean square (RMS) and a full width half maximum (FWHM) energy resolution of 132 eV at 5.9 keV, for a readout speed of 625 kpixel/s. We also discuss how digital filtering techniques can be used to further improve the SiSeRO noise performance. Additional measurements and device simulations will be essential to further mature the SiSeRO technology. This new device class presents an exciting new technology for the next-generation astronomical X-ray telescopes requiring fast, low-noise, radiation-hard megapixel imagers with moderate spectroscopic resolution.

79 ASTRONOMY AND ASTROPHYSICS↗

NASA NTRS1979

Switching transients in high-frequency high-power converters using power MOSFET's

The use of MOSFETs in a high-frequency high-power dc-to-dc converter is investigated. Consideration is given to the phenomena associated with the paralleling of MOSFETs and to the effect of stray circuit inductances on the converter circuit performance. Analytical relationships between various time constants during the turning-on and turning-off intervals are derived which provide estimates of plateau and peak levels during these intervals.

Sloane, T. H.↗

NASA NTRS1982

Power-MOSFET Voltage Regulator

Ninety-six parallel MOSFET devices with two-stage feedback circuit form a high-current dc voltage regulator that also acts as fully-on solid-state switch when fuel-cell out-put falls below regulated voltage. Ripple voltage is less than 20 mV, transient recovery time is less than 50 ms. Parallel MOSFET's act as high-current dc regulator and switch. Regulator can be used wherever large direct currents must be controlled. Can be applied to inverters, industrial furnaces photovoltaic solar generators, dc motors, and electric autos.

Miller, W. N.↗

NASA NTRS1981

Cryogenic switched MOSFET characterization

Both p channel and n channel enhancement mode MOSFETs can be readily switched on and off at temperatures as low as 2.8 K so that switch sampled readout of a VLWIR Ge:Ga focal plane is electronically possible. Noise levels as low as 100 rms electrons per sample (independent of sample rate) can be achieved using existing p channel MOSFETs, at overall rates up to 30,000 samples/second per multiplexed channel (e.g., 32 detectors at a rate of almost 1,000 frames/second). Run of the mill devices, including very low power dissipation n channel FETs would still permit noise levels of the order of 500 electrons/sample.

Source record↗

NASA NTRS1986

Submicron Silicon MOSFET

Process for making metal-oxide/semiconductor field-effect transistors (MOSFET's) results in gate-channel lengths of only few hundred angstroms about 100 times as small as state-of-the-art devices. Gates must be shortened to develop faster MOSFET's; proposed fabrication process used to study effects of size reduction in MOS devices and eventually to build practical threedimensional structures.

Daud, T.↗

NASA NTRS1987

MOSFET's for Cryogenic Amplifiers

Study seeks ways to build transistors that function effectively at liquid-helium temperatures. Report discusses physics of metaloxide/semiconductor field-effect transistors (MOSFET's) and performances of these devices at cryogenic temperatures. MOSFET's useful in highly sensitive cryogenic preamplifiers for infrared astronomy.

Dehaye, R.↗

NASA NTRS1988

MOSFET Electric-Charge Sensor

Charged-particle probe compact and consumes little power. Proposed modification enables metal oxide/semiconductor field-effect transistor (MOSFET) to act as detector of static electric charges or energetic charged particles. Thickened gate insulation acts as control structure. During measurements metal gate allowed to "float" to potential of charge accumulated in insulation. Stack of modified MOSFET'S constitutes detector of energetic charged particles. Each gate "floats" to potential induced by charged-particle beam penetrating its layer.

Robinson, Paul A., Jr.↗

NASA NTRS1992

Charge generation by heavy ions in power MOSFETs, burnout space predictions, and dynamic SEB sensitivity

The transport, energy loss, and charge production of heavy ions in the sensitive regions of IRF 150 power MOSFETs are described. The dependence and variation of transport parameters with ion type and energy relative to the requirements for single event burnout in this part type are discussed. Test data taken with this power MOSFET are used together with analyses by means of a computer code of the ion energy loss and charge production in the device to establish criteria for burnout and parameters for space predictions. These parameters are then used in an application to predict burnout rates in a geostationary orbit for power converters operating in a dynamic mode. Comparisons of rates for different geometries in simulating SEU (single event upset) sensitive volumes are presented.

Stassinopoulos, E. G.↗