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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.
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Array of tiny probes tests complex printed circuit boards prior to mounting of microcircuit chips and other active and passive components. Insertion and alignment of board, performance of entire computer-controlled test, and printing of results requires about a minute; performed manually same tests require as much as 30 hours.
Lead chalcogenide photoresistors integrated with FET amplifiers. Circuit combines voltage divider containing lead chalcogenide photoresistor with FET source follower. Source and drain of FET p-doped regions in underlying n-type silicon wafer. All other structures formed at or deposited above original surface plane of wafer.
Operates on any power supply voltage from 6 to 28 volts. Miniature thermostate circuit controls electric heating element to maintain constant temperature in oven or other thermal environment.
Simple modification of oscilloscope probe allows easy detection of floating inputs or tristate outputs in digital-IC's. Oscilloscope probe easily modified with 1/4 W resistor and switch for detecting floating inputs in CMOS logic circuits.
Four-volume document reviews key technologies for interconnecting in very-large-scale integrated (VLSI) circuits. Document also discusses current and proposed research into novel fabrication techniques for interconnections.
Gallium arsenide solar cells are considered for several high temperature missions in space. Both near-Sun and concentrator missions could involve cell temperatures on the order of 200 C. Performance measurements of cells at elevated temperatures are usually made using simulated sunlight and a matched reference cell. Due to the change in bandgap with increasing temperature at portions of the spectrum where considerable simulated irradiance is present, there are significant differences in measured short circuit current at elevated temperatures among different simulators. To illustrate this, both experimental and theoretical data are presented for gallium arsenide cells.
Chemical etching for automatic processing of integrated circuits is discussed. The wafer carrier and loading from a receiving air track into automatic furnaces and unloading onto a sending air track are included.
A technique is developed for directly integrating infrared photoconductive PbS detector material with MOS transistors. A layer of chromium, instead of aluminum, is deposited followed by a gold deposition in order to ensure device survival during the chemical deposition of the PbS. Among other devices, a structure was fabricated and evaluated in which the PbS was directly coupled to the gate of a PMOS. The external bias, load, and source resistors were connected and the circuit was operated as a source-follower amplifier. Radiometric evaluations were performed on a variety of different MOSFETs of different geometry. In addition, various detector elements were simultaneously fabricated to demonstrate small element capability, and it was shown that elements of 25 x 25 microns could easily be fabricated. Results of room temperature evaluations using a filtered 700 K black body source yielded a detectivity at peak wavelength of 10 to the 11th cm (root Hz)/W at 100 Hz chopping frequency.
Recently it has been found that a class of failure related to a particular technology (CMOS) cannot be modelled as the conventional stuck-at fault model. These failures change the combinational behavior of CMOS logic gates into a sequential one. Such a failure is modelled as a fault, called the Stuck-Open fault (SOP). The object of this paper is to develop a procedure to detect single SOPs in combinational circuits. It is shown, that in general, tests generated for stuck-at faults when applied in a particular sequence will detect all single SOP faults. In case of single redundancy in the network, the SOP fault on the redundant line cannot be detected. When there is reconvergent fan-out in the network, there is a one-one correspondence between the conditions for stuck-at fault and stuck-open fault detectability.
Techniques used to determine the open-circuit voltage of solar cells are analyzed. It is noted that the computational procedures for determining the output characteristics of a solar cell depend on a thorough understanding of the behavior of individual components. However, amorphous materials and combination solar cells exhibit increasingly complex behaviors and theoretical analyses therefore are continually more dependent on experimental data for verification. Formulations are defined for the base region and for diffusion length measurement. Experimental results are cited to show that, for low resistivity, planar surface cells, the dark current from the emitter is the dominant factor limiting increases in the Voc, which can be enhanced by improving the efficiency of the doping levels and profile to minimize the effects of bandgap narrowing, junction recombination current, and diffusion length of the emitter region.
Quick visual inspection identifies out-of-place layers. Small copper pads or other labels on layers present regular pattern if multilayer circuit board properly assembled and irregular pattern if one or more layers in wrong place. New method faster, cheaper, and more reliable than earlier methods.
In order to identify the most promising means for improving the flow in the Langley 4- by 7-Meter Tunnel, detailed surveys of the mean velocity profiles were measured in both the horizontal and vertical planes of symmetry at specific locations throughout the tunnel circuit. These data were obtained at test-section dynamic pressures of 1.53, 2.78, and 4.79 kPa (3 2, 58, and 100 psf, respectively) for tunnel operation in both the closed and open test-section configurations. In the base-line tunnel-flow surveys, the flow patterns near the end of the test section indicate a uniform mean velocity distribution. Downstream of the test section, unsymmetrical flow patterns result in low velocities along the inner walls and in flow separation along the inner wall of the diffuser upstream of the drive fan and along the outer wall of the large diffuser downstream of the drive fan. In order to correct these unsymmetrical flow patterns, a set of trailing-edge flaps attached to the five flow-control vanes located just downstream of the first corner were installed. These flaps were very successful in making the tunnel flow more symmetrical and in eliminating the regions of separation in the diffusers upstream and downstream of the drive fan.
When an energetic particle (kinetic energy 0.5 MeV) originating from a radioactive decay or a cosmic ray transverse the active regions of semiconductor devices used in integrated circuit (IC) chips, it leaves along its track a high density electron hole plasma. The subsequent decay of this plasma by drift and diffusion leads to charge collection at the electrodes large enough in most cases to engender a false reading, hence the name single-event upset (SEU). The problem of SEU's is particularly severe within the harsh environment of Jupiter's radiation belts and constitutes therefore a matter of concern for the Galileo mission. The physics of an SEU event is analyzed in some detail. Owing to the predominance of nonlinear space charge effects and the fact that positive (holes) and negative (electrons) charges must be treated on an equal footing, analytical models for the ionized-charge collection and their corresponding currents as a function of time prove to be inadequate even in the simplest case of uniformly doped, abrupt p-n junctions in a one-dimensional geometry. The necessity for full-fledged computer simulation of the pertinent equations governing the electron-hole plasma therefore becomes imperative.
An apparatus is disclosed which includes a vacuum system having a vacuum chamber in which wafers are processed on rotating turntables. The vacuum chamber is provided with an RF sputtering system and a dc magnetron sputtering system. A gas inlet introduces various gases to the vacuum chamber and creates various gas plasma during the sputtering steps. The rotating turntables insure that the respective wafers are present under the sputtering guns for an average amount of time such that consistency in sputtering and deposition is achieved. By continuous and sequential processing of the wafers in a common vacuum chamber without removal, the adverse affects of exposure to atmospheric conditions are eliminated providing higher quality circuit contacts and functional device.
A motor power control of the type which functions by controlling the power factor wherein one of the parameters of power factor current on time is determined by the on time of a triac through which current is supplied to the motor. By means of a positive feedback circuit, a wider range of control is effected.
It is demonstrated that diffusion induced stresses in low resistivity silicon solar cells can significantly reduce both the open-circuit voltage and collection efficiency. The degradation mechanism involves stress induced changes in both the minority carrier mobility and the diffusion length. Thermal recovery characteristics indicate that the stresses are relieved at higher temperatures by divacancy flow (silicon self diffusion). The level of residual stress in as-fabricated cells was found to be negligible in the cells tested.
A ladder circuit especially useful in backward wave oscillators operating in the 500 GHz to 2000 GHz range has a waveguide with transversely orientated slabs which contact an upper wall of the waveguide. The edges of the slabs adjacent to the physical center of waveguide are curved segments and stubs of electrically conductive, nonmagnetic material. The ends of slabs include metal layers at opposite ends to provide a conductive leakage path. A ridge bar is attached to the inside of the bottom wall of the waveguide and includes a concave upper surface which partially straddles the electron beam. The novelty of the invention lies in the ladder structure compared of thin, vapor deposited rungs supported on the edge of diamond slabs; each rung having a curved segment which straddles the electron beam together with a ridge bar which also straddles the electron beam.
The problems associated with source circuit design for use in photovoltaic (PV) hardware of different manufacturers or processes are discussed. The varying performance of dissimilar materials is examined and the need for standardization of equipment and performance output is investigated.