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At least 145 records · Page 8

Raman Laser-Induced Structural Modification in CVD-Grown Monolayer MoS 2 for Multi-Purposed Nanofabrication

Molybdenum disulfide (MoS 2 ) has been extensively explored to be utilized as an electronic material in a variety of device applications. In particular, the tunability of MoS 2 enhances its electrical properties making it an intriguing candidate for field-effect transistors (FETs), while also extending beyond electrical properties to structural phase engineering. Laser-induced modifications, particularly with Raman lasers, offer a straightforward method to modulate materials via thermal processes with precise patterning control and energy-level flexibility. However, most studies on the modification of MoS 2 have focused on multilayered structures or have been conducted under low-power laser conditions, leaving the feasibility of structural modifications in monolayer MoS 2 elusive. In this study, we fundamentally elucidated the effects of high-power Raman laser irradiation on the surface of chemical vapor deposition (CVD)-grown monolayer MoS 2 under ambient conditions and uncovered the underlying mechanisms of laser-induced modifications by applying intense photon energy with highly interactive reactions. Our results revealed both etching and deposition phenomena in two discernible regions, and it can be demonstrated by intensity regimes based on the spatial distribution of laser irradiance within the laser-irradiated spot. Furthermore, phase transition was found to be inhibited due to the promoted oxidation and the deposition of hydrogenated amorphous carbon (a-C:H), and p-type doping was observed, likely occurring in the region beneath the a-C:H deposition as substitutional doping on the 2H phase of MoS 2 . To compare the thermal effects, MoS 2 modifications were further analyzed using simplified heat transfer estimations. In conclusion, these findings deepen our understanding of how Raman laser irradiation modifies MoS 2 under ambient conditions, providing guidelines for optimizing its modification processes.

36 MATERIALS SCIENCE↗

Communications and logic systems at millimeter wave frequencies, summary

During the contract period an AsCl3 epitaxial system used to provide buffer layers for FET structures was constructed. A submicron lithographic processes using deep U.V. techniques was developed and, employing these techniques, a working .5 micron gate device was produced. In addition, the development of submicron mixer diodes continued. The gettering of substrates of a technique to improve the mobility of ionimplantated layers was investigated. The result of this experiment showed a correlation between improved hall mobilities and gettered substrates. Finally, several theoretical studies are reported.

Source record↗

Percolative phase transition in few-layered MoSe 2 field-effect transistors using Co and Cr contacts

The metal-to-insulator phase transition (MIT) in two-dimensional (2D) materials under the influence of a gating electric field has revealed interesting electronic behavior and the need for a deeper fundamental understanding of electron transport processes, while attracting much interest in the development of next-generation electronic and optoelectronic devices. Although the mechanism of the MIT in 2D semiconductors is a topic under debate in condensed matter physics, our work demonstrates the tunable percolative phase transition in few-layered MoSe 2 field-effect transistors (FETs) using different metallic contact materials. Here, we attempted to understand the MIT through temperature-dependent electronic transport measurements by tuning the carrier density in a MoSe 2 channel under the influence of an applied gate voltage. In particular, we have examined this phenomenon using the conventional chromium (Cr) and ferromagnetic cobalt (Co) as two metal contacts. For both Cr and Co, our devices demonstrated n-type behavior with a room-temperature field-effect mobility of 16 cm 2 V −1 s −1 for the device with Cr-contacts and 92 cm 2 V −1 s −1 for the device with Co-contacts, respectively. Further, with low temperature measurements at 50 K, the mobilities increased significantly to 65 cm 2 V −1 s −1 for the device with Cr and 394 cm 2 V −1 s −1 for the device with Co-contacts. By fitting our experimental data to the percolative phase transition theory, the temperature-dependent conductivity data show a transition from an insulating-to-metallic behavior at a bias of ∼28 V for Cr-contacts and ∼20 V for Co-contacts. This cross-over of the conductivity can be attributed to an increase in carrier density as a function of the gate bias in temperature-dependent transfer characteristics. By extracting the critical exponents, we find that the transport behavior in the device with Co-contacts aligns closely with the 2D percolation theory. In contrast, the devices with Cr-contacts deviate significantly from the 2D limit at low temperatures.

36 MATERIALS SCIENCE↗

A 90 GHz Amplifier Assembled Using Flip-Chip Technology

This letter reports the performance of a novel single-stage W-band amplifier fabricated utilizing flip-chip bump-bonding. We have bump-bonded a high-speed, low-noise InP high electron mobility transistor (HEMT) device onto a separately fabricated passive circuit having a GaAs substrate.

FET amplifiers Millimeter wave FETs bump-bonding m↗

Analysis of the Measurement and Modeling of a Digital Inverter Based on a Ferroelectric Transistor

The use of ferroelectric materials for digital memory devices is widely researched and implemented, but ferroelectric devices also possess unique characteristics that make them have interesting and useful properties in digital circuits. Because ferroelectric transistors possess the properties of hysteresis and nonlinearity, a digital inverter containing a FeFET has very different characteristics than one with a traditional FET. This paper characterizes the properties of the measurement and modeling of a FeFET based digital inverter. The circuit was set up using discrete FeFETs. The purpose of this circuit was not to produce a practical integrated circuit that could be inserted directly into existing digital circuits, but to explore the properties and characteristics of such a device and to look at possible future uses. Input and output characteristics are presented, as well as timing measurements. Comparisons are made between the ferroelectric device and the properties of a standard digital inverter. Potential benefits and possible uses of such a device are presented.

MacLeod, Todd C.↗

GaAs dual-gate FET for operation up to K-band

A high-frequency equivalent-circuit model of a GaAs dual-gate FET and analytical expressions for the input/output impedances, transconductance, unilateral gain, and stability factor are presented. It is found that the gain of a dual-gate FET is higher than of a single-gate FET at low frequency but decreases faster as frequency increases because of the capacitive shunting effect of the second gate. A dual-gate power FET suitable for variable-gain-amplifier applications up to K-band has been developed. At 10 GHz, a 1.2-mm-gatewidth device has achieved an output power of 1.1 W with 10.5-dB gain and 31-percent power-added efficiency. At 20 GHz, the same device delivered an output power of 340 mW with 5.3-dB gain. At K-band, a dynamic-gain control range of up to 45 dB was obtained with an insertion phase change of no more than + or 2 degrees for the first 10 dB of gain control.

Kim, B.↗

Development of a unit cell for a Ge:Ga detector array

Two modules of gallium-doped germanium (Ge:Ga) infrared detectors with integrated multiplexing readouts and supporting drive electronics were designed and tested. This development investigated the feasibility of producing two-dimensional Ge:Ga arrays by stacking linear modules in a housing capable of providing uniaxial stress for enhanced long-wavelength response. Each module includes 8 detectors (1x1x2 mm) mounted to a sapphire board. The element spacing is 12 microns. The back faces of the detector elements are beveled with an 18 deg angle, which was proved to significantly enhance optical absorption. Each module includes a different silicon metal-oxide semiconductor field effect transistor (MOSFET) readout. The first circuit was built from discrete MOSFET components; the second incorporated devices taken from low-temperature integrated circuit multiplexers. The latter circuit exhibited much lower stray capacitance and improved stability. Using these switched-FET circuits, it was demonstrated that burst readout, with multiplexer active only during the readout period, could successfully be implemented at approximately 3.5 K.

Source record↗

AlGaN Channel Transistors for Power Management and Distribution

Contained within is the Final report of a Phase 1 SBIR program to develop AlGaN channel junction field effect transistors (JFET). The report summarizes our work to design, deposit, and fabricate JFETS using molecular beam epitaxy growth AlGaN. Nitride growth is described using a RF atomic nitrogen plasma source. Processing steps needed to fabricate the device such as ohmic source-drain contacts, reactive ion etching, gate formation, and air bride fabrication are documented. SEM photographs of fabricated power FETS are shown. Recommendations are made to continue the effort in a Phase 2 Program.

ENERGY MANAGEMENT↗

Operation of a New Half-Bridge Gate Driver for Enhancement - Mode GaN FETs, Type LM5113, Over a Wide Temperature Range

A new commercial-off-the-shelf (COTS) gate driver designed to drive both the high-side and the low-side enhancement-mode GaN FETs, National Semiconductor's type LM5113, was evaluated for operation at temperatures beyond its recommended specified limits of -40 C to +125 C. The effects of limited thermal cycling under the extended test temperature, which ranged from -194 C to +150 C, on the operation of this chip as well as restart capability at the extreme cryogenic and hot temperatures were also investigated. The driver circuit was able to maintain good operation throughout the entire test regime between -194 C and +150 C without undergoing any major changes in its outputs signals and characteristics. The limited thermal cycling performed on the device also had no effect on its performance, and the driver chip was able to successfully restart at each of the extreme temperatures of -194 C and +150 C. The plastic packaging of this device was also not affected by either the short extreme temperature exposure or the limited thermal cycling. These preliminary results indicate that this new commercial-off-the-shelf (COTS) halfbridge eGaN FET driver integrated circuit has the potential for use in space exploration missions under extreme temperature environments. Further testing is planned under long-term cycling to assess the reliability of these parts and to determine their suitability for extended use in the harsh environments of space.

Patterson, Richard↗

Effects Of Environmental And Operational Stresses On RF MEMS Switch Technologies For Space Applications

Micro Electro Mechanical Systems (MEMS) have been heralded for their ability to provide tremendous advantages in electronic systems through increased electrical performance, reduced power consumption, and higher levels of device integration with a reduction of board real estate. RF MEMS switch technology offers advantages such as low insertion loss (0.1- 0.5 dB), wide bandwidth (1 GHz-100 GHz), and compatibility with many different process technologies (quartz, high resistivity Si, GaAs) which can replace the use of traditional electronic switches, such as GaAs FETS and PIN Diodes, in microwave systems for low signal power (x < 500 mW) applications. Although the electrical characteristics of RF MEMS switches far surpass any existing technologies, the unknown reliability, due to the lack of information concerning failure modes and mechanisms inherent to MEMS devices, create an obstacle to insertion of MEMS technology into high reliability applications. All MEMS devices are sensitive to moisture and contaminants, issues easily resolved by hermetic or near-hermetic packaging. Two well-known failure modes of RF MEMS switches are charging in the dielectric layer of capacitive membrane switches and contact interface stiction of metal-metal switches. Determining the integrity of MEMS devices when subjected to the shock, vibration, temperature extremes, and radiation of the space environment is necessary to facilitate integration into space systems. This paper will explore the effects of different environmental stresses, operational life cycling, temperature, mechanical shock, and vibration on the first commercially available RF MEMS switches to identify relevant failure modes and mechanisms inherent to these device and packaging schemes for space applications. This paper will also describe RF MEMS Switch technology under development at NASA GSFC.

Jah, Muzar↗

Wide-Bandgap Semiconductor Amplifiers for Fusion Plasma Heating and Control

This paper discusses power electronics developed under the ARPA-E GAMOW program to support nuclear fusion power production. The goal of this project was to develop and assess the potential for wide-bandgap (WBG) semiconductor devices in power electronics to enable high-efficiency and high-voltage solid-state systems for fusion plasma generation, heating, and control. The power electronics use an architecture in which multiple high-power boards can be combined to produce megawatt-level power, where using multiple boards provides high reliability. Two main areas of power electronics boards are developed in this project for fusion plasma heating and control applications: (1) pulse generation and control and (2) radiofrequency generation. The first area is for boards capable of driving high-voltage millisecond pulses at high duty cycles. The envisioned application of these pulses is in plasma control of magnetohydrodynamic instabilities, plasma position, and edge-localized modes. Pulse-width modulation allows for the implementation of a wide variety of linear and nonlinear control systems. The boards developed for this project could actuate control coils based on digital input signals and can be parallelized to provide megawatts of output power. The design of the pulse generator is a low-side load switch. A load switch was designed and constructed that utilized 2-kV-rated field-effect transistor (FET)-based cascodes developed by Qorvo under this project to perform initial testing of these cascodes. The second area is being implemented using class E amplifiers with WBG devices and a reactance steering network to handle inductive or capacitive plasma loads. Applications include ion cyclotron resonance heating (ICRH) and high-harmonic fast-wave (HHFW) heating. A class E reactance steering network is demonstrated in modeling and experiment with a resistive-inductive load that models an inductively-coupled plasma. Power combining of boards with class E reactance steering networks is also simulated and demonstrated experimentally, to enable scaling up to high power. Modeling of high-power-density cooling and remaining useful life is conducted to enable reliable, effectively cooled high-power electronics for fusion applications.

11 NUCLEAR FUEL CYCLE AND FUEL MATERIALS↗

Next-generation tunnel FETs: exploring material perspectives and areal tunneling configurations

The end of Dennard scaling, which facilitated proportional increases in computing power without added energy costs until the mid-2000s, has underscored the urgent need for innovative semiconductor devices that can enhance energy efficiency. Tunnel field-effect transistors (TFETs) have emerged as promising candidates to surpass the energy efficiency of conventional metal oxide semiconductor field-effect transistors (MOSFETs). Unlike MOSFETs, which rely on thermionic emission to overcome the source-channel potential barrier, TFETs operate through quantum tunneling, potentially enabling sub-60 mV dec −1 subthreshold swing (SS) for low-voltage operation. However, lateral TFETs have faced challenges in achieving adequate on-state current (I ON ) and a broad SS operation window, limiting their practical utility. This review article advocates for areal TFETs, which utilize face-to-face tunnel junctions that ideally offer step-function current turn-on characteristics and allow I ON to scale with device area rather than width. We highlight recent advancements in integrating 2D materials into tunneling structures, which could facilitate efficient band-to-band tunneling through atomically thin layers, while addressing challenges of gate field screening. We then discuss the nearer-term prospects of epitaxial areal TFETs comprising III–V compound semiconductors and group-IV semiconductors based on recent experimental progress. The review examines both quantum mechanical and semiclassical modeling approaches for TFETs, including techniques to reduce the computational complexity. The article delves into ongoing challenges in material synthesis, interface engineering, device fabrication, and integration pathways, concluding with recommendations for future research directions to overcome the fundamental power density limitations of conventional transistor technology.

2D materials↗

High-Mobility Hole Transport in Single-Grain PbSe Quantum Dot Superlattice Transistors

Epitaxially-fused superlattices of colloidal quantum dots (QD epi-SLs) may exhibit electronic minibands and high-mobility charge transport, but electrical measurements of epi-SLs have been limited to large-area, polycrystalline samples in which superlattice grain boundaries and intragrain defects suppress/obscure miniband effects. Systematic measurements of charge transport in individual, highly-ordered epi-SL grains would facilitate the study of minibands in QD films. Here, we demonstrate the air-free fabrication of microscale field-effect transistors (μ-FETs) with channels consisting of single PbSe QD epi-SL grains (2–7 μm channel dimensions) and analyze charge transport in these single-grain devices. The eight devices studied show p-channel or ambipolar transport with a hole mobility as high as 3.5 cm 2 V –1 s –1 at 290 K and 6.5 cm 2 V –1 s –1 at 170–220 K, one order of magnitude larger than that of previous QD solids. The mobility peaks at 150–220 K, but device hysteresis at higher temperatures makes the true mobility–temperature curve uncertain and evidence for miniband transport inconclusive.

37 INORGANIC, ORGANIC, PHYSICAL, AND ANALYTICAL CH↗

Single-event Effect Report for EPC Series eGaN FETs: Proton Testing for SEE and TNID Effects

Previous testing of the Enhanced Power Conversion (EPC) eGaN FETs showed sensitivity to destructive single-event effects (SEE) effects to heavy ions. The presence of tungsten plugs in the gate area raises concerns that the device may be vulnerable to SEE from protons. Irradiation of biased and unbiased devices with heavy ion has results in some damage suspected of being due to total non-ionizing dose (TNID). Proton irradiation is a better radiation type to study this effect. This study presents the results of testing device with protons for SEE and TNID. No SEE in the EPC2012 device, the most sensitive device to SEE, were seen with 53 MeV protons at several angles. The devices continued to function after 1.5 Mrad (Si) of proton dose with only a slight shift in parameters. These results suggest that gross TNID will not be a factor in using these devices nor suffer from SEE due to protons. However, the device should be tested at with 500 MeV protons to guarantee to immunity proton SEE.

Scheick, Leif↗

Measurement and Analysis of a Ferroelectric Field-Effect Transistor NAND Gate

Previous research investigated expanding the use of Ferroelectric Field-Effect Transistors (FFET) to other electronic devices beyond memory circuits. Ferroelectric based transistors possess unique characteris tics that give them interesting and useful properties in digital logic circuits. The NAND gate was chosen for investigation as it is one of the fundamental building blocks of digital electronic circuits. In t his paper, NAND gate circuits were constructed utilizing individual F FETs. N-channel FFETs with positive polarization were used for the standard CMOS NAND gate n-channel transistors and n-channel FFETs with n egative polarization were used for the standard CMOS NAND gate p-chan nel transistors. The voltage transfer curves were obtained for the NA ND gate. Comparisons were made between the actual device data and the previous modeled data. These results are compared to standard MOS logic circuits. The circuits analyzed are not intended to be fully opera tional circuits that would interface with existing logic circuits, bu t as a research tool to look into the possibility of using ferroelectric transistors in future logic circuits. Possible applications for th ese devices are presented, and their potential benefits and drawbacks are discussed.

Phillips, Thomas A.↗

Molecular Engineering of 2D Nanomaterial Field-Effect Transistor Sensors: Fundamentals and Translation across Innovation Spectrum

We report over the last decade, 2D layered nanomaterials have attracted significant attention across the scientific community due to their rich and exotic properties. Various nanoelectronic devices based on these 2D nanomaterials have been explored and demonstrated, including those for environmental applications. Here, the fundamental attributes of 2D layered nanomaterials for field-effect transistor (FET) sensors and tunneling FET (TFET) sensors, which provide versatile detection of water contaminants such as heavy-metal ions, bacteria, nutrients, and organic pollutants, are discussed. The major challenges and opportunities are also outlined for designing and fabricating 2D nanomaterial FET/TFET sensors with superior performance. Translation of these FET/TFET sensors from fundamental research to applied technology is illustrated through a case study on graphene-based real-time FET water sensors. A second case study centers on large-scale sensor networks for water-quality monitoring to enable intelligent drinking water and river-water systems. Overall, 2D nanomaterial FET sensors have significant potential for enabling a human-centered intelligent water system that can likely be applied to other precarious water supplies around the globe.

2D nanomaterials↗

Development and fabrication of low ON resistance high current vertical VMOS power FETs

The design of a VMOS Power FET exhibiting low ON resistance, high current as well as high breakdown voltage and fast switching speeds is described. The design which is based on a 1st-order device model, features a novel polysilicon-gate structure and fieldplated groove termination to achieve high packing density and high breakdown voltage, respectively. One test chip, named VNTKI, can block 180 V at an ON resistence of 2.5 ohm. A 150 mil x 200 mil (.19 sq cm) experimental chip has demonstrated a breakdown voltage of 200v, an ON resistance of 0.12 ohm, a switching time of less than 100 ns, and a pulse drain - current of 50 A with 10 V gate drive.

Kay, S.↗

High Density Memory Based on Quantum Device Technology

We explore the feasibility of ultra-high density memory based on quantum devices. Starting from overall constraints on chip area, power consumption, access speed, and noise margin, we deduce boundaries on single cell parameters such as required operating voltage and standby current. Next, the possible role of quantum devices is examined. Since the most mature quantum device, the resonant tunneling diode (RTD) can easily be integrated vertically, it naturally leads to the issue of 3D integrated memory. We propose a novel method of addressing vertically integrated bistable two-terminal devices, such as resonant tunneling diodes (RTD) and Esaki diodes, that avoids individual physical contacts. The new concept has been demonstrated experimentally in memory cells of field effect transistors (FET's) and stacked RTD's.

vanderWagt, Paul↗