Engineering PapersSearch

SEARCH · Engineering Papers

Results for “semiconductor processing”

Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

Quote a phrase for an exact phrase match. Source license links do not imply unrestricted reuse.

At least 109 records · Page 6

Semiconductors: In Situ Processing of Photovoltaic Devices

Current proposals for developing an extended human presence on the Moon and Mars increasingly consider the processing of nonterrestrial materials essential for keeping the Earth launch burden reasonable. Utilization of in situ resources for construction of lunar and Mars bases will initially require assessment of resource availability followed by the development of economically acceptable and technically feasible extraction processes. In regard to materials processing and fabrication, the lower gravity level on the Moon (0.125 g) and Mars (0.367 g) will dramatically change the presently accepted hierarchy of materials in terms of specific properties, a factor that must be understood and exploited. Furthermore, significant changes are expected in the behavior of liquid materials during processing. In casting, for example, mold filling and associated solidification processes have to be reevaluated. Finally, microstructural development, and therefore material properties, presently being documented through ongoing research in microgravity science and applications, need to be understood and scaled to the reduced gravity environments.

Curreri, Peter A.

Plasma Processing of Metallic and Semiconductor Thin Films in the Fisk Plasma Source

The use of plasmas to process materials has become widespread throughout the semiconductor industry. Plasmas are used to modify the morphology and chemistry of surfaces. We report on initial plasma processing experiments using the Fisk Plasma Source. Metallic and semiconductor thin films deposited on a silicon substrate have been exposed to argon plasmas. Results of microscopy and chemical analyses of processed materials are presented.

Lampkin, Gregory

Flat-plate solar array project: Experimental process system development unit for producing semiconductor-grade silicon using the silane-to-silicon process

The engineering design, fabrication, assembly, operation, economic analysis, and process support research and development for an Experimental Process System Development Unit for producing semiconductor-grade silicon using the slane-to-silicon process are reported. The design activity was completed. About 95% of purchased equipment was received. The draft of the operations manual was about 50% complete and the design of the free-space system continued. The system using silicon power transfer, melting, and shotting on a psuedocontinuous basis was demonstrated.

Source record

Continuous replenishment of molten semiconductor in a Czochralski-process, single-crystal-growing furnace

A replenishment crucible is mounted adjacent the usual drawing crucible, from which a monocrystalline boule is drawn according to the Czochralski method. A siphon tube for molten semiconductor transfer extends from the replenishment crucible to the drawing crucible. Each crucible is enclosed within its own hermetic shell and is provided with its own heater. The siphon tube is initially filled with molten semiconductor by raising the inert atmospheric pressure in the shell surrounding the replenishment crucible above that surrounding the drawing crucible. Thereafter, adjustment of the level of molten semiconductor in the drawing crucible may be achieved by adjusting the level in either crucible, since the siphon tube will establish the same level in both crucibles. For continuous processing, solid semiconductor may be added to and melted in the replenishment crucible during the process of drawing crystals from the drawing crucible. A constant liquid level of melted semiconductor is maintained in the system by an optical monitoring device and any of several electromechanical controls of the rate of replenishment or crucible height.

Fiegl, George

Influence of material quality and process-induced defects on semiconductor device performance and yield

An overview of major causes of device yield degradation is presented. The relationships of device types to critical processes and typical defects are discussed, and the influence of the defect on device yield and performance is demonstrated. Various defect characterization techniques are described and applied. A correlation of device failure, defect type, and cause of defect is presented in tabular form with accompanying illustrations.

Porter, W. A.

Low cost solar array project: Experimental process system development unit for producing semiconductor-grade silicon using silane-to-silicon process

The design, fabrication, and installation of an experimental process system development unit (EPSDU) were analyzed. Supporting research and development were performed to provide an information data base usable for the EPSDU and for technological design and economical analysis for potential scale-up of the process. Iterative economic analyses were conducted for the estimated product cost for the production of semiconductor grade silicon in a facility capable of producing 1000-MT/Yr.

Source record

Flat-plate solar array project: Experimental process system development unit for producing semiconductor-grade silicon using the silane-to-silicon process

The process technology for the manufacture of semiconductor-grade silicon in a large commercial plant by 1986, at a price less than $14 per kilogram of silicon based on 1975 dollars is discussed. The engineering design, installation, checkout, and operation of an Experimental Process System Development unit was discussed. Quality control of scaling-up the process and an economic analysis of product and production costs are discussed.

Source record

Diagnostic for Plasma Enhanced Chemical Vapor Deposition and Etch Systems

In order to meet NASA's requirements for the rapid development and validation of future generation electronic devices as well as associated materials and processes, enabling technologies ion the processing of semiconductor materials arising from understanding etch chemistries are being developed through a research collaboration between Stanford University and NASA-Ames Research Center, Although a great deal of laboratory-scale research has been performed on many of materials processing plasmas, little is known about the gas-phase and surface chemical reactions that are critical in many etch and deposition processes, and how these reactions are influenced by the variation in operating conditions. In addition, many plasma-based processes suffer from stability and reliability problems leading to a compromise in performance and a potentially increased cost for the semiconductor manufacturing industry. Such a lack of understanding has hindered the development of process models that can aid in the scaling and improvement of plasma etch and deposition systems. The research described involves the study of plasmas used in semiconductor processes. An inductively coupled plasma (ICP) source in place of the standard upper electrode assembly of the Gaseous Electronics Conference (GEC) radio-frequency (RF) Reference Cell is used to investigate the discharge characteristics and chemistries. This ICP source generates plasmas with higher electron densities (approximately 10(exp 12)/cu cm) and lower operating pressures (approximately 7 mTorr) than obtainable with the original parallel-plate version of the GEC Cell. This expanded operating regime is more relevant to new generations of industrial plasma systems being used by the microelectronics industry. The motivation for this study is to develop an understanding of the physical phenomena involved in plasma processing and to measure much needed fundamental parameters, such as gas-phase and surface reaction rates. species concentration, temperature, ion energy distribution, and electron number density. A wide variety of diagnostic techniques are under development through this consortium grant to measure these parameters. including molecular beam mass spectrometry (MBMS). Fourier transform infrared (FTIR) spectroscopy, broadband ultraviolet (UV) absorption spectroscopy, a compensated Langmuir probe. Additional diagnostics. Such as microwave interferometry and microwave absorption for measurements of plasma density and radical concentrations are also planned.

Cappelli, Mark A.

Design optimization of MAPS-based detectors using a data-driven fast simulation approach

A parametric simulation tool for pixel sensors is presented. A realistic pixel response is simulated purely based on measurement input, without requiring detailed knowledge of the underlying manufacturing process. As such, it provides an efficient alternative to the use of Technology Computer-Aided Design simulations, which typically depend on proprietary process information. Due to its parametric approach, the package is fast and thus particularly useful for larger detector systems and high hit rate environments. This work presents measurements, simulation and its validation for the MALTA2 sensor. It is a small collection electrode monolithic active pixel sensor produced in the Tower 180 nm complementary metal-oxide-semiconductor imaging process. Modifications to the sensor’s periphery, mainly in the hit merger, are studied in order to optimize the performance for tracking and calorimetry. This optimization is of special interest as part of the MALTA3 sensor redesign in the 65 nm Tower Partners Semiconductor Co. process.

72 PHYSICS OF ELEMENTARY PARTICLES AND FIELDS

X-ray topography as a process control tool in semiconductor and microcircuit manufacture

A bent wafer camera, designed to identify crystal lattice defects in semiconductor materials, was investigated. The camera makes use of conventional X-ray topographs and an innovative slightly bent wafer which allows rays from the point source to strike all portions of the wafer simultaneously. In addition to being utilized in solving production process control problems, this camera design substantially reduces the cost per topograph.

Parker, D. L.

Materials processing threshold report. 1: Semiconductor crystals for infrared detectors

An extensive search was performed of the open literature pertaining to infrared detectors to determine what constitutes a good detector and in what way performance is limited by specific material properties. Interviews were conducted with a number of experts in the field to assess their perceptions of the state of the art and of the utility of zero-gravity processing. Based on this information base and on a review of NASA programs in crystal growth and infrared sensors, NASA program goals were reassessed and suggestions are presented as to possible joint and divergent efforts between NASA and DOD.

Sager, E. V.

Low cost solar aray project: Experimental process system development unit for producing semiconductor-grade silicon using the silane-to-silicon process

This phase consists of the engineering design, fabrication, assembly, operation, economic analysis, and process support R&D for an Experimental Process System Development Unit (EPSDU). The mechanical bid package was issued and the bid responses are under evaluation. Similarly, the electrical bid package was issued, however, responses are not yet due. The majority of all equipment is on order or has been received at the EPSDU site. The pyrolysis/consolidation process design package was issued. Preparation of process and instrumentation diagram for the free-space reactor was started. In the area of melting/consolidation, Kayex successfully melted chunk silicon and have produced silicon shot. The free-space reactor powder was successfully transported pneumatically from a storage bin to the auger feeder twenty-five feet up and was melted. The fluid-bed PDU has successfully operated at silane feed concentrations up to 21%. The writing of the operating manual has started. Overall, the design phase is nearing completion.

Source record

Flat-plate solar-array project. Experimental process system development unit for producing semiconductor-grade silicon using the silane-to-silicon process

The engineering design, fabrication, assembly, operation, economic analysis, and process support R and D for an Experimental Process System Development Unit (EPSDU) are reported. About 95% of purchased equipment is received and will be reshipped to the West Coast location. The Data Collection System is completed. In the area of melting/consolidation, to the system using silicon powder transfer, melting and shotting on a pseudocontinuous basis is demonstrated. It is proposed to continue the very promising fluid bed work.

Source record

Low cost solar array project. Experimental process system development unit for producing semiconductor-grade silicon using the silane-to-silicon process

Technical activities are reported in the design of process, facilities, and equipment for producing silicon at a rate and price comensurate with production goals for low cost solar cell modules. The silane-silicone process has potential for providing high purity poly-silicon on a commercial scale at a price of fourteen dollars per kilogram by 1986, (1980 dollars). Commercial process, economic analysis, process support research and development, and quality control are discussed.

Source record