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Process for making metal-oxide/semiconductor field-effect transistors (MOSFET's) results in gate-channel lengths of only few hundred angstroms about 100 times as small as state-of-the-art devices. Gates must be shortened to develop faster MOSFET's; proposed fabrication process used to study effects of size reduction in MOS devices and eventually to build practical threedimensional structures.
Test were conducted to measure the performance of the 20-GHz solid state, proof-of-concept amplifier. The amplifier operates over the 17.7 to 20.2-GHz frequency range and uses high power gallium arsenide field effect transistors. The amplifier design and test methods are briefly described. NASA and contractor performance data are compared.
A high frequency oscillator circuit is provided using a low cost junction type field effect transistor (T sub 1) with a tuned circuit connected to its gate. The frequency of operation is determined by the tuned circuit and the capacitance reflected from the source to the gate. The transistor is matched to the frequency of operation so that this frequency falls within the roll-off portion of the transistor's transconductance verses frequency curve, preferably somewhat above the 3 db point in frequency. Phase shift necessary to sustain oscillation occurs due to the operation of the transistor in the roll-off portion of the curve and the addition of a phase shifting network (R sub 1, C sub 1) at the source.
The parameters from metal-oxide-silicon field-effect transistors (MOSFETs) that are included on the Combined Release and Radiation Effects Satellite (CRRES) test chips need to be extracted to have a simple but comprehensive method that can be used in wafer acceptance, and to have a method that is sufficiently accurate that it can be used in integrated circuits. A set of MOSFET parameter extraction procedures that are directly linked to the MOSFET model equations and that facilitate the use of simple, direct curve-fitting techniques are developed. In addition, the major physical effects that affect MOSFET operation in the linear and saturation regions of operation for devices fabricated in 1.2 to 3.0 mm CMOS technology are included. The fitting procedures were designed to establish single values for such parameters as threshold voltage and transconductance and to provide for slope matching between the linear and saturation regions of the MOSFET output current-voltage curves. Four different sizes of transistors that cover a rectangular-shaped region of the channel length-width plane are analyzed.
A liquid helium-cooled, 24 detector grating spectrometer was developed and used for low resolution astronomical observations in the 5 to 14 micron spectral range. The instrument operated on the 91 cm Kuiper Airborne Observatory, the 3 m IRTF (Mauna Kea), the 3 m Shane telescope (Lick Observatory), and the 152 cm NASA and University of Arizona telescope. The detectors are discrete Si:Bi photoconductors with individual metal oxide semiconductor field effect transistor preamplifiers operating at 4 K. The system uses a liquid helium-cooled slit, order-sorter filter, collimator mirror, grating, and camera mirror arranged in a Czerny-Turner configuration with a cold stop added between the collimator mirror and the grating. The distances between components are chosen so that the collimator mirror images the secondary mirror of the telescope onto the cold stop, thus providing a very effective baffle. Scattered radiation is effectively reduced by using liquid helium-cooled, black baffles to divide the spectrometer into three separate compartments. The system noise-equivalent flux density, when used on the 152 cm telescope from 8 to 13 microns with a resolving power of 50, is 4.4 x 10 to the minus 17th power W/sq cm micron square root of Hz. The main applications are for measuring continuum radiation levels and solid state emission and absorption features in regions of star and planet formation.
A mercuric iodide energy dispersive X-ray spectrometer, with Peltier cooling provided for the detector and input field effect transistor, has been developed and tested in a scanning electron microscope. X-ray spectra were obtained with the 15 keV electron beam. An energy resolution of 225 eV (FWHM) for Mn-K(alpha) at 5.9 keV and 195 eV (FWHM) for the Mg-K line at 1.25 keV has been measured. Overall system noise level was 175 eV (FWHM). The detector system characterization with a carbon target demonstrated good energy sensitivity at low energies and lack of significant spectral artifacts at higher energies.
Functions of circuit breakers, meters, and switches combined. Circuit that includes power field-effect transistors (PFET's) provides on/off switching, soft starting, current monitoring, current tripping, and protection against overcurrent for 30-Vdc power supply at normal load currents up to 2 A. Has no moving parts.
Two 8.4GHz low-noise traveling-wave masers (TWMS) with effective input noise temperatures of 3.6 to 3.9 K and bandwidth in excess of 100 MHz have been supplied to the Deep Space Network. These TWMs are used on the 64-meter antennas at Deep Space Stations 14 and 43 to meet the requirements of the Voyager Uranus encounter. The TWMs have improved isolator assemblies and new interstage matching configurations to reduce gain/bandwidth ripple. They are equipped with followup Field Effect Transistor Amplifiers as part of the design to meet the 100-MHz bandwidth requirements of very long baseline interferometry.
The development of power Field Effect Transistors (FET) operating in the 20 GHz frequency band is described. The major efforts include GaAs FET device development (both 1 W and 2 W devices), and the development of an amplifier module using these devices.
In an investigation of metal oxide semiconductor field effect transistor (MOFSET) devices, a one-dimensional mathematical model of device dynamics was prepared, from which an accurate and computationally efficient drain current expression could be derived for subsequent parameter extraction. While a critical review revealed weaknesses in existing 1-D models (Pao-Sah, Pierret-Shields, Brews, and Van de Wiele), this new model in contrast was found to allow all the charge distributions to be continuous, to retain the inversion layer structure, and to include the contribution of current from the pinched-off part of the device. The model allows the source and drain to operate in different regimes. Numerical algorithms used for the evaluation of surface potentials in the various models are presented.
During this period InGaAs and InGaAsP were grown on (100)InP by liquid phase electroepitaxy (LPEE). Results of the epitaxial growth of InGaAs on sputtered quartz masked substrates are presented. The resulting surface morphology can be related to the current density distribution near the edges of a masked pattern. The quaternary InGaAs was grown with compositions corresponding to 1.3 micron and 1.5 micron emission wavelengths. Growth rates were found to be linearly dependent upon current density, and a strong dependence upon composition was noted. These compositions lie in the miscibility gap region of the alloy phase diagram at the 645 C growth temperature. Growths were performed at 685 C to avoid the miscibility gap. Epilayers were characterized by photoluminescence, X-ray diffraction, secondary ion mass spectrometry, and Hall effect measurements. Aluminum oxide was deposited on silicon and InGaAs substrates for the characterization of this material as an insulator in a field effect transistor structure. It was determined that the results did not warrant further work with the deposition from an aluminum isopropoxide source. A metallographic vapor phase epitaxy system installation is nearing completion for use in hybrid III-V semiconductor epilayer growths.
Modulation-doped InAlAs/InGaAs/InP structures were grown by molecular beam epitaxy and fabricated into FETs with excellent RF gain performance. The intrinsic transconductance was about 400 mS/mm at 300 K. Current gain cutoff frequencies of up to 26.5 GHz were obtained in 1-micron gate devices. Extremely small S12 and large S21 led to a very large F(max) of 62 GHz. These results represent the best reported figures for 1-micron devices in this material system, and slightly better than those obtained in recently developed pseudomorphic modulation-doped field effect transistors.
Charged-particle probe compact and consumes little power. Proposed modification enables metal oxide/semiconductor field-effect transistor (MOSFET) to act as detector of static electric charges or energetic charged particles. Thickened gate insulation acts as control structure. During measurements metal gate allowed to "float" to potential of charge accumulated in insulation. Stack of modified MOSFET'S constitutes detector of energetic charged particles. Each gate "floats" to potential induced by charged-particle beam penetrating its layer.
Theoretical paper discusses response of enhancement-mode metal oxide/semiconductor field-effect transistor to cosmic-ray ion that passes perpendicularly through gate-oxide layers. Even if ion causes no permanent damage, temporary increase of electrical conductivity along track of ion large enough and long enough to cause change in logic state in logic circuit containing MOSFET.
New low-noise cryogenic input transmission lines have been developed for the Deep Space Network (DSN) at 1.668 GHz for cryogenically cooled Field Effect Transistors (FET) and High Electron Mobility Transistor (HEMT) amplifiers. These amplifiers exhibit very low noise temperatures of 5 K to 15 K, making the requirements for a low-noise input transmission line critical. Noise contribution to the total amplifier system from the low-noise line is less than 0.5 K for both the 1.668-GHz and 2.25-GHz FET systems. The 1.668-GHz input line was installed in six FET systems which were implemented in the DSN for the Venus Balloon Experiment. The 2.25-GHz input line has been implemented in three FET systems for the DSN 34-m HEF antennas, and the design is currently being considered for use at higher frequencies.
The Very Large Array (VLA) is being equipped to receive telemetry from Voyager 2 during the Neptune encounter in 1989. Cryogenically cooled amplifiers are being installed on each of the 27 antennas. These amplifiers are currently a mix of field effect transistors (FETs) and high electron mobility transistors (HEMTs) and exhibit zenith system temperatures that range from 30 to 52 K. The system temperatures and aperture efficiencies determined during the past year are summarized. The nominal values of the noise diode calibration are compared with derived values made under the assumption of a uniform atmosphere over the array. Gain values are determined from observations of unresolved radio sources whose flux densities are well known. The tests suggest that the completed VLA will have a ratio of gain to system temperature that is approximately 4.4 dB above that of a single 64 m antenna of the Deep Space Network.
A cryogenic cooled, low-noise Field Effect Transistor (FET) amplifier assembly for use at 2.2 to 2.3 GHz was developed for the DSN to meet the requirements of a Very Long Baseline Interferometry (VLBI) upgrade. An amplifier assembly was developed at JPL that uses a commercial closed-cycle helium refrigerator (CCR) to cool a FET amplifier to an operating temperature of 15 K. A cooled probe waveguide-to-coaxial transition similar to that used in the research and development Ultra-Low-Noise S-band Traveling Wave Maser (TWM) is used to minimize input line losses. Typical performance includes an input flange equivalent noise contribution of 14.5 K, a gain slope of less than 0.05 dB/MHz across a bandwidth of 2.2 to 2.3 GHz, an input VSWR of 1.5:1 at 2.25 GHz, and an insertion gain of 45 + or - 1 dB across the bandwidth of 2.2 to 2.3 GHz. Three 2.3 GHz FET/CCR assemblies were delivered to the DSN in the spring of 1987.
Two hybrid infrared (IR) detector arrays of antimony-doped silicon (Si:Sb) were produced and tested to evaluate their potential for use in low-background IR astronomy applications. The format of the arrays is 58 x 62 elements, with 76 micron-square pixels. A random-access, switched metal-oxide semiconductor field effect transistor (MOSFET) silicon multiplexer is used to read out the array elements. Reduced-background tests of signal, noise, and noise equivalent power were conducted over the temperature range 3.2 to 12 K. The arrays were found to have good sensitivity and good uniformity.