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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 559 records · Page 31

All sources NASA NTRS DOE OSTI

NASA NTRS1978

Multilevel metallization method for fabricating a metal oxide semiconductor device

An improved method is described of constructing a metal oxide semiconductor device having multiple layers of metal deposited by dc magnetron sputtering at low dc voltages and low substrate temperatures. The method provides multilevel interconnections and cross over between individual circuit elements in integrated circuits without significantly reducing the reliability or seriously affecting the yield.

Hollis, B. R., Jr.↗

NASA NTRS1983

The application of encapsulation material stability data to photovoltaic module life assessment

For any piece of hardware that degrades when subject to environmental and application stresses, the route or sequence that describes the degradation process may be summarized in terms of six key words: LOADS, RESPONSE, CHANGE, DAMAGE, FAILURE, and PENALTY. Applied to photovoltaic modules, these six factors form the core outline of an expanded failure analysis matrix for unifying and integrating relevant material degradation data and analyses. An important feature of this approach is the deliberate differentiation between factors such as CHANGE, DAMAGE, and FAILURE. The application of this outline to materials degradation research facilitates the distinction between quantifying material property changes and quantifying module damage or power loss with their economic consequences. The approach recommended for relating material stability data to photovoltaic module life is to use the degree of DAMAGE to (1) optical coupling, (2) encapsulant package integrity, (3) PV circuit integrity or (4) electrical isolation as the quantitative criterion for assessing module potential service life rather than simply using module power loss.

Coulbert, C. D.↗

NASA NTRS1985

Protective Cover for IC Packages

Aluminized plastic protects integrated circuits from static discharge. Snap-on cover shorts leads of integrated-circuit flatpack to prevent damage from electrostatic discharges during transport, installation, or other handling before final testing. Cover removed only during lead bending and testing.

Borden, T. J.↗

NASA NTRS1989

Integrated Semiconductor/Optical Information Processors

Optical information processors made of integrated three-dimensional devices which include optical, electro-optical, and electronic devices. Integration achieved by combination and extension of advanced semiconductor (integrated-circuit) and integrated-optics technology. In integrated device, spatial light modulator fabricated on surface of chip. Leads to miniaturization of sophisticated optical information-processing systems.

Cheng, Li-Jen↗

NASA NTRS1993

Microelectronic Chips For Radiation-Dose Tests

Custom-made single-chip complementary metal-oxide semiconductor (CMOS) integrated circuit designed to reveal effects of ionizing radiation on itself and similar integrated circuits. Potential terrestrial use: safety-oriented monitoring of ionizing radiation at nuclear powerplants, nuclear-waste sites, and the like.

Buehler, Martin G.↗

NASA NTRS1993

GaAs optoelectronic neuron arrays

A simple optoelectronic circuit integrated monolithically in GaAs to implement sigmoidal neuron responses is presented. The circuit integrates a light-emitting diode with one or two transistors and one or two photodetectors. The design considerations for building arrays with densities of up to 10,000/sq cm are discussed.

Lin, Steven↗

NASA NTRS2003

Advanced Ceramic Technology for Space Applications at NASA MSFC

The ceramic processing technology using conventional methods is applied to the making of the state-of-the-art ceramics known as smart ceramics or intelligent ceramics or electroceramics. The sol-gel and wet chemical processing routes are excluded in this investigation considering economic aspect and proportionate benefit of the resulting product. The use of ceramic ingredients in making coatings or devices employing vacuum coating unit is also excluded in this investigation. Based on the present information it is anticipated that the conventional processing methods provide identical performing ceramics when compared to that processed by the chemical routes. This is possible when sintering temperature, heating and cooling ramps, peak temperature (sintering temperature), soak-time (hold-time), etc. are considered as variable parameters. In addition, optional calcination step prior to the sintering operation remains as a vital variable parameter. These variable parameters constitute a sintering profile to obtain a sintered product. Also it is possible to obtain identical products for more than one sintering profile attributing to the calcination step in conjunction with the variables of the sintering profile. Overall, the state-of-the-art ceramic technology is evaluated for potential thermal and electrical insulation coatings, microelectronics and integrated circuits, discrete and integrated devices, etc. applications in the space program.

Alim, Mohammad A.↗

NASA NTRS2009

Tests of Low-Noise MMIC Amplifier Module at 290 to 340 GHz

A document presents data from tests of a low-noise amplifier module operating in the frequency range from 290 to 340 GHz said to be the highest-frequency low-noise, solid-state amplifier ever developed. The module comprised a three-stage monolithic microwave integrated circuit (MMIC) amplifier integrated with radial probe MMIC/waveguide transitions and contained in a compact waveguide package, all according to the concepts described in the immediately preceding article and in the referenced prior article, "Integrated Radial Probe Transition From MMIC to Waveguide" (NPO-43957), NASA Tech Briefs Vol. 31, No. 5 (May 2007), page 38. The tests included measurements by the Y-factor method, in which noise figures are measured repeatedly with an input noise source alternating between an "on" (hot-load) condition and an "off" (cold-load) condition. (The Y factor is defined as the ratio between the "on" and "off" noise power levels.) The test results showed that, among other things, the module exhibited a minimum noise figure of about 8.7 dB at 325 GHz and that the gain at that frequency under the bias conditions that produced the minimum noise figure was between about 9 and 10 dB.

Gaier, Todd↗

DOE OSTI2023

Method and apparatus for providing wear leveling

Exemplary embodiments provide wear spreading among die regions (i.e., one or more circuits) in an integrated circuit or among dies by using operating condition data in addition to or instead of environmental data such as temperature data, from each of a plurality of die regions. Control logic produces a cumulative amount of time each of the plurality of die regions has spent at an operating condition based on operating condition data wherein the operating condition data is based on at least one of the following operating characteristics: frequency of operation of the plurality of die regions, an operating voltage of the plurality of die regions, an activity level of the plurality of die regions, a timing margin of the plurality of die regions, and a number of detected faults of the plurality of die regions. The method and apparatus spreads wear among the plurality of same type of die regions by controlling task execution among the plurality of die regions using the die wear-out data.

Raasch, Steven↗

NASA NTRS1983

V-band integrated quadriphase modulator

A V-band integrated circuit quadriphase shift keyed modulator/exciter for space communications systems was developed. Intersatellite communications systems require direct modulation at 60 GHz to enhance signal processing capability. For most systems, particularly space applications, small and lightweight components are essential to alleviate severe system design constraints. Thus to achieve wideband, high data rate systems, direct modulation techniques at millimeter waves using solid state integrated circuit technology are an integral part of the overall technology developments.

Grote, A.↗

NASA NTRS1977

Open-loop digital frequency multiplier

Monostable multivibrator is implemented by using digital integrated circuits where multiplier constant is too large for conventional phase-locked-loop integrated circuit. A 400 Hz clock is generated by divide-by-N counter from 1 Hz timing reference.

Moore, R. C.↗

NASA NTRS1990

Performance of a 300 Mbps 1:16 serial/parallel optoelectronic receiver module

Optical interconnects are being considered for the high speed distribution of multiplexed control signals in GaAs monolithic microwave integrated circuit (MMIC) based phased array antennas. The performance of a hybrid GaAs optoelectronic integrated circuit (OEIC) is described, as well as its design and fabrication. The OEIC converts a 16-bit serial optical input to a 16 parallel line electrical output using an on-board 1:16 demultiplexer and operates at data rates as high as 30b Mbps. The performance characteristics and potential applications of the device are presented.

Richard, M. A.↗

NASA NTRS1992

Comparison of immersed liquid and air cooling of NASA's Airborne Information Management System

The Airborne Information Management System (AIMS) is currently under development at NASA Dryden Flight Research Facility. The AIMS is designed as a modular system utilizing surface mounted integrated circuits in a high-density configuration. To maintain the temperature of the integrated circuits within manufacturer's specifications, the modules are to be filled with Fluorinert FC-72. Unlike ground based liquid cooled computers, the extreme range of the ambient pressures experienced by the AIMS requires the FC-72 be contained in a closed system. This forces the latent heat absorbed during the boiling to be released during the condensation that must take within the closed module system. Natural convection and/or pumping carries the heat to the outer surface of the AIMS module where the heat transfers to the ambient air. This paper will present an evaluation of the relative effectiveness of immersed liquid cooling and air cooling of the Airborne Information Management System.

Hoadley, A. W.↗

NASA NTRS2003

Nanotubes May Break Through "Chip Wall"

In 1965, just four years after the first planar integrated circuit (IC) was discovered, Cordon Moore observed that the number of transistors per integrated circuit had grown exponentially. He predicted that this would continue, and the media soon began to call his prophesy "Moore's Law" For nearly forty years, Moore's Law has been validated by the technological progress achieved in the semiconductor industry. Now, however, industry experts are warning of a "Red Brick Wall" that may soon block the continued scaling predicted by by Moore's Law. The "red bricks" in the wall are those areas of technical challenge for which no known manufacturable solution exists. One such "brick" is the challenge of finding a new material and processing technology to replace the metals used today to interconnect transistors on a chip.

Laufenberg, Larry↗

NASA NTRSDate not supplied

High Temperature Devices for Aerospace Applications

This presentation will overview important new capabilities and benefits that next-generation higher temperature electronics promise for a variety of aerospace systems and missions. Initial aerospace infusions of higher temperature electronics to be discussed include jet engines and the prolonged robotic exploration of the Venus surface. Complete redesign of systems compared to prior conventional electronics practices would yield the most revolutionary benefits. However, the inherent higher risk and expense associated with new technology adoption will likely drive a more evolutionary technology infusion process, especially since flight qualification demands large safety margins and testing that ensures reliable operation for far longer than actual mission duration. SiC pn-junction based devices are inherently capable of the most durable operation at the highest application temperatures compared other transistor technologies, but such integrated circuits (ICs) will never achieve integration levels near today’s silicon ICs. Extreme temperature high-power devices will also be de-rated compared to room-temperature performance. While the high temperature market will always be small compared to the conventional temperature mass-market, compatibility and leveraging of existing foundry manufacturing is vital to the establishment of a sustainable high temperature electronics ecosystem sufficient to significantly improve aerospace systems.

High Temperature↗

DOE OSTI2023

Integrated silicon optical amplifier with reduced residual pump

An optical amplifier device employing a Mach-Zehnder Interferometer (MZI) that reduces the amount of residual pump power in the optical output of the amplifier is disclosed. The MZI amplifier employs two geometrically linear optical amplifier arms or two multi-spatial-mode racetrack optical amplifiers to amplify a signal with a pumping beam, with the signal output port having extremely low levels of residual pump power. The MZI optical amplifier is a silicon photonic integrated circuit, with all optical amplifiers, couplers, phase shifters, and optical attenuators formed of silicon photonic integrated circuit elements. The MZI optical amplifier may include one, two, or three MZI stages, and multiple MZI optical amplifiers may be used in parallel or sequentially to achieve higher overall signal gain or power. The MZI optical amplifier may employ Brillouin-scattering-based amplifiers, Raman-based integrated waveguide optical amplifiers, or Erbium-doped integrated waveguide optical amplifiers.

Lentine, Anthony L.↗

NASA NTRS1987

Measuring Conductor Widths and Spacings Electrically

Widths and spacings of conductor lines on integrated circuits measured electrically by split cross-bridge resistor technique. Speeds evaluation of integrated-circuit fabrication processes. When measurement of probe currents and voltages and reduction of measurement data automated, test structure probed and characterized in less than one second.

Buehler, Martin G.↗

NASA NTRS1991

Five-Segment Interconnection For Electromigration Tests

Proposed integrated-circuit conductive pattern intended for use in electromigration lifetime testing of interconnection lines of integrated circuits. Designed for collection of statistics on electromigration from smallest possible area. Includes 5 interconnection segments with Kelvin voltage taps, with total of 12 contact pads, and provides for simultaneous measurements on all of segments. Attempts to minimize thermal gradients within each segment and conforms to guidelines on electromigration test structures promulgated by National Institute of Standards and Technology (NIST).

Hannaman, David J.↗