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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.
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Semiconductor package has been developed for high power semiconductor devices that operate in the GHz-frequency range at several watts. Package includes stud, insulating ring, electrically conductive washer, insulating washer, braze ring, and cap. It is mechanically strong and can be used with variety of circuits.
The reliability of semiconductor devices as influenced by the reliability of wire bonds used in the assembly of the devices is investigated. The specific type of failure dealt with involves fracture of wire bonds as a result of repeated flexure of the wire at the heel of the bond when the devices are operated in an on-off mode. The mechanism of failure is one of induced fracture of the wire. To improve the reliability of a chosen transistor, one-mil diameter wires of aluminum with various alloy additions were studied using an accelerated fatigue testing machine. In addition, the electroprobe was used to study the metallurgy of the wires as to microstructure and kinetics of the growth of insoluble phases. Thermocompression and ultrasonic bonding techniques were also investigated.
The failure of wire bonds due to repeated flexure when semiconductor devices are operated in an on-off mode has been investigated. An accelerated fatigue testing apparatus was constructed and the major fatigue variables, aluminum alloy composition, and bonding mechanism, were tested. The data showed Al-1% Mg wires to exhibit superior fatigue characteristics compared to Al-1% Cu or Al-1% Si and ultrasonic bonding to be better than thermocompression bonding for fatigue resistance. Based on these results highly reliable devices were fabricated using Al-1% Mg wire with ultrasonic bonding which withstood 120,000 power cycles with no failures.
Research projects involving materials research conducted by various international test facilities are reported. Much of the materials research is classified in the following areas: (1) acousto-optic, acousto-electric, and ultrasonic research, (2) research for elucidating transport phenomena in well characterized oxides, (3) research in semiconductor materials and semiconductor devices, (4) the study of interfaces and interfacial phenomena, and (5) materials research relevant to natural resources. Descriptions of the individual research programs are listed alphabetically by the name of the author and show all personnel involved, resulting publications, and associated meeting speeches.
The accomplishments of a space projects research facility are presented. The subjects discussed are: (1) a study of radiation resistant semiconductor devices, (2) synthesis of high temperature organic lubricants, (3) departure from phase equilibrium during boiling transients, (4) effects of neutron irradiation on defect state in tungsten, and (5) determination of photon response function of NE-213 liquid scintillation detectors.
Matters pertaining to semiconductor device fabrication were studied in terms of the influence of gravity on the production of dislocations in silicon wafers during thermal cycling in a controlled ambient where no impurities are present and oxidation is minimal. Both n-type and p-type silicon wafers having a diameter of 1.25 in to 1.5 in, with fixed orientation and resistivity values, were used. The surface dislocation densities were measured quantitatively by the Sirtl etch technique. The results show two significant features of the plastic flow phenomenon as it is related to gravitational stress: (1) the density of dislocations generated during a given thermal cycle is directly related to the duration of the cycle; and (2) the duration of the thermal cycle required to produce a given dislocation density is inversely related to the equilibrium temperature. Analysis of the results indicates that gravitational stress is instrumental in process-induced defect generation.
This paper reports on a theoretical study of the limitations on silicon solar-cell efficiency for both n(+)-p and n(+)-p-p(+) type cells. Detailed calculations have been made of solar-cell operation using a general computer analysis program for semiconductor devices. The computer program, which simultaneously solves Poisson's equation and the electron and hole quasi-Fermi level equations, provides an accurate numerical solution of solar-cell operation without limiting assumptions or approximations. It is found that minority-carrier lifetime and heavy doping effects in the n(+) surface region present serious limitations to efficiency in low-resistivity silicon solar cells.
Photoresponse distribution measurement by scanning a light spot across the surface of a semiconductor device is examined. The technqiue is used for solar cell characterization because the measured quantity is the direct expression of the distribution of the desired performance of the device. An apparatus for measuring the photoresponse distribution was set and used in the development of polysilicon thin film solar cells. A schmeatic diagram of the apparatus and an example of measurement are shown.
Energetic particles can produce interstitial-vacancy pairs in a crystal by knocking the atoms from their normal positions. Detectors are unique among semiconductor devices in depending on very low concentrations of electrically active impurities, and also on efficient transport of holes and electrons over relatively large distances. Because the dense regions of damage produced by energetic particles may result in donors and/or acceptors, and also provide trapping sites for holes and electrons, detectors are very sensitive to radiation damage. In addition to these effects occurring within the detector, radiation may also change the characteristics of the exposed surfaces causing unpredictable effects on the detector leakage current. Radiation-induced surface degradation has rarely, if ever, been observed for germanium detectors. The possibility of minimizing hole trapping in charge collection by the use of a high-purity germanium coaxial detector configured with the p (+) contact on the coaxial periphery is discussed.
The effect of power and temperature stresses when applied to a variety of semiconductor devices is summarized.
Lightly doped semiconductor device, with transparent insulating layer based on capacitive response to radiant energy, exhibits excellent sensitivities at room temperature.
Vapor Growth technical of multilayered semiconductor devices based on elements in groups 3, 4, and 5 such as transmission photo cathodes and heterojunction lasers, reduces thermal decomposition and improves performance. In addition technique allows fabrication of GaP/GaAsP/InGaP, visable CW lasers through reduction of thermal decomposition.
Data were compiled for the purpose of evaluating the effect of power/temperature step stress when applied to a variety of semiconductor devices. The switching diode JANTX1N5554 is examined.
Data for the purpose of evaluating the effect of power/temperature step stress when applied to a variety of semiconductor devices are presented. The transistor JANTX2N3637 manufactured by Transitron and Motorola is studied. A total of 48 samples from Transitron and 41 samples from Motorola were submitted to the process. In addition, two control sample units were maintained for verification of the electrical parametric testing. Results are reported.
The effect of power/temperature step stress when applied to a variety of semiconductor devices was evaluated. Performance of the zener diode JANTX1N4570A manufactured by Siemens and Motorola is reported. A total of 48 samples from each manufacturer was submitted to the process outlined in Table 1. In addition, two control sample units were maintained for verification of the electrical parametric testing.
The effect of power/temperature step stress when applied to a variety of semiconductor devices is evaluated. A total of 48 samples were submitted to be processed. Control sample units were maintained for verification of the electrical parametric testing. The test circuit was used to power all of the test devices during the power/temperature stress conditions.
Large area, semiconductor crystals selected from group 3-5 compounds and alloys are provided for semiconductor device fabrication by the use of a selective etching operation which completely removes the substrate on which the desired crystal was deposited. The substrate, selected from the same group as the single crystal, has a higher solution rate than the epitaxial single crystal which is essentially unaffected by the etching solution. The preparation of gallium phosphide single crystals using a gallium arsenide substrate and a concentrated nitric acid etching solution is described.
Report describes effects of power and temperature overstress on Fairchild and National Semiconductor devices. 160 hour temperature stress was only test to cause notable damage. Loss of gain is principal failure mode.