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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 451 records · Page 25
All sourcesNASA NTRSDOE OSTI
NASA NTRS1979

Procedure for pressure contact on high-power semiconductor devices free of thermal fatigue

To eliminate thermal fatigue, a procedure for manufacturing semiconductor power devices with pure pressure contact without solid binding was developed. Pressure contact without the use of a solid binding to avoid a limitation of the maximum surface in the contact was examined. A silicon wafer covered with a relatively thick metal layer is imbedded with the aid of a soft silver foil between two identically sized hard contact discs (molybdenum or tungsten) which are rotationally symmetrical. The advantages of this concept are shown for large diameters. The pressure contact was tested successfully in many devices in a large variety of applications.

Knobloch, J.↗
NASA NTRS1980

Low cost solar array project: Experimental process system development unit for producing semiconductor-grade silicon using silane-to-silicon process

The design, fabrication, and installation of an experimental process system development unit (EPSDU) were analyzed. Supporting research and development were performed to provide an information data base usable for the EPSDU and for technological design and economical analysis for potential scale-up of the process. Iterative economic analyses were conducted for the estimated product cost for the production of semiconductor grade silicon in a facility capable of producing 1000-MT/Yr.

Source record↗
NASA NTRS1979

Semiconductor technology program. Progress briefs

The current status of NBS work on measurement technology for semiconductor materials, process control, and devices is reported. Results of both in-house and contract research are covered. Highlighted activities include modeling of diffusion processes, analysis of model spreading resistance data, and studies of resonance ionization spectroscopy, resistivity-dopant density relationships in p-type silicon, deep level measurements, photoresist sensitometry, random fault measurements, power MOSFET thermal characteristics, power transistor switching characteristics, and gross leak testing. New and selected on-going projects are described. Compilations of recent publications and publications in press are included.

Bullis, W. M.↗
NASA NTRS1980

Semiconductor technology program. Progress briefs

Measurement technology for semiconductor materials, process control, and devices is reviewed. Activities include: optical linewidth and thermal resistance measurements; device modeling; dopant density profiles; resonance ionization spectroscopy; and deep level measurements. Standardized oxide charge terminology is also described.

Bullis, W. M.↗
NASA NTRS1981

High power semiconductor lasers for deep space communications

The parameters of semiconductor lasers pertaining to their application as optical emitters are discussed. Several methods to overcome their basic disadvantage, which is the low level of powers they emit, are reviewed. Most of these methods are based on a coherent power combining of several lasers.

Katz, J.↗
NASA NTRS1981

Theory of active mode locking of a semiconductor laser in an external cavity

An analytical treatment is given for the active mode locking of a semiconductor laser in an external resonator. The width of the mode-locked pulses is obtained as a function of the laser and cavity parameters and the amount of frequency detuning. The effects of self-modulation and saturation are included in the treatment. The pulse output is compared with that obtained by a strong modulation of the laser diode with no external cavity.

Yeung, J. A.↗
NASA NTRS1981

Use of vacuum tubes in test instrumentation for measuring characteristics of fast high-voltage semiconductor devices

Circuits are described that permit measurement of fast events occurring in power semiconductors. These circuits were developed for the dynamic characterization of transistors used in inductive-load switching applications. Fast voltage clamping using vacuum diodes is discussed, and reference is made to a unique circuit that was built for performing nondestructive, reverse-bias, second-breakdown tests on transistors.

Berning, D.↗
NASA NTRS1981

Forming electrical interconnections through semiconductor wafers

An information processing system based on CMOS/SOS technology is being developed by NASA to process digital image data collected by satellites. An array of holes is laser drilled in a semiconductor wafer, and a conductor is formed in the holes to fabricate electrical interconnections through the wafers. Six techniques are used to form conductors in the silicon-on-sapphire (SOS) wafers, including capillary wetting, wedge extrusion, wire intersection, electroless plating, electroforming, double-sided sputtering and through-hole electroplating. The respective strengths and weaknesses of these techniques are discussed and compared, with double-sided sputtering and the through-hole plating method achieving best results. In addition, hollow conductors provided by the technique are available for solder refill, providing a natural way of forming an electrically connected stack of SOS wafers.

Anthony, T. R.↗
NASA NTRS1981

Metal-semiconductor interfacial reactions - Ni/Si system

X-ray photoelectron spectroscopy and channeling measurements with MeV He-4(+) ions have been used to probe the structure of the interface in the Ni/Si system. It is found that reactions occur where Ni is deposited on Si at 10 to the -10th torr: Si atoms are displaced from lattice sites, the Ni atoms are in an Si-rich environment, and the Ni/Si interface is graded in composition. Composition gradients are present at both interfaces in the Si/Ni2/Si/Ni system. For the Ni-Si system, cooling the substrate to 100 K slows down the reaction rate. The temperature dependence of the interfacial reactivity indicates the kinetic nature of metal-semiconductor interfaces.

Cheung, N. W.↗
NASA NTRS1981

Flat-plate solar array project: Experimental process system development unit for producing semiconductor-grade silicon using the silane-to-silicon process

The engineering design, fabrication, assembly, operation, economic analysis, and process support research and development for an Experimental Process System Development Unit for producing semiconductor-grade silicon using the slane-to-silicon process are reported. The design activity was completed. About 95% of purchased equipment was received. The draft of the operations manual was about 50% complete and the design of the free-space system continued. The system using silicon power transfer, melting, and shotting on a psuedocontinuous basis was demonstrated.

Source record↗
NASA NTRS1981

Chemical modification of semiconductor surfaces

Results of research on the chemical modification of TiO2 powders in the gas phase and the examination of the modified powders by infrared absorption spectroscopy are comprehensively summarized. The range of information obtainable by IR spectroscopy of chemically modified semiconductors, and a definition of the optimum reaction conditions for synthesizing a monolayer of methylsilanes using vapor phase reaction conditions were considered.

Finklea, H. O.↗
NASA NTRS1981

Investigation of semiconductor clad optical waveguides

The properties of semiconductor-clad optical waveguides based on glass substrates were investigated. Computer modeling studies on four-layer silicon-clad planar dielectric waveguides indicated that the attenuation and mode index should behave as exponentially damped sinusoids as the silicon thickness is decreased below one micrometer. This effect can be explained as a periodic coupling between the guided modes of the lossless structure and the lossy modes supported by the high refractive index silicon. The computer studies also show that both the attenuation and mode index of the propagating mode are significantly altered by conductivity charges in the silicon. Silicon claddings were RF sputtered onto AgNO3-NaNO3 ion exchanged waveguides and preliminary measurements of attenuation were made. An expression was developed which predicts the attenuation of the silicon clad waveguide from the attenuation and phase characteristics of a silicon waveguide. Several applications of these clad waveguides are suggested and methods for increasing the photo response of the RF sputtered silicon films are described.

Batchman, T. E.↗
NASA NTRS1981

Amorphous metallizations for high-temperature semiconductor device applications

The initial results of work on a class of semiconductor metallizations which appear to hold promise as primary metallizations and diffusion barriers for high temperature device applications are presented. These metallizations consist of sputter-deposited films of high T sub g amorphous-metal alloys which (primarily because of the absence of grain boundaries) exhibit exceptionally good corrosion-resistance and low diffusion coefficients. Amorphous films of the alloys Ni-Nb, Ni-Mo, W-Si, and Mo-Si were deposited on Si, GaAs, GaP, and various insulating substrates. The films adhere extremely well to the substrates and remain amorphous during thermal cycling to at least 500 C. Rutherford backscattering and Auger electron spectroscopy measurements indicate atomic diffussivities in the 10 to the -19th power sq cm/S range at 450 C.

Wiley, J. D.↗
NASA NTRS1981

High-temperature Complementary Metal Oxide Semiconductors (CMOS)

The results of an investigation into the possibility of using complementary metal oxide semiconductor (CMOS) technology for high temperature electronics are presented. A CMOS test chip was specifically developed as the test bed. This test chip incorporates CMOS transistors that have no gate protection diodes; these diodes are the major cause of leakage in commercial devices.

Mcbrayer, J. D.↗
NASA NTRS1982

Automated semiconductor vacuum chemical vapor deposition facility

A semiconductor vacuum chemical vapor deposition facility (totally automatic) was developed. Wafers arrived on an air track, automatically loaded into a furnace tube, processed, returned to the track, and sent on to the next operation. The entire process was controlled by a computer.

Source record↗
NASA NTRS1982

Automated semiconductor diffusion and oxidation facility

A semiconductor diffusion and oxidation facility (totally automated) was developed. Wafers arrived on an air track, automatically loaded into a furnace tube, processed, returned to track, and sent on to the next process. The entire process was controlled by a computer.

Source record↗
NASA NTRS1982

Phase control and beam steering of semiconductor laser arrays

The operational principles and a possible device configuration of one dimensional monolithically integrated semiconductor laser arrays are described. The output beam of the array can be electronically steered. Devices of the type can find applications in optical communication systems where the power levels needed are above the capability of a single laser device.

Katz, J.↗
NASA NTRS1981

Semiconductor technology program: Progress briefs

Measurement technology for semiconductor materials, process control, and devices, is discussed. Silicon and silicon based devices are emphasized. Highlighted activities include semiinsulating GaAs characterization, an automatic scanning spectroscopic ellipsometer, linewidth measurement and coherence, bandgap narrowing effects in silicon, the evaluation of electrical linewidth uniformity, and arsenicomplanted profiles in silicon.

Galloway, K. F.↗