Engineering topics

Neudeck, Philip G.

Publications and source records attributed to Neudeck, Philip G..

At least 73 records · Page 4

NASA NTRS2008

Prolonged 500 C Operation of 6H-SiC JFET Integrated Circuitry

This paper updates the long-term 500 C electrical testing results from 6H-SiC junction field effect transistors (JFETs) and small integrated circuits that were introduced at ICSCRM-2007. Two packaged JFETs have now been operated in excess of 7000 hours at 500 degC with less than 10% degradation in linear I-V characteristics. Several simple digital and analog demonstration integrated circuits successfully operated for 2000-6500 hours at 500 C before failure.

Neudeck, Philip G.↗

NASA NTRS2008

6H-SiC Transistor Integrated Circuits Demonstrating Prolonged Operation at 500 C

The NASA Glenn Research Center is developing very high temperature semiconductor integrated circuits (ICs) for use in the hot sections of aircraft engines and for Venus exploration where ambient temperatures are well above the approximately 300 degrees Centigrade effective limit of silicon-on-insulator IC technology. In order for beneficial technology insertion to occur, such transistor ICs must be capable of prolonged operation in such harsh environments. This paper reports on the fabrication and long-term 500 degrees Centigrade operation of 6H-SiC integrated circuits based on epitaxial 6H-SiC junction field effect transistors (JFETs). Simple analog amplifier and digital logic gate ICs have now demonstrated thousands of hours of continuous 500 degrees Centigrade operation in oxidizing air atmosphere with minimal changes in relevant electrical parameters. Electrical characterization and modeling of transistors and circuits at temperatures from 24 degrees Centigrade to 500 degrees Centigrade is also described. Desired analog and digital IC functionality spanning this temperature range was demonstrated without changing the input signals or power supply voltages.

Neudeck, Philip G.↗

NASA NTRS2008

Stable Electrical Operation of 6H-SiC JFETs and ICs for Thousands of Hours at 500 C

The fabrication and testing of the first semiconductor transistors and small-scale integrated circuits (ICs) to achieve up to 3000 h of stable electrical operation at 500 C in air ambient is reported. These devices are based on an epitaxial 6H-SiC junction field-effect transistor process that successfully integrated high temperature ohmic contacts, dielectric passivation, and ceramic packaging. Important device and circuit parameters exhibited less than 10% of change over the course of the 500 C operational testing. These results establish a new technology foundation for realizing durable 500 C ICs for combustion-engine sensing and control, deep-well drilling, and other harsh-environment applications.

Neudeck, Philip G.↗

NASA NTRS2008

Long-Term Characterization of 6H-SiC Transistor Integrated Circuit Technology Operating at 500 C

NASA has been developing very high temperature semiconductor integrated circuits for use in the hot sections of aircraft engines and for Venus exploration. This paper reports on long-term 500 C electrical operation of prototype 6H-SiC integrated circuits based on epitaxial 6H-SiC junction field effect transistors (JFETs). As of this writing, some devices have surpassed 4000 hours of continuous 500 C electrical operation in oxidizing air atmosphere with minimal change in relevant electrical parameters.

Neudeck, Philip G.↗

NASA NTRS2007

Hydrogen Gas Sensors Fabricated on Atomically Flat 4H-SiC Webbed Cantilevers

This paper reports on initial results from the first device tested of a "second generation" Pt-SiC Schottky diode hydrogen gas sensor that: 1) resides on the top of atomically flat 4H-SiC webbed cantilevers, 2) has integrated heater resistor, and 3) is bonded and packaged. With proper selection of heater resistor and sensor diode biases, rapid detection of H2 down to concentrations of 20 ppm was achieved. A stable sensor current gain of 125 +/- 11 standard deviation was demonstrated during 250 hours of cyclic test exposures to 0.5% H2 and N2/air.

Neudeck, Philip G.↗

NASA NTRS2007

An Overview of Wide Bandgap Silicon Carbide Sensors and Electronics Development at NASA Glenn Research Center

A brief overview is presented of the sensors and electronics development work ongoing at NASA Glenn Research Center which is intended to meet the needs of future aerospace applications. Three major technology areas are discussed: 1) high temperature SiC electronics, 2) SiC gas sensor technology development, and 3) packaging of harsh environment devices. Highlights of this work include world-record operation of SiC electronic devices including 500?C JFET transistor operation with excellent properties, atomically flat SiC gas sensors integrated with an on-chip temperature detector/heater, and operation of a packaged AC amplifier. A description of the state-of-the-art is given for each topic. It is concluded that significant progress has been made and that given recent advancements the development of high temperature smart sensors is envisioned.

Hunter, Gary W.↗

NASA NTRS2006

Silicon Carbide Technology

Silicon carbide based semiconductor electronic devices and circuits are presently being developed for use in high-temperature, high-power, and high-radiation conditions under which conventional semiconductors cannot adequately perform. Silicon carbide's ability to function under such extreme conditions is expected to enable significant improvements to a far-ranging variety of applications and systems. These range from greatly improved high-voltage switching for energy savings in public electric power distribution and electric motor drives to more powerful microwave electronics for radar and communications to sensors and controls for cleaner-burning more fuel-efficient jet aircraft and automobile engines. In the particular area of power devices, theoretical appraisals have indicated that SiC power MOSFET's and diode rectifiers would operate over higher voltage and temperature ranges, have superior switching characteristics, and yet have die sizes nearly 20 times smaller than correspondingly rated silicon-based devices [8]. However, these tremendous theoretical advantages have yet to be widely realized in commercially available SiC devices, primarily owing to the fact that SiC's relatively immature crystal growth and device fabrication technologies are not yet sufficiently developed to the degree required for reliable incorporation into most electronic systems. This chapter briefly surveys the SiC semiconductor electronics technology. In particular, the differences (both good and bad) between SiC electronics technology and the well-known silicon VLSI technology are highlighted. Projected performance benefits of SiC electronics are highlighted for several large-scale applications. Key crystal growth and device-fabrication issues that presently limit the performance and capability of high-temperature and high-power SiC electronics are identified.

Neudeck, Philip G.↗

NASA NTRS2006

SiC Field Effect Transistor Technology Demonstrating Prolonged Stable Operation at 500 C

While there have been numerous reports of short-term transistor operation at 500 degree C or above, these devices have previously not demonstrated sufficient long-term operational durability at 500 degree C to be considered viable for most envisioned applications. This paper reports the development of Silicone Carbi field effect transistors capable of long-term electrical operation at 500 degree C. A 6H-SiC MESFET was packaged and subjected to continuous electrical operation while residing in a 500 degree C oven in oxidizing air atmosphere for over 2400 hours. The transistor gain, saturation current (IDSS), and on-resistance (RDS) changed by less than 20% from initial values throughout the duration of the biased 500 degree C test. Another high-temperature packaged 6H-SiC MESFET was employed to form a simple one-stage high-temperature low-frequency voltage amplifier. This single-stage common-source amplifier demonstrated stable continuous electrical operation (negligible changes to gain and operating biases) for over 600 hours while residing in a 500 degree C air ambient oven. In both cases, increased leakage from annealing of the Schottky gate-to-channel diode was the dominant transistor degradation mechanism that limited the duration of 500 degree C electrical operation.

Neudeck, Philip G.↗

NASA NTRS2006

CFD Growth of 3C-SiC on 4H/6H Mesas

This article describes growth and characterization of the highest quality reproducible 3C-SiC heteroepitaxial films ever reported. By properly nucleating 3C-SiC growth on top of perfectly on-axis (0001) 4H-SiC mesa surfaces completely free of atomic scale steps and extended defects, growth of 3C-SiC mesa heterofilms completely free of extended crystal defects can be achieved. In contrast, nucleation and growth of 3C-SiC mesa heterofilms on top of 4H-SiC mesas with atomic-scale steps always results in numerous observable dislocations threading through the 3C-SiC epilayer. High-resolution X-ray diffraction and transmission electron microscopy measurements indicate non-trivial in-plane lattice mismatch between the 3C and 4H layers. This mismatch is somewhat relieved in the step-free mesa case via misfit dislocations confined to the 3C/4H interfacial region without dislocations threading into the overlying 3C-SiC layer. These results indicate that the presence or absence of steps at the 3C/4H heteroepitaxial interface critically impacts the quality, defect structure, and relaxation mechanisms of single-crystal heteroepitaxial 3C-SiC films.

Neudeck, Philip G.↗

NASA NTRS2006

Recent Results from Epitaxial Growth on Step Free 4H-SiC Mesas

This paper updates recent progress made in growth, characterization, and understanding of high quality homoepitaxial and heteroepitaxial films grown on step-free 4H-SiC mesas. First, we report initial achievement of step-free 4H-SiC surfaces with carbon-face surface polarity. Next, we will describe further observations of how step-free 4H-SiC thin lateral cantilever evolution is significantly impacted by crystal faceting behavior that imposes non-uniform film thickness on cantilever undersides. Finally, recent investigations of in-plane lattice constant mismatch strain relief mechanisms observed for heteroepitaxial growth of 3C-SiC as well as 2H-AlN/GaN heterofilms on step-free 4H-SiC mesas will be reviewed. In both cases, the complete elimination of atomic heterointerface steps on the mesa structure enables uniquely well-ordered misfit dislocation arrays to form near the heterointerfaces with remarkable lack of dislocations threading vertically into the heteroepilayers. In the case of 3C-SiC heterofilms, it has been proposed that dislocation half-loops nucleate at mesa edges and glide laterally along the step-free 3C/4H interfaces. In contrast, 3C-SiC and 2H-AlN/GaN heterofilms grown on 4H-SiC mesas with steps exhibit highly disordered interface misfit dislocation structure coupled with 100X greater density of dislocations threading through the thickness of the heteroepilayers. These results indicate that the presence of steps at the heteroepitaxial interface (i.e., on the initial heteroepitaxial nucleation surface) plays a highly important role in the defect structure, quality, and relaxation mechanisms of single-crystal heteroepitaxial films.

Neudeck, Philip G.↗

NASA NTRS2005

Measurements of Breakdown Field and Forward Current Stability in 3C-SiC P-N Junction Diodes Grown on Step-Free 4H-SiC

This paper reports on initial fabrication and electrical characterization of 3C-SiC p-n junction diodes grown on step-free 4H-SiC mesas. Diodes with n-blocking-layer doping ranging from approx. 2 x 10(exp 16)/cu cm to approx.. 5 x 10(exp 17)/cu cm were fabricated and tested. No optimization of junction edge termination or ohmic contacts was employed. Room temperature reverse characteristics of the best devices show excellent low-leakage behavior, below previous 3C-SiC devices produced by other growth techniques, until the onset of a sharp breakdown knee. The resulting estimated breakdown field of 3C-SiC is at least twice the breakdown field of silicon, but is only around half the breakdown field of <0001> 4H-SiC for the doping range studied. Initial high current stressing of 3C diodes at 100 A/sq cm for more than 20 hours resulted in less than 50 mV change in approx. 3 V forward voltage. 3C-SiC, pn junction, p+n diode, rectifier, reverse breakdown, breakdown field,heteroepitaxy, epitaxial growth, electroluminescence, mesa, bipolar diode

Neudeck, Philip G.↗

NASA NTRS2004

Step Structures Produced by Hydrogen Etching of Initially Step-Free (0001) 4H-SiC Mesas

This paper presents new observations resulting from in-situ high temperature hydrogen etching of 4H-SiC mesas that were step-free prior to initiation of etching. In particular, it was found that well-ordered pyramidal-shaped step train structures could be produced on mesa top surfaces via stepflow etching proceeding inward from the sides of mesas. In many cases, the height of steps etched inward from {112 0} mesa sides is 0.5 nm (2 Si-C bilayers), while the height of steps etched inward from {11 00} sides of the same mesa is 1.0 nm (4 Si-C bilayers, the repeat distance of the 4H-SiC polytype). We propose that stepflow etching starting from the mesa sidewall and involving step-to-step repulsive forces produces the observed step train structures.

Powell, J. Anthony↗

NASA NTRS2004

Web Growth Used to Confine Screw Dislocations to Predetermined Lateral Positions in 4H-SiC Epilayers

Silicon-carbide- (SiC-) based power devices could enable substantial aerospace electronics benefits over today's silicon-based electronics. However, present-day SiC wafers contain electrically harmful dislocations (including micropipes) that are unpredictably distributed in high densities across all commercial 4H- and 6H-SiC wafers. The NASA Glenn Research Center recently demonstrated a crystal growth process that moves SiC wafer dislocations to predetermined lateral positions in epitaxial layers so that they can be reproducibly avoided during subsequent SiC electronic device fabrication. The process starts by reactive ion etching mesa patterns with enclosed trench regions into commercial on-axis (0001) 4H- or 6H-SiC substrates. An example of a pregrowth mesa geometry with six enclosed triangular-shaped trench regions is shown. After the etch mask is stripped, homoepitaxial growth is carried out in pure stepflow conditions that enable thin cantilevers to grow laterally from the tops of mesas whose pregrowth top surfaces are not threaded by substrate screw dislocations. The image in the bottom figure shows the postgrowth structure that forms after the lateral cantilevers expand to coalesce and completely roof over each of the six triangular trench regions. Atomic force microscope (AFM) measurements of the roof revealed that three elementary screw dislocation growth spirals, each shown in the AFM insets of the bottom image on the previous page, formed in the film roof at three respective points of cantilever film coalescence. The image above shows the structure following an etch in molten potassium hydroxide (KOH) that produced surface etch pits at the dislocation defects. The larger KOH etch pits--S1, S2, and S3--shown in this image correspond to screw dislocations relocated to the final points of cantilever coalescence. The smaller KOH etch pits are consistent with epilayer threading edge dislocations from the pregrowth substrate mesa (P1, P3, and P4) and a final cantilever coalescence point (P2). No defects (i.e., no etch pits) are observed in other cantilevered portions of the film surface. On the basis of the principle of dislocation Burgers vector conservation, we hypothesize that all vertically propagating substrate dislocations in an enclosed trench region become combined into a single dislocation in the webbed film roof at the point of final roof coalescence. The point of final roof coalescence, and therefore the lateral location of a webbed roof dislocation, can be designed into the pregrowth mesa pattern. Screw dislocations with predetermined lateral positions can then be used to provide the new growth steps necessary for growing a 4H/6H-SiC epilayer with a lower dislocation density than the substrate. Devices fabricated on top of such films can be positioned to avoid the preplaced dislocations.

Powell, J. Anthony↗

NASA NTRS2004

Atomic Force Microscope Observation of Growth and Defects on As-Grown (111) 3C-SiC Mesa Surfaces

This paper presents experimental atomic force microscope (AFM) observations of the surface morphology of as-grown (111) silicon-face 3C-SiC mesa heterofilms. Wide variations in 3C surface step structure are observed as a function of film growth conditions and film defect content. The vast majority of as-grown 3C-SiC surfaces consisted of trains of single bilayer height (0.25 nm) steps. Macrostep formation (i.e., step-bunching) was rarely observed, and then only on mesa heterofilms with extended crystal defects. As supersaturation is lowered by decreasing precursor concentration, terrace nucleation on the top (111) surface becomes suppressed, sometimes enabling the formation of thin 3C-SiC film surfaces completely free of steps. For thicker films, propagation of steps inward from mesa edges is sometimes observed, suggesting that enlarging 3C mesa sidewall facets begin to play an increasingly important role in film growth. The AFM observation of stacking faults (SF's) and 0.25 nm Burgers vector screw component growth spirals on the as-grown surface of defective 3C films is reported.

Neudeck, Philip G.↗

NASA NTRS2004

Reproducible Growth of High-Quality Cubic-SiC Layers

Semiconductor electronic devices and circuits based on silicon carbide (SiC) are being developed for use in high-temperature, high-power, and/or high-radiation conditions under which devices made from conventional semiconductors cannot adequately perform. The ability of SiC-based devices to function under such extreme conditions is expected to enable significant improvements in a variety of applications and systems. These include greatly improved high-voltage switching for saving energy in public electric power distribution and electric motor drives; more powerful microwave electronic circuits for radar and communications; and sensors and controls for cleaner-burning, more fuel-efficient jet aircraft and automobile engines.

Neudeck, Philip G.↗

NASA NTRS2004

2.45 GHz Rectenna Designed for Wireless Sensors Operating at 500 C

High temperature wireless sensors that operate at 500 C are required for aircraft engine monitoring and performance improvement These sensors would replace currently used hard-wired sensors and lead to a substantial reduction in mass. However, even if the sensor output data is transmitted wirelessly to a receiver in the cooler part of the engine, and the associated cables are eliminated, DC power cables are still required to operate the sensors and power the wireless circuits. To solve this problem, NASA is developing a rectenna, a circuit that receives RF power and converts it to DC power. The rectenna would be integrated with the wireless sensor, and the RF transmitter that powers the rectenna would be located in the cooler part of the engine. In this way, no cables to or from the sensors are required. Rectennas haw been demonstrated at ambient room temperature, but to date, no high temperature rectennas haw been reported. In this paper, we report the first rectenna designed for 2.45 GHz operation at 500 C. The circuit consists of a microstrip dipole antenna, a stripline impedance matching circuit, and a stripline low pass filter to prevent transmission of higher harmonics created by the rectifying diode fabricated on an Alumina substrate. The rectifying diode is the gate to source junction of a 6H Sic MESFET and the capacitor and load resistor are chip elements that are each bonded to the Alumina substrate. Each element and the hybrid, rectenna circuit haw been characterized through 500 C.

Ponchak, George E.↗

NASA NTRS2004

Homoepitaxial and Heteroepitaxial Growth on Step-Free SiC Mesas

This article describes the initial discovery and development of new approaches to SiC homoepitaxial and heteroepitaxial growth. These approaches are based upon the previously unanticipated ability to effectively supress two-dimensional nucleation of 3C-SiC on large basal plane terraces that form between growth steps when epitaxy is carried out on 4H- and 6H-SiC nearly on-axis substrates. After subdividing the growth surface into mesa regions, pure stepflow homoeptixay with no terrace nucleation was then used to grow all existing surface steps off the edges of screw-dislocation-free mesas, leaving behind perfectly on-axis (0001) basal plane mesa surfaces completely free of atomic-scale steps. Step-free mesa surfaces as large as 0.4 mm x 0.4 mm were experimentally realized, with the yield and size of step-free mesas being initally limited by substrate screw dislocations. Continued epitaxial growth following step-free surface formation leads to the formation of thin lateral cantilevers that extend the step-free surface area from the top edge of the mesa sidewalls. By selecting a proper pre-growth mesa shape and crystallographic orientation, the rate of cantilever growth can be greatly enhanced in a web growth process that has been used to (1) enlarge step-free surface areas and (2) overgrow and laterally relocate micropipes and screw dislocations. A new growth process, named step-free surface heteroepitaxy, has been developed to achieve 3C-SiC films on 4H- and 6H-SiC substrate mesas completely free of double positioning boundary and stacking fault defects. The process is based upon the controlled terrace nucleation and lateral expansion of a single island of 3C-SiC across a step-free mesa surface. Experimental results indicate that substrateepilayer lattice mismatch is at least partially relieved parallel to the interface without dislocations that undesirably thread through the thickness of the epilayer. These results should enable realization of improved SiC homojunction and heterojunction devices. In addition, these experiments offer important insights into the nature of polytypism during SiC crystal growth.

Neudeck, Philip G.↗

NASA NTRS2003

Improved Silicon Carbide Crystals Grown From Atomically Flat Surfaces

The NASA Glenn Research Center is demonstrating that atomically flat (i.e., step-free) silicon carbide (SiC) surfaces are ideal for realizing greatly improved wide bandgap semiconductor films with lower crystal defect densities. Further development of these improved films could eventually enable harsh-environment electronics beneficial to jet engine and other aerospace and automotive applications, as well as much more efficient and compact power distribution and control. The technique demonstrated could also improve blue-light lasers and light-emitting-diode displays.

Neudeck, Philip G.↗