Engineering Papers⌕ Search

Engineering topics

LaBel, Kenneth A.

Publications and source records attributed to LaBel, Kenneth A..

At least 109 records · Page 6

Effects of Ion Atomic Number on Single-Event Gate Rupture (SEGR) Susceptibility of Power MOSFETs

The relative importance of heavy-ion interaction with the oxide, charge ionized in the epilayer, and charge ionized in the drain substrate, on the bias for SEGR failure in vertical power MOSFETs is experimentally investigated. The results indicate that both the charge ionized in the epilayer and the ion atomic number are important parameters of SEGR failure. Implications on SEGR hardness assurance are discussed.

Lauenstein, Jean-Marie↗

Single Event Effect (SEE) Test Planning 101

This is a course on SEE Test Plan development. It is an introductory discussion of the items that go into planning an SEE test that should complement the SEE test methodology used. Material will only cover heavy ion SEE testing and not proton, LASER, or other though many of the discussed items may be applicable. While standards and guidelines for how-to perform single event effects (SEE) testing have existed almost since the first cyclotron testing, guidance on the development of SEE test plans has not been as easy to find. In this section of the short course, we attempt to rectify this lack. We consider the approach outlined here as a "living" document: mission specific constraints and new technology related issues always need to be taken into account. We note that we will use the term "test planning" in the context of those items being included in a test plan.

LaBel, Kenneth A.↗

Probing the SEB Sensitive Depth of a Power MOSFET Using a Two-Photon Absorption Laser Method

This paper presents two-photon absorption test results on an engineering single-event burnout- (SEB-) sensitive power MOSFET to verify that the energy deposition/charge ionization in the highly-doped substrate does not contribute to SEB. It is shown that for a vertical power MOSFET, the SEB sensitive volume is the lightly doped epitaxial layer; the most sensitive region is under the polysllicon gate.

Lauenstein, Jean-Marie↗

NASA Presentation to TechAmerica G12 Committee

This slide presentation reviews some of the actions that NASA is taking to address the issue of counterfeit electronic parts. While the emphasis is on electronic parts, the vision is broad enough to include materials and software. The effort includes coordination with other agencies, to identify and with the Government-Industry Data Exchange Program (GIDEP). An interim GIDEP Policy for suspected counterfeits was instituted. NASA's recommendation to the policy was for identification of the supplier and suggests allowing access to that information by government only. The issues with the General MIL specification, the testing requirements for radiation issues, the continuing development of Class Y standards for electronic equipment, status of package case isolation tests needed for 750 and 883,enhancement of 750 Internal Visual Inspection are reviewed. Further issues with consistent ESD control conditions across commodities, test methods, humidity limits, etc are briefly reviewed. The cost benefit analysis of film versus Real time radiography are also reviewed.

LaBel, Kenneth A.↗

System on a Chip (SoC) Overview

System-on-a-chip or system on chip (SoC or SOC) refers to integrating all components of a computer or other electronic system into a single integrated circuit (chip). It may contain digital, analog, mixed-signal, and often radio-frequency functions all on a single chip substrate. Complexity drives it all: Radiation tolerance and testability are challenges for fault isolation, propagation, and validation. Bigger single silicon die than flown before and technology is scaling below 90nm (new qual methods). Packages have changed and are bigger and more difficult to inspect, test, and understand. Add in embedded passives. Material interfaces are more complex (underfills, processing). New rules for board layouts. Mechanical and thermal designs, etc.

LaBel, Kenneth A.↗

Nonvolatile Memory Technology for Space Applications

This slide presentation reviews several forms of nonvolatile memory for use in space applications. The intent is to: (1) Determine inherent radiation tolerance and sensitivities, (2) Identify challenges for future radiation hardening efforts, (3) Investigate new failure modes and effects, and technology modeling programs. Testing includes total dose, single event (proton, laser, heavy ion), and proton damage (where appropriate). Test vehicles are expected to be a variety of non-volatile memory devices as available including Flash (NAND and NOR), Charge Trap, Nanocrystal Flash, Magnetic Memory (MRAM), Phase Change--Chalcogenide, (CRAM), Ferroelectric (FRAM), CNT, and Resistive RAM.

Oldham, Timothy R.↗

Memory Overview - Technologies and Needs

As NASA has evolved it's usage of spaceflight computing, memory applications have followed as well. In this talk, we will discuss the history of NASA's memories from magnetic core and tape recorders to current semiconductor approaches. We will briefly describe current functional memory usage in NASA space systems followed by a description of potential radiation-induced failure modes along with considerations for reliable system design.

LaBel, Kenneth A.↗

Memories and NASA Spacecraft: A Description of Memories, Radiation Failure Modes, and System Design Considerations

As NASA has evolved it's usage of spaceflight computing, memory applications have followed as well. In this slide presentation, the history of NASA's memories from magnetic core and tape recorders to current semiconductor approaches is discussed. There is a brief description of current functional memory usage in NASA space systems followed by a description of potential radiation-induced failure modes along with considerations for reliable system design.

LaBel, Kenneth A.↗