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At least 19 records
All sourcesNASA NTRSDOE OSTI
DOE OSTI2024

Stacked-Die SiC Half-Bridge Module with Minimum Loop Inductance

Minimizing parasitic inductance of power modules is needed to advance their electrical performance. Innovation in the past decade has driven down the inductance of SiC half-bridge power modules to around 1–2 nH by using multilayer, embedded, and hybrid structures. Further reduction becomes difficult, mainly limited by the excessive interconnects required for the planar placement of vertical conducting chips. To address this, a vertically stacked-die approach is proposed in this paper, taking advantage of the vertical conducting nature of the SiC chips. With ceramic decoupling capacitors integrated, 0.48 nH overall loop inductance is achieved and validated by experimental measurement. This paper also discusses potential approaches to further reduce the inductance.

Ribeiro, Pedro↗
DOE OSTI2024

Heterogeneous Integration Technologies for High-temperature, High-density, Low-profile Power Modules of Wide Bandgap Devices in Electric Drive Applications (Final Technical Report)

The goal of this project is to develop packaging technologies for making high-temperature, high-density, and low-profile wide-bandgap (WBG) power electronics modules for electric drives. These modules are aimed at enabling the DOE’s University Consortium to reach its 2025 inverter targets of ≥ 100 kW/L and ≤ 2.7 $/kW. The specific objectives are to: design and fabricate SiC half-bridge power modules with double-sided cooling and parasitic inductances < 5 nH, heat flux density > 400 W/cm 2 , and working junction temperature of 200 o C; design, fabricate, and deliver a gate driver with double-sided cooled modules for the construction of a 100 kW/L inverter at Oak Ridge National Lab; and design and prototype intelligent gate drivers with integrated current sensor and a low-profile DC-DC power supply with air-core transformer for testing power modules at 200 o C junction temperature. We followed an iterative technical approach of design, simulation, fabrication, and testing of various versions of modules, current sensors, and power supply. The state-of-the-art silicon carbide devices rated at 1.2 kV and 149 A were packaged by sintered-silver bonding on an aluminum nitride direct-bond-copper substrate for high thermal conductivity, high working temperature, and high joint reliability. Porous silver posts were used to interconnect the device’s source pads to the other direct-bond-copper substrate for low mechanical stresses, ease of manufacturing, and double-sided cooling. A current sensor based on package parasitic inductance was developed to measure switching current. A dynamic feedback scheme was developed to compensate the effect of parasitic resistance and temperature variation. A constant-current class-E dc-dc converter with air-core transformer was developed. Air-core transformer was used due to the unavailability of magnetic core at high temperatures. Gate driver and power supply were integrated with the double-side cooled, high temperature SiC power modules for testing the modules at 200 o C junction temperature. Double-pulse and continuous testing of the integrated technologies validated the design and fabrication of the three component technologies. Throughout the project, we overcame the challenge for design verification caused by low prototyping yield, which then helped train the graduate students, the future workforce, to learn the engineering know-how for low-cost manufacturing of reliable products. Below is a summary of the major accomplishments of this project: development of a prototyping process for fabricating double-side cooled (1200 V, 149 A) SiC phase-leg modules capable of working to 200 o C Tj; simulation and experimental verification of the improvement of thermo-mechanical reliability of the double-side cooled SiC phase-leg module by using rigid encapsulant; design and experimental validation of a current sensor based on package parasitic inductance and a compensation solution for eliminating the effect of parasitic resistance; design and experimental validation of a low-profile power supply with six-output air-core transformer for gate driver; functional demonstration of a SiC phase-leg module integrated with its gate driver, current sensor, and an air-core power supply at 200 o C Tj in a double-pulse switching test setup and Buck converter continuous test setup; successful completion of six PhD and two MS students who are or will work at Apple Inc., Tesla Inc., Wolfspeed Inc., Microchip Inc., Monolithic Power Systems Inc., and LG Magna Inc.

32 ENERGY CONSERVATION, CONSUMPTION, AND UTILIZATI↗
DOE OSTI2024

An Organic, Direct Bonded Copper, Multi-Layered, Ultra-Low Inductance Package for High-Power UWBG MOSFETs

The most common metalized substrates used in high-power switching packages consist of a ceramic layer such as Aluminum Nitride (AlN) sandwiched between two copper layers. Ceramic substrates are used because it has the key characteristic of having high dielectric strength while being thermally conductive. A large drawback to ceramic substrates is that they do not allow for a multi-layered circuit design. By replacing the traditional ceramic substrate with organic direct bonded copper (ODBC) we can open a wide range of possibilities when it comes to power module layout such as multi-layered circuits and double-sided cooling. Both benefits are critical while packaging high-performance Gallium Oxide (Ga2O3) MOSFETs. Because of Ga2O3's relatively poor thermal conductivity, a double-sided cooled package becomes necessary. Therefore, the use of ODBC provides the flexibility to fabricate copper traces carrying much higher currents, and by creating a multi-layered package, we can drastically reduce the parasitic inductance inside the power module. Achieving lower parasitic inductance is critical for an ultra-fast Ga2O3 package to avoid excessive voltage overshoot and ringing. Using ODBC, we have designed novel packages capable of handling the challenges presented by fast Ga2O3 switching. Using multi-physics modeling software, we can validate our design before building the prototype. Due to the simple process parameters needed to work with ODBC, we can rapidly create prototypes without using external vendors. This flexibility allows us to quickly design, build, and validate highly complex switching power modules to accommodate next generation, Ga2O3 switching devices.

ADVANCED PROPULSION SYSTEMS,ENGINEERING↗
NASA NTRS2019

Design of Low Inductance Busbar for 500 kVA Three-Level ANPC Converter

The adoption of SiC devices in high power applications enables higher switching speed, which requires lower circuit parasitic inductance to reduce the voltage overshoot. This paper presents the design of a busbar for a 500 kVA three-level active natural clamped converter. The layout of the busbar is discussed in detail based on the analysis of the multiple commutation loops, magnetic cancelling effect, and DC-link capacitor placement. The loop inductance of the designed busbar is verified with simulation, impedance measurements and converter experiment. The results can match with each other and the inductances of small and large loop are 6.5 nH and 17.5 nH respectively, which is significantly lower than the busbars of NPC type converters in other references.

SiC MOSFET↗
DOE OSTI2024

Power Electronics Manufacturing Improvements for Heavy-Duty Fuel Cell Vehicles

The Marel Power Solutions project, funded by the U.S. Department of Energy under Award DE-SC0023801, focused on advancing manufacturing techniques for power electronics in heavy-duty fuel cell vehicles. The research aimed to enhance system efficiency, reduce costs, and support broader adoption of hydrogen fuel cell technology. Key areas of investigation included power topology, thermal modeling, system architecture, and accessibility through software tools. Key Accomplishments: 1. Power Topology: - Developed an interleaved boost converter with optimized phase count, leveraging Marel’s proprietary Power Stacks. - Achieved reduced parasitic inductance and resistance, enabling high efficiency in DC-DC converters. 2. Thermal Modeling: - Integrated innovative cooling systems into compact Silicon Carbide (SiC) modules. - Simulations demonstrated the ability to dissipate significant heat (up to 7.5 kW), ensuring device reliability under heavy loads. 3. System Architecture: - Utilized simulation tools to analyze the impact of various fuel cell and vehicle parameters on efficiency. - Highlighted the role of smaller, modular improvements, such as enhanced DC-DC converters, in achieving system-wide gains. 4. Accessibility: - Evaluated and implemented MATLAB/Simulink code generation tools for real-world hardware applications. - Demonstrated the potential for rapid prototyping of custom power systems with reduced development costs. Impact and Benefits: - Efficiency and Cost Reduction: Marel’s cooling technology enhances SiC die performance, reducing the number of dies required and overall system size. - Scalability and Flexibility: The innovations support tailored solutions for diverse applications, from mass transit to mining vehicles. - Sustainability: The research promotes the integration of electrification technologies, helping meet rising energy demands sustainably. Conclusion: The project’s outcomes advance the state of power electronics for hydrogen fuel cell vehicles, enabling more efficient, compact, and cost-effective solutions. These developments lay a foundation for future innovation, contributing to the broader adoption of clean energy technologies in transportation and other industries.

08 HYDROGEN↗
NASA NTRS1981

High-frequency high-voltage high-power DC-to-DC converters

The current and voltage waveshapes associated with the power transitor and the power diode in an example current-or-voltage step-up (buck-boost) converter were analyzed to highlight the problems and possible tradeoffs involved in the design of high voltage high power converters operating at switching frequencies in the range of 100 Khz. Although the fast switching speeds of currently available power diodes and transistors permit converter operation at high switching frequencies, the resulting time rates of changes of current coupled with parasitic inductances in series with the semiconductor switches, produce large repetitive voltage transients across the semiconductor switches, potentially far in excess of the device voltage ratings. The need is established for semiconductor switch protection circuitry to control the peak voltages appearing across the semiconductor switches, as well as to provide the waveshaping action require for a given semiconductor device. The possible tradeoffs, as well as the factors affecting the tradeoffs that must be considered in order to maximize the efficiency of the converters are enumerated.

Wilson, T. G.↗
NASA NTRS1981

Research on design feasibility of high-power light-weight dc-to-dc converters for space power applications

Utilizing knowledge gained from past experience with experimental current-or-voltage step-up dc-to-dc converter power stages operating at output powers up to and in excess of 2 kW, a new experimental current-or-voltage step-up power stage using paralleled bipolar junction transistors (BJTs) as the controlled power switch, was constructed during the current reporting period. The major motivation behind the construction of this new experimental power stage was to improve the circuit layout so as to reduce the effects of stray circuit parasitic inductances resulting from excess circuit lead lengths and circuit loops, and to take advantage of the layout improvements which could be made when some recently-available power components, particularly power diodes and polypropylene filter capacitors, were incorporated into the design.

Wilson, T. G.↗
NASA NTRS1992

Analysis of shielded CPW discontinuities with air-bridges

The effect of air-bridges on the performance of various coplanar waveguides (CPW) discontinuities is studied. Specifically, the coupled open-end CPW's and the short-end shunt CPW stub discontinuities are considered. The high frequency effect of the air-bridge is evaluated using a hybrid technique. At first, the frequency dependent equivalent circuit of the planar discontinuity without the air-bridge is derived using the Space Domain Integral Equation (SDIE) method. Then, the circuit is modified by incorporating the air-bridge's parasitic inductance and capacitance which are evaluated using a simple quasi-static model. The frequency response of each discontinuity with and without the air-bridge is studied and the scattering parameters are plotted in the frequency range 30-50 GHz for typical CPW dimensions.

Dib, N. I.↗
NASA NTRS2012

Single Pixel Characterization of X-Ray TES Microcalorimeter Under AC Bias at MHz Frequencies

In this paper we present the progress made at SRON in the read-out of GSFC x-ray transition-edge sensor (TES) micro-calorimeters in the frequency domain. The experiments reported so far, whose aim was to demonstrate an energy resolution of 2eV at 6 keV with a TES acting as a modulator, were carried out at frequencies below 700 kHz using a standard flux locked loop (FLL) SQUID read-out scheme. The TES read-out suffered from the use of sub-optimal circuit components, large parasitic inductances, low quality factor resonators and poor magnetic field shielding. We have developed a novel experimental set-up, which allows us to test several read-out schemes in a single cryogenic run. In this set-up, the TES pixels are coupled via superconducting transformers to 18 high-Q lithographic LC filters with resonant frequencies ranging between 2 and 5 MHz. The signal is amplified by a two-stage SQUID current sensor and baseband feedback is used to overcome the limited SQUID dynamic range. We study the single pixel performance as a function of TES bias frequency, voltage and perpendicular magnetic field.

Gottardi, L.↗
DOE OSTI2025

Rapid Prototyping Techniques for Organic Direct-Bonded-Copper Power Modules

Organic Direct-Bonded-Copper (ODBC) is a novel packaging technology for power modules which allows higher flexibility in layout design. In this work, a set of rapid prototyping techniques are developed for ODBC modules based on a polyimide dielectric material. These techniques enable fast and low-cost fabrication of modules with 3-Dimensional (3D) layout features. An example half-bridge (HB) silicon carbide (SiC) metal oxide semiconductor field effect transistor (MOSFET) module is designed and prototyped using the proposed techniques aiming at ultra-low power loop inductance. Finite element analysis (FEA)-circuit co-simulations results and experimental results validate an approximately 0.71nH power loop inductance for the example module design.

36 MATERIALS SCIENCE↗
DOE OSTI2024

Single channel PICOSEC Micromegas detector with improved time resolution

This paper presents design guidelines and the experimental verification of a single-channel PICOSEC Micromegas (MM) detector with an improved time resolution. The design encompasses the detector board, vessel, auxiliary mechanical parts, and electrical connectivity for high voltage (HV) and signals, focusing on improving the stability, reducing noise, and ensuring signal integrity to optimize timing performance. A notable feature is the simple and fast reassembly procedure, facilitating quick replacement of the detector internal components that allows for an efficient measurement strategy involving different detector components. The paper also examines the influence of parasitic capacitance and inductance on the output signal integrity. To validate the design, a prototype assembly and three interchangeable detector boards with varying readout pad diameters were manufactured. Detectors were initially tested in the laboratory. Finally, the timing performance of the detectors with different pad sizes was verified using 150 GeV muons. Notably, a record time resolution for a PICOSEC Micromegas detector technology with a CsI photocathode of 12.5 ± 0.8 ps was achieved for a detector with 10 mm diameter readout pad size.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗
NASA NTRS1980

Stress-relieved solder joints

Mechanical stress on solder joints is reduced by procedure for soldering electronic components to circuit boards. Procedure was developed for radio-frequency (RF) strip-line circuits, for which dimensions must be carefully controlled to minimize parasitic capacitance and inductance. Procedure consists of loosening component from its mounting after each lead is soldered relieving induced stresses before next soldering step.

Zemenick, C. J.↗
NASA NTRS1978

Predicting performance of power converters operating with switching frequencies in the vicinity of 100 kHZ

A model describing the turning-on period of a power switching transistor in an energy storage voltage step-up converter is presented. Comparisons between an experimental layout and the circuit model during the turning-on interval demonstrate the ability of the model to closely predict the effects of circuit topology on the performance of the converter. A phenomenon of particular importance that is observed in the experimental circuits and is predicted by the model is the deleterious feedback effect of the parasitic emitter lead inductance on the base current waveform during the turning-on interval.

Bahler, D. D.↗
NASA NTRS1989

Monolithic transistor gate energy recovery system

Energy is recovered from an insulated gate semiconductor switch, such as a MOSFET, that is otherwise lost in the gate capacitance by producing a notch in the gate control voltage for an interval B following an interval A after initial application of a gate control voltage pulse for turning the switch on, and a notch for an interval C following termination of the gate control voltage pulse followed by interval D during which the switch is turned on again, where each interval is a period .DELTA.T given by ##EQU1## L.sub.s is the inductance (discrete and/or parasitic) in series with the gate electrode of the insulated gate semiconductor switch, and C.sub.in is the capacitance of that switch between its gate and source electrodes. The interval .DELTA.T may be provided directly by timing in a pulse forming circuit for the gate control voltage applied, or adaptively by sensing the gate voltage v.sub.g and comparing it with fixed progressively higher voltages v.sub.1, v.sub.2 and v.sub.3, where v.sub.2 is intermediate v.sub.1 and v.sub.3 which correspond to the lower and upper levels of v.sub.g as the switch is turned off and on.

Rippel, Wally E.↗
NASA NTRS1990

High power density dc-to-dc converters for aerospace applications

Three dc-to-dc converter topologies aimed at high-power high-frequency applications are introduced. Major system parasitics, namely, the leakage inductance of the transformer and the device output capacitance are efficiently utilized. Of the three circuits, the single-phase and three-phase versions of the dual active bridge topology demonstrate minimal stresses, better utilization of the transformer, bidirectional, and buck-boost modes of operation. All circuits operate at a constant switching frequency, thus simplifying design of the reactive elements. The power transfer characteristics and soft-switching regions on the Vout-Iout plane are identified. Two coaxial transformers with different cross-sections were built for a rating of 50 kVA. Based on the single-phase dual active bridge topology, a 50 kW, 50 kHz converter operating at an input voltage of 200 Vdc and an output voltage of 1600 Vdc was fabricated. Characteristics of current-fed output make the dual active bridge topologies amenable to paralleling and hence extension to megawatt power levels. Projections to a 1 MW system operating from a 500 Vdc input, at an output voltage of 10 kVdc and a switching frequency of 50 kHz, using MOS-controlled thyristors, coaxially wound transformers operating at three times the present current density with cooling, and multilayer ceramic capacitors, suggests an overall power density of 0.075 to 0.08 kg/kW and an overall efficiency of 96 percent.

Divan, Deepakraj M.↗
NASA NTRS1989

Microwave field effect transistor

Electrodes of a high power, microwave field effect transistor are substantially matched to external input and output networks. The field effect transistor includes a metal ground plane layer, a dielectric layer on the ground plane layer, a gallium arsenide active region on the dielectric layer, and substantially coplanar spaced source, gate, and drain electrodes having active segments covering the active region. The active segment of the gate electrode is located between edges of the active segments of the source and drain electrodes. The gate and drain electrodes include inactive pads remote from the active segments. The pads are connected directly to the input and output networks. The source electrode is connected to the ground plane layer. The space between the electrodes and the geometry of the electrodes extablish parasitic shunt capacitances and series inductances that provide substantial matches between the input network and the gate electrode and between the output network and the drain electrode. Many of the devices are connected in parallel and share a common active region, so that each pair of adjacent devices shares the same source electrodes and each pair of adjacent devices shares the same drain electrodes. The gate electrodes for the parallel devices are formed by a continuous stripe that extends between adjacent devices and is connected at different points to the common gate pad.

Huang, Ho-Chung↗
NASA NTRS2014

Passive Resonant Bidirectional Converter with Galvanic Barrier

A passive resonant bidirectional converter system that transports energy across a galvanic barrier includes a converter using at least first and second converter sections, each section including a pair of transfer terminals, a center tapped winding; a chopper circuit interconnected between the center tapped winding and one of the transfer terminals; an inductance feed winding interconnected between the other of the transfer terminals and the center tap and a resonant tank circuit including at least the inductance of the center tap winding and the parasitic capacitance of the chopper circuit for operating the converter section at resonance; the center tapped windings of the first and second converter sections being disposed on a first common winding core and the inductance feed windings of the first and second converter sections being disposed on a second common winding core for automatically synchronizing the resonant oscillation of the first and second converter sections and transferring energy between the converter sections until the voltage across the pairs of transfer terminals achieves the turns ratio of the center tapped windings.

Rosenblad, Nathan S.↗
NASA NTRS1940

A generalized vortex theory of the screw propeller and its application

The vortex theory as presented by the author in earlier papers has been extended to permit the solution of the following problems: (1) the investigation of the relation between thrusts and torque distribution and energy loss as given by the induction of helical vortex sheets and by the parasite drag; (2) the checking of the theorem of Betz of the rigidly behaving helical vortex sheet of minimum induced energy loss; (3) the extension of the theory of the screw propeller of minimum energy loss for the inclusion of parasite-drag distribution along the blades. A simple system of diagrams has been developed to systematize the design of airplane propellers for a wide range of parasite-drag distribution along the blades.

Reissner, Hans↗