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13 records
All sourcesNASA NTRSDOE OSTI
DOE OSTI2024

Power Module Precursors and Prognostics

The ongoing work involves 1) the identification and evaluation of various electric signals as indicators to module failure and precursors to aging, and 2) the development of corresponding detection techniques. In the current phase, 1) the increase of on-state resistance is selected as the precursor to the power cycle aging of silicon carbide power MOSFET modules based on review and rest data. 2) A detection method leveraging the gate voltage fluctuations magnitude during commutation transients to inform the on-state resistance increase is investigated which has the benefit of being able to be integrated into the gate driver. A dedicated detection circuit for implementation is designed and simulated and is currently in fabrication.

ADVANCED PROPULSION SYSTEMS↗
NASA NTRS2011

Prognostics of Power Mosfets Under Thermal Stress Accelerated Aging Using Data-Driven and Model-Based Methodologies

An approach for predicting remaining useful life of power MOSFETs (metal oxide field effect transistor) devices has been developed. Power MOSFETs are semiconductor switching devices that are instrumental in electronics equipment such as those used in operation and control of modern aircraft and spacecraft. The MOSFETs examined here were aged under thermal overstress in a controlled experiment and continuous performance degradation data were collected from the accelerated aging experiment. Dieattach degradation was determined to be the primary failure mode. The collected run-to-failure data were analyzed and it was revealed that ON-state resistance increased as die-attach degraded under high thermal stresses. Results from finite element simulation analysis support the observations from the experimental data. Data-driven and model based prognostics algorithms were investigated where ON-state resistance was used as the primary precursor of failure feature. A Gaussian process regression algorithm was explored as an example for a data-driven technique and an extended Kalman filter and a particle filter were used as examples for model-based techniques. Both methods were able to provide valid results. Prognostic performance metrics were employed to evaluate and compare the algorithms.

Electrolytic capacitors↗
DOE OSTI2025

Impact of proton irradiation on 4H-SiC Low Gain Avalanche Detectors (LGADs)

Silicon carbide (SiC) particle detectors have the potential to provide time resolutions and robust performance in extreme environments which exceed that of silicon detectors. In this work 4H-SiC low gain avalanche detectors (LGADs) and complementary PiN diodes were irradiated with 2.5 GeV protons at fluences up to 3.33 × 10 14 p/cm 2 . The electrostatic performance of both irradiated and non-irradiated devices was evaluated using I-V and C-V measurements. Moreover, charge collection measurements using α particles were also conducted. SiC LGADs displayed a loss in rectification, high ON-state resistances >10 10 Ω-cm 2 , and the complete removal of gain when exposed to the highest proton fluence. Additionally, the reductions in capacitance and OFF-state current pointed to compensation of the gain layer as a gain reducing mechanism. The introduction of radiation-induced defects also hinders carrier acceleration, which reduces impact ionization and further gain reduction. LGADs exposed to a fluence of 1 × 10 14 p/cm 2 experienced a partial recovery in gain (originally having a value of ∼ 2) with a value of ∼ 1.65 when applying a bias of 500 V. Charge trapping was also seen in the reduction of charge collection efficiency (CCE) to ∼ 65% for the PiN diode. However, despite the reduction in device performance, the demonstration of a measurable signal after irradiation points to the potential of SiC LGAD detectors for future high energy physics applications.

43 PARTICLE ACCELERATORS↗
NASA NTRS2011

Prognostics of Power MOSFET

This paper demonstrates how to apply prognostics to power MOSFETs (metal oxide field effect transistor). The methodology uses thermal cycling to age devices and Gaussian process regression to perform prognostics. The approach is validated with experiments on 100V power MOSFETs. The failure mechanism for the stress conditions is determined to be die-attachment degradation. Change in ON-state resistance is used as a precursor of failure due to its dependence on junction temperature. The experimental data is augmented with a finite element analysis simulation that is based on a two-transistor model. The simulation assists in the interpretation of the degradation phenomena and SOA (safe operation area) change.

Celaya, Jose Ramon↗
NASA NTRS2012

Prognostics Approach for Power MOSFET Under Thermal-Stress

The prognostic technique for a power MOSFET presented in this paper is based on accelerated aging of MOSFET IRF520Npbf in a TO-220 package. The methodology utilizes thermal and power cycling to accelerate the life of the devices. The major failure mechanism for the stress conditions is dieattachment degradation, typical for discrete devices with leadfree solder die attachment. It has been determined that dieattach degradation results in an increase in ON-state resistance due to its dependence on junction temperature. Increasing resistance, thus, can be used as a precursor of failure for the die-attach failure mechanism under thermal stress. A feature based on normalized ON-resistance is computed from in-situ measurements of the electro-thermal response. An Extended Kalman filter is used as a model-based prognostics techniques based on the Bayesian tracking framework. The proposed prognostics technique reports on preliminary work that serves as a case study on the prediction of remaining life of power MOSFETs and builds upon the work presented in [1]. The algorithm considered in this study had been used as prognostics algorithm in different applications and is regarded as suitable candidate for component level prognostics. This work attempts to further the validation of such algorithm by presenting it with real degradation data including measurements from real sensors, which include all the complications (noise, bias, etc.) that are regularly not captured on simulated degradation data. The algorithm is developed and tested on the accelerated aging test timescale. In real world operation, the timescale of the degradation process and therefore the RUL predictions will be considerable larger. It is hypothesized that even though the timescale will be larger, it remains constant through the degradation process and the algorithm and model would still apply under the slower degradation process. By using accelerated aging data with actual device measurements and real sensors (no simulated behavior), we are attempting to assess how such algorithm behaves under realistic conditions.

Power MOSFET PHM↗
NASA NTRS2015

Performance Evaluation of an Automotive-Grade, High Speed Gate Driver for SiC FETs, Type UCC27531, Over a Wide Temperature Range

Silicon carbide (SiC) devices are becoming widely used in electronic power circuits as replacement for conventional silicon parts due to their attractive properties that include low on-state resistance, high temperature tolerance, and high frequency operation. These attributes have a significant impact by reducing system weight, saving board space, and conserving power. In this work, the performance of an automotive-grade high speed gate driver with potential use in controlling SiC FETs (field-Effect Transistors) in converters or motor control applications was evaluated under extreme temperatures and thermal cycling. The investigations were carried out to assess performance and to determine suitability of this device for use in space exploration missions under extreme temperature conditions.

Transistor Gate Drive↗
NASA NTRS2016

Silicon-Carbide Power MOSFET Performance in High Efficiency Boost Power Processing Unit for Extreme Environments

Silicon-Carbide device technology has generated much interest in recent years. With superior thermal performance, power ratings and potential switching frequencies over its Silicon counterpart, Silicon-Carbide offers a greater possibility for high powered switching applications in extreme environment. In particular, Silicon-Carbide Metal-Oxide- Semiconductor Field-Effect Transistors' (MOSFETs) maturing process technology has produced a plethora of commercially available power dense, low on-state resistance devices capable of switching at high frequencies. A novel hard-switched power processing unit (PPU) is implemented utilizing Silicon-Carbide power devices. Accelerated life data is captured and assessed in conjunction with a damage accumulation model of gate oxide and drain-source junction lifetime to evaluate potential system performance at high temperature environments.

Ikpe, Stanley A.↗
DOE OSTI2024

Power Module Precursors and Prognostics

This project focuses on finding and utilizing electrical properties (precursors) of power electronic devices and modules whose changes have strong correlations with different modes and levels of degradations in order to realize online and lightweight state of health evaluation and fault diagnosis. Results from this project will contribute to higher safety, reliability, and power density of power electronic components. The approaches mainly include reviewing academic literature and industry practices for state of the art precursor identification and extraction, accelerated life cycles (ALC) of various power modules to create different degradations in-house, and developing techniques for gate-driver-integratable precursor detection circuit. In FY24, the results includes two sets of definitively detected aging precursors (on-state resistance and gate threshold voltage) for two sets of power modules respectively, controlled accelerated lifetime cycling of multiple silicon carbide (SiC) metal-oxide-semiconductor field-effect transistor (MOSFET) modules, and the development and validation of a gate voltage detection system.

ADVANCED PROPULSION SYSTEMS↗
DOE OSTI2025

Enhancement-Mode GaN Monolithic Bidirectional Switch With Breakdown Voltage Over 3.3 kV

Here, this work demonstrates a GaN enhancement-mode monolithic bidirectional switch (MBDS) with breakdown voltage (BV) higher than 3.3 kV in both polarities. This MBDS is realized on a dual p-GaN gate high electron mobility transistor (HEMT) platform on sapphire substrate. It features a novel dual junction termination extension design for electric field management, which is built on the p-GaN layer in the gate stack and does not require epitaxial regrowth. The GaN MBDS exhibits symmetric on-state characteristics in both directions with a threshold voltage (V th ) of 0.6 V and a low specific on-resistance (R on,sp ) of 5.6 m Ω · cm2. This device presents the highest BV, as well as one of the best BV and R on,sp trade-offs, in all the reported MBDS devices. The R on,sp is lower than the performance limit of conventional BDS realized by two discrete devices. This 3.3 kV GaN MBDS opens the door for developing new circuit topologies and advancing system performance in medium-voltage power electronics.

42 ENGINEERING↗
NASA NTRS2022

Simulation-based Study of Single-Event Burnout in 4H-SiC High-Voltage Vertical Superjunction DMOSFET: Physical Failure Mechanism and Robustness vs. Performance Tradeoffs

We explore and elucidate physical failure mechanisms in a 4H-SiC, high voltage, superjunction (SJ) vertical DMOSFET from a single heavy ion strike using three-dimensional electro-thermal transient simulations. The single-event burnout (SEB) failure is thermal runaway from second breakdown, initiated by impact ionization and terminated with mesoplasma formation, at the center of the P-pillar/N+ substrate interface. We also demonstrate that the SEB performance of this SiC SJ DMOSFET is insensitive to the pillar width but sensitive to the strike location with ion strike at the P-pillar causing SEB at a lower blocking voltage than at the N-pillar. Compared to commercially available 1.2 kV blocking-rated non-SJ DMOSFETs, which have been demonstrated to survive SEB up to 525 V, the SJ DMOSFET increases SEB survival threshold voltage (VSEB) by a factor of 2.2, making it close to 1200 V, while the on-resistance is increased by only 11%. Using our recently developed figure of merit (FoM), which considers the trade-off between VSEB and on-state performance, we find that the SiC SJ DMOSFET achieves a FoM that is 14 times better, making it superior to conventional 1.2 kV SiC DMOSFETs for long-term radiation-tolerant operation in space applications.

Silicon Carbide↗
NASA NTRS1979

High power thyristors with 5 kV blocking voltage. Volume 1: Development of high-voltage-thyristors (4.5 kV) with good dynamic properties

Using neutron irradiated silicon with considerably lower spread in resistivity as compared to conventionally doped silicon it was possible to produce power thyristors with breakdown voltages between 3.5 kV and 5.5 kV. The thyristor pellets have a diameter of 50 mm. Maximum average on-state currents of 600 to 800 A can be reached with these elements. The dynamic properties of the thryistors could be improved to allow standard applications up to maximum repetitive voltages of 4.5 kV.

Lock, K.↗
DOE OSTI2024

Atomically Precise Graphene Nanoribbon Transistors with Long-Term Stability and Reliability

Atomically precise graphene nanoribbons (GNRs) synthesized from the bottom-up exhibit promising electronic properties for high-performance field-effect transistors (FETs). The feasibility of fabricating FETs with GNRs (GNRFETs) has been demonstrated, with ongoing efforts aimed at further improving their performance. However, their long-term stability and reliability remain unexplored, which is as important as their performance for practical applications. In this work, we fabricated short-channel FETs with nine-atom-wide armchair GNRs (9-AGNRFETs). We revealed that the on-state (/ ON ) current performance of the 9-AGNRFETs deteriorates significantly over consecutive full transistor on and off logic cycles, which has neither been demonstrated nor previously considered. To address this issue, we deposited a thin ~10 nm thick atomic layer deposition (ALD) layer of aluminum oxide (Al 2 O 3 ) directly on these devices. The integrity, compatibility, electrical performance, stability, and reliability, of the GNRFETs before and/or after Al 2 O 3 deposition were comprehensively studied. The results indicate that the observed decline in electrical device performance is most likely due to the degradation of contact resistance over multiple measurement cycles. We successfully demonstrated that the devices with the Al 2 O 3 layer operate well up to several thousand continuous full cycles without any degradation. Our study offers valuable insights into the stability and reliability of GNR transistors, which could facilitate their large-scale integration into practical applications.

36 MATERIALS SCIENCE↗
DOE OSTI2026

Tailorable multiferroic tunnel junctions from all-van der Waals multilayer stacking

Multiferroic tunnel junctions (MFTJs) represent a class of multistate, non-volatile spintronic devices, in which electron tunnelling can be manipulated by switching long-range lattice and spin orders. In contrast to conventional oxide-based MFTJs, MFTJs constructed from two-dimensional van der Waals (vdW) crystals promise minimal defect concentration in the constituents and at interfaces, which may allow for probing intrinsic tunnelling physics and the development of high-performance devices. Here, in this study, we construct Fe 3 GeTe 2 /CuInP 2 S 6 /Fe 3 GeTe 2 all-vdW MFTJs by assembling multilayer flakes of ferromagnetic Fe 3 GeTe 2 electrodes and a ferroelectric CuInP 2 S 6 spacer. These MFTJs exhibit four non-volatile resistance states featuring sizable tunnelling magnetoresistance of ∼10 2 % and tunnelling electroresistance of ∼10 4 %. To tune the properties of the vdW MFTJ, we make use of the flexibility in material choice offered by vdW heterostructure devices; we use Fe 3 GeTe 2 /Fe 5 GeTe 2 asymmetric electrodes to boost the tunnelling electroresistance by 10 3 %, we integrate In 2 Se 3 as a ferroelectric with a smaller bandgap to enhance the ON-state current density by 10 4 % to 10 4 A cm −2 and we use Fe 3 GaTe 2 electrodes to demonstrate room temperature operation. Furthermore, when we combine the asymmetric ferromagnetic electrodes with the small-bandgap ferroelectric spacer to construct Fe 3 GeTe 2 /In 2 Se 3 /Fe 5 GeTe 2 MFTJs, we simultaneously realized tunnelling electroresistance of 10 6 % and an ON-state current density of 10 4 A cm −2 , both two orders of magnitude higher than the highest values achieved with conventional oxide-based MFTJs. In the future, our all-vdW MFTJs with the tailorability of all functional layers may make it possible to investigate fundamental aspects of interlayer tunnelling and enable the design of functional magnetoelectric nanodevices.

Xie, Ti [University of Maryland, College Park, MD ↗