Engineering Papers⌕ Search

SEARCH · Engineering Papers

Results for “SOLID STATE DEVICE”

Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

Quote a phrase for an exact phrase match. Source license links do not imply unrestricted reuse.

At least 19 records
All sourcesNASA NTRSDOE OSTI
NASA NTRS1991

Solid state devices

The Solid State Device research program is directed toward developing innovative devices for space remote and in-situ sensing, and for data processing. Innovative devices can result from the standard structures in innovative materials such as low and high temperature superconductors, strained layer superlattices, or diamond films. Innovative devices can also result from innovative structures achieved using electron tunneling or nanolithography in standard materials. A final step is to use both innovative structures and innovative materials. A new area of emphasis is the miniaturization of sensors and instruments molded by using the techniques of electronic device fabrication to micromachine silicon into micromechanical and electromechanical sensors and actuators.

Source record↗
NASA NTRS1983

Compliant glass for solid state devices

A solid state device including glass containing SiO.sub.2, consisting essentially of the composition, in percent by weight, in the range of: SiO.sub.2 95-99.5 and Al 0.5 to 5.0.

Bailey, Robert F.↗
NASA NTRS1982

Glass for Solid State Devices

Glass film has low intrinsic compressive stress for isolating active layers of magnetic-bubble and other solid-state devices. Solid-state device structure incorporates low-stress glasses as barrier and spacer layers. Glass layers mechanically isolate substrate, conductor, and nickel/iron layers.

Bailey, R. F.↗
NASA NTRS1984

Screening Plastic-Encapsulated Solid-State Devices

Suitability of plastic-encapsulated solid-state electronic devices for use in spacecraft discussed. Conclusion of preliminary study was plasticencapsulated parts sufficiently reliable to be considered for use in lowcost equipment used at moderate temperature and low humidity. Useful to engineers as guides to testing or use of plastic encapsulated semiconductors in severe terrestrial environments.

Buldhaupt, L.↗
NASA NTRS1978

Adaptation of ion beam technology to microfabrication of solid state devices and transducers

A number of areas were investigated to determine the potential uses of ion beam techniques in the construction of solid state devices and transducers and the packaging of implantable electronics for biomedical applications. The five areas investigated during the past year were: (1) diode-like devices fabricated on textured silicon; (2) a photolithographic technique for patterning ion beam sputtered PVC (polyvinyl chloride); (3) use of sputtered Teflon as a protective coating for implantable pressure sensors; (4) the sputtering of Macor to seal implantable hybrid circuits; and (5) the use of sputtered Teflon to immobilize enzymes.

Topich, J. A.↗
NASA NTRS1980

Solid state device technology for Solar Power Satellite

The feasibility of using solid state elements in the solar power satellite transmitter system is addressed. Recommendations are given concerning device types, the antenna modules, and the overall antenna system. The development of a solid state amplifier based on GaAs field effect transistor devices is also described.

Weir, D. G.↗
NASA NTRS1981

Analysis of field usage failure rate data for plastic encapsulated solid state devices

Survey and questionnaire techniques were used to gather data from users and manufacturers on the failure rates in the field of plastic encapsulated semiconductors. It was found that such solid state devices are being successfully used by commercial companies which impose certain screening and qualification procedures. The reliability of these semiconductors is now adequate to support their consideration in NASA systems, particularly in low cost systems. The cost of performing necessary screening for NASA applications was assessed.

Source record↗
NASA NTRS1976

Device/packaging reliability problems of solid-state devices for space applications

This paper presents data that has been generated within NASA, especially the Marshall Space Flight Center, concerning several failure mechanisms that have occurred with microelectronic packages. The types of packages that will be discussed are primarily flat packs with 14-24 exit leads that are composed of Kovar electro-deposited nickel and finally gold plated.

Villella, F.↗
NASA NTRS1977

Adaptation of ion beam technology to microfabrication of solid state devices and transducers

It was found that ion beam texturing of silicon surfaces can be used to increase the effective surface area of MOS capacitors. There is, however, a problem with low dielectric breakdown. Preliminary work was begun on the fabrication of ion implanted resistors on textured surfaces and the potential improvement of wire bond strength by bonding to a textured surface. In the area of ion beam sputtering, the techniques for sputtering PVC were developed. A PVC target containing valinomycin was used to sputter an ion selective membrane on a field effect transistor to form a potassium ion sensor.

Topich, J. A.↗
NASA NTRS1977

New processes and materials for ultraviolet detection with solid state devices

The three major effects that degrade external responsivity of silicon from the 1/lambda theoretical curve for a quantum detector are: surface reflectance, surface recombination, and junction depth. Since the p-n junction must be very shallow, problems relating to surface are further enhanced. MOS type of processing is necessary. HCl oxides and numerous acid clean-ups are utilized in order to obtain a contamination free surface with low Qss levels. Stringent process controls such as CV shifts, spreading resistance measurements, thickness monitoring etc., are used to analyze the surface contaminations, surface mobile charges, surface concentrations, junction depth, oxide thickness etc. Low surface concentrations of 10 to the 18th atoms/cu cm are achieved by low temperature boron nitride depositions. Shallow junction depths of the order of a few tenths of a micron are achieved by low temperature controlled diffusions. In order to improve breakdown characteristics of these shallow junction devices, field plate and deep diffused p(+) ring geometries are used.

Chopra, D.↗
NASA NTRS1981

Development of design, qualification, screening, and application requirements for plastic encapsulated solid-state devices for space applications

Test data were collected on 1035 plastic encapsulated devices and 75 hermetically scaled control group devices that were purchased from each of five different manufacturers in the categories of (1) low power Schottsky TTL (bipolar) digital circuits; (2) CMOS digital circuits; (3) operational amplifier linear circuits; and (4) NPN transistors. These parts were subjected to three different initial screening conditions, then to extended life testing, to determine any possible advantages or trends for any particular screen. Several tests were carried out in the areas of flammability testing, humidity testing, high pressure steam (auroclave) testing, and high temperature storage testing. Test results are presented. Procurement and application considerations for use of plastic encapsulated semiconductors are presented and a statistical analysis program written to study the log normal distributions resulting from life testing is concluded.

Source record↗
NASA NTRS1983

Electrodes for solid state devices

The invention relates to coated metal powders and to dispersions of such powders in liquid vehicles forming screenable, sinterable pastes for use in forming electrodes on photovoltaic devices. The primary nickel or copper metal particles are provided with a carrier of lower melting sintering metals such as 1-20% by weight, of a non-oxidizing metal such as lead or tin. The powdered metal systems operate on the basis of fusing together by way of eutectic alloying. As the paste is heated during firing the organic binder is first vaporized. An eutectic of the base metal (copper) and coating (tin) forms at the intersections of the base metal grains. This eutectic dissolves the grains and as the temperature is raised above the eutectic temperature, more of the base metal is dissolved. While the temperature is held at the higher value, the much smaller amount of sintering metal disappears as the eutectic dissolves and diffuses into the base metal until the composition of the eutectic is so enriched with base metal that it no longer has the eutectic properties and it solidifies. In this high temperature solidification, the base metal grains became thoroughly alloyed together and will not separate at the eutectic temperature (a lower temperature than their solidification by diffusion).

Bickler, D. B.↗
NASA NTRS1984

Material growth and characterization for solid state devices

During the reporting period, InGaAs was grown on Fe-doped (semi-insulating) (100) InP substrates by current controlled liquid phase epitaxy (CCLPE) at 640 C and current densities of 2.5A sq/cm to 5 A/sq cm for periods from 5 to 30 minutes. Special efforts were made to reduce the background carrier concentration in the grown layers as much as possible. The best layers exhibited carrier concentrations in the mid-10 to the 15th power/cu cm range and up to 10,900 sq cm/V-sec room temperature mobility. InGaAsP quaternary layers of energy gap corresponding to wavelengths of approximately 1.5 microns and 1.3 microns were grown on (100) InP substrates by CCLPE. In the device fabrication area, work was directed toward processing MISFET's using InGaAs. SiO2, Si3N4 and Al2O3 were deposited by ion beam sputtering, electron beam evaporation and chemical vapor reaction on Si, GaAs, and InGaAs substrates. SiO2 and Si3N4 sputtered layers were found to possess a high density of pinhole defects that precluded capacitance-voltage analysis. Chemical vapor deposited Al2O3 layers on Si, GaAs and InGaAs substrates also exhibited a large number of pinhole defects. This prevented achieving good MIS devices over most of the substrate surface area.

Stefanakos, E. K.↗
NASA NTRS1984

Material growth and characterization for solid state devices

Manganese was used as the dopant for p-type InGaAs layers grown on semi-insulating (Fe-doped) and n-type (Sn-doped) InP substrates. Optical, electrical (Hall) and SIMS measurements were used to characterize the layers. Mn-diffusion into the substrate (during the growth of In GaAs) was observed only when Fe-doped substrates were used. Quaternary layers of two compositions corresponding to wavelengths (energy gaps) of approximated 1.52 micrometers were successfully grown at a constant temperature of 640 C and InP was grown in the temperature range of 640 C to 655 C. A study of the effect of pulses on the growth velocity of InP indicated no significant change as long as the average applied current was kept constant. A system for depositing films of Al2O3 by the pyrolysis of aluminum isopropoxide was designed and built. Deposited layers on Si were characterized with an ellipsometer and exhibited indices of refraction between 1.582 and 1.622 for films on the order of 3000 A thick. Undoped and p-type (Mn-doped) InGaAs epitaxial layers were also grown on Fe-doped InP substrates through windows in sputtered SiO2 (3200 A thick) layers.

Stefanakos, E. K.↗
NASA NTRS1987

Material growth and characterization for solid state devices

During this period InGaAs and InGaAsP were grown on (100)InP by liquid phase electroepitaxy (LPEE). Results of the epitaxial growth of InGaAs on sputtered quartz masked substrates are presented. The resulting surface morphology can be related to the current density distribution near the edges of a masked pattern. The quaternary InGaAs was grown with compositions corresponding to 1.3 micron and 1.5 micron emission wavelengths. Growth rates were found to be linearly dependent upon current density, and a strong dependence upon composition was noted. These compositions lie in the miscibility gap region of the alloy phase diagram at the 645 C growth temperature. Growths were performed at 685 C to avoid the miscibility gap. Epilayers were characterized by photoluminescence, X-ray diffraction, secondary ion mass spectrometry, and Hall effect measurements. Aluminum oxide was deposited on silicon and InGaAs substrates for the characterization of this material as an insulator in a field effect transistor structure. It was determined that the results did not warrant further work with the deposition from an aluminum isopropoxide source. A metallographic vapor phase epitaxy system installation is nearing completion for use in hybrid III-V semiconductor epilayer growths.

Collis, Ward J.↗
NASA NTRS1988

Material growth and characterization for solid state devices

During the period of this research grant, the process of liquid phase electroepitaxy (LPEE) was used to grow ternary and quaternary alloy III-V semiconductor thin films. Selective area growth of InGaAs was performed on InP substrates using a patterned sputtered quartz or spin-on glass layer. The etch back and growth characteristics with respect to substrate orientation were investigated. The etch back behavior is somewhat different from wet chemical etching with respect to the sidewall profiles which are observed. LPEE was also employed to grow epitaxial layers of InGaAsP alloys on InP substrates. The behavior of Mn as an acceptor dopant was investigated with low temperature Hall coefficient and photoluminescence measurements. A metal-organic vapor phase epitaxy system was partially complete within the grant period. This atmospheric pressure system will be used to deposit III-V compound and alloy semiconductor layers in future research efforts.

Collis, Ward J.↗
NASA NTRS2006

High Power High Efficiency Ka-Band Power Combiners for Solid-State Devices

Wide-band power combining units for Ka-band are simulated for use as MMIC amplifier applications. Short-slot couplers as well as magic-tees are the basic elements for the combiners. Wide bandwidth (5 GHz) and low insertion (approx.0.2 dB) and high combining efficiencies (approx.90 percent) are obtained.

Freeman, Jon C.↗