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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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Direct integration of atomic precision advanced manufacturing into middle-of-line silicon fabrication

Atomic precision advanced manufacturing (APAM) dopes silicon with enough carriers to change its electronic structure and can be used to create novel devices by defining metallic regions whose boundaries have single-atom abruptness. Incompatibility with the thermal and lithography process requirements for gated silicon transistor manufacturing have inhibited exploration of both how APAM can enhance CMOS performance and how transistor manufacturing steps can accelerate the discovery of new APAM device concepts. In this work, we introduce an APAM process that enables direct integration into the middle of a transistor manufacturing workflow. We show that a process that combines sputtering and annealing with a hardmask preserves a defining characteristic of APAM, a doping density far in excess of the solid solubility limit, while trading another, the atomic precision, for compatibility with manufacturing. The electrical characteristics of a chip combining a transistor with an APAM resistor show that the APAM module has only affected the transistor through the addition of a resistance and not by altering the transistor. This proof-of-concept demonstration also outlines the requirements and limitations of a unified APAM tool, which could be introduced into manufacturing environments, greatly expanding access to this technology and inspiring a new generation of devices with it.

Chemical vapor deposition

ALD-Derived WO 3– x Leads to Nearly Wake-Up-Free Ferroelectric Hf 0.5 Zr 0.5 O 2 at Elevated Temperatures

Breaking the memory wall in advanced computing architectures will require complex 3D integration of emerging memory materials such as ferroelectrics─either within the back-end-of-line (BEOL) of CMOS front-end processes or through advanced 3D packaging technologies. Achieving this integration demands that memory materials exhibit high thermal resilience, with the capability to operate reliably at elevated temperatures, such as 125°C, due to the substantial heat generated by front-end transistors. However, silicon-compatible HfO 2 -based ferroelectrics tend to exhibit antiferroelectric-like behavior in this temperature range, accompanied by a more pronounced wake-up effect, posing significant challenges to their thermal reliability. Here, we report that by introducing a thin tungsten oxide (WO 3–x ) layer─known as an oxygen reservoir─and carefully tuning its oxygen content, ultrathin Hf 0.5 Zr 0.5 O 2 (5 nm) films can be made robust against the ferroelectric-to-antiferroelectric transition at elevated temperatures. This approach not only minimizes polarization loss in the pristine state but also effectively suppresses the wake-up effect, reducing the required wake-up cycles from 10 5 to only 10 at 125°C, a qualifying temperature for back-end memory integrated with front-end logic, as defined by the JEDEC standard. First-principles density functional theory (DFT) calculations reveal that WO 3 enhances the stability of the ferroelectric orthorhombic phase (o-phase) at elevated temperatures by increasing the tetragonal-to-orthorhombic phase energy gap and promoting favorable phonon mode evolution, thereby supporting o-phase formation under both thermodynamic and kinetic constraints.

36 MATERIALS SCIENCE

Ambipolar Transport in Polycrystalline GeSn Transistors for Complementary Metal-Oxide-Semiconductor Applications

Group-IV alloy GeSn is a promising material for electronic and optoelectronic applications due to its compatibility with both Si substrates and established Si fabrication processes. This study focuses on polycrystalline GeSn (10% Sn), which offers a cost-effective, large-area, and versatile alternative to epitaxial GeSn. We demonstrate ambipolar transport behavior in polycrystalline GeSn thin film transistors, achieving electron and hole field-effect mobilities reaching up to 0.05 cm 2 /Vs and 2.05 cm 2 /Vs, respectively. Through temperature-dependent analysis, we elucidate the underlying mechanism of this phenomenon, which we attribute to quantum tunneling between the Schottky barrier contact and the channel, as well as potential barriers between the grain boundaries of this polycrystalline film, thereby advancing the understanding of polycrystalline GeSn's electrical properties. Furthermore, this work highlights the potential of ambipolar transport as a technique to employ towards the development of GeSn complementary metal-oxide-semiconductor field-effect transistors, promising to simplify and reduce the cost of GeSn manufacturing processes for edge computing and sensing applications.

42 ENGINEERING

Reduced thermal resistance of Al-rich AlGaN HEMTs via top-side diamond integration

We report back-end-of-line growth of nanocrystalline diamond (NCD) on ultrawide bandgap (UWBG) high Al content aluminum gallium nitride (AlGaN) channel high electron mobility transistors for thermal management. A thin (∼15 nm) silicon nitride (SiN x ) interlayer was deposited to protect the device surface before performing a low temperature (500 °C) NCD growth process in an attempt to protect the gates on these fully fabricated devices. Notably, atomic force microscopy showed that the maximum lateral grain size exceeded 300 nm even though the film thickness was ∼250 nm. Comparing electrical (DC) performance before and after NCD growth, the gate leakage increased by ∼10 2 after NCD growth. Despite the lower NCD growth temperature, intermixing of the Ni and Au was observed in the Schottky gate metal stack; however, we believe there is another mechanism, possibly hydrogen-related, that is responsible for the measured increase in gate leakage. Regarding thermal management, the device-level thermal resistance (quantified using the average gate temperature rise measured by thermoreflectance imaging) was reduced by 29% through the incorporation of the top-side diamond film. Using time-domain thermoreflectance, the thermal conductivity of the ≈250 nm thick NCD film was measured to be 45 ± 25 W m −1 K −1 . This is expected to be at least 5× greater than the thermal conductivity of the thin disordered AlGaN alloy. There could also be a coupled electrothermal component contributing to the reduced temperature rise from electric field spreading and consequent heat spreading. This study demonstrates a promising first step toward device-level thermal management of high power UWBG Al-rich AlGaN devices.

Lundh, James Spencer [U.S. Naval Research Laborato

Rapid Prototyping Techniques for Organic Direct-Bonded-Copper Power Modules

Organic Direct-Bonded-Copper (ODBC) is a novel packaging technology for power modules which allows higher flexibility in layout design. In this work, a set of rapid prototyping techniques are developed for ODBC modules based on a polyimide dielectric material. These techniques enable fast and low-cost fabrication of modules with 3-Dimensional (3D) layout features. An example half-bridge (HB) silicon carbide (SiC) metal oxide semiconductor field effect transistor (MOSFET) module is designed and prototyped using the proposed techniques aiming at ultra-low power loop inductance. Finite element analysis (FEA)-circuit co-simulations results and experimental results validate an approximately 0.71nH power loop inductance for the example module design.

36 MATERIALS SCIENCE

Power Module Precursors and Prognostics

This project focuses on finding and utilizing electrical properties (precursors) of power electronic devices and modules whose changes have strong correlations with different modes and levels of degradations in order to realize online and lightweight state of health evaluation and fault diagnosis. Results from this project will contribute to higher safety, reliability, and power density of power electronic components. The approaches mainly include reviewing academic literature and industry practices for state of the art precursor identification and extraction, accelerated life cycles (ALC) of various power modules to create different degradations in-house, and developing techniques for gate-driver-integratable precursor detection circuit. In FY24, the results includes two sets of definitively detected aging precursors (on-state resistance and gate threshold voltage) for two sets of power modules respectively, controlled accelerated lifetime cycling of multiple silicon carbide (SiC) metal-oxide-semiconductor field-effect transistor (MOSFET) modules, and the development and validation of a gate voltage detection system.

ADVANCED PROPULSION SYSTEMS

Annihilation-limited long-range exciton transport in high-mobility conjugated copolymer films

A combination of ultrafast, long-range, and low-loss excitation energy transfer from the photoreceptor location to a functionally active site is essential for cost-effective polymeric semiconductors. Delocalized electronic wavefunctions along π-conjugated polymer (CP) backbone can enable efficient intrachain transport, while interchain transport is generally thought slow and lossy due to weak chain–chain interactions. In contrast to the conventional strategy of mitigating structural disorder, amorphous layers of rigid CPs, exemplified by highly planar poly(indacenodithiophene-co-benzothiadiazole) (IDT-BT) donor-accepter copolymer, exhibit trap-free transistor performance and charge-carrier mobilities similar to amorphous silicon. Here, we report long-range exciton transport in HJ -aggregated IDTBT thin-film, in which the competing exciton transport and exciton–exciton annihilation (EEA) dynamics are spectroscopically separated using a phase-cycling-based scheme and shown to depart from the classical diffusion-limited and strong-coupling regime. In the thin film, we find an annihilation-limited mechanism with ≪100% per-encounter annihilation probability, facilitating the minimization of EEA-induced excitation losses. In contrast, excitons on isolated IDTBT chains diffuse over 350 nm with 0.56 cm 2 s −1 diffusivity, before eventually annihilating with unit probability on first contact. We complement the pump–probe studies with temperature-dependent photocurrent and EEA measurements from 295 K to 77 K and find a remarkable correspondence of annihilation rate and photocurrent activation energies in the 140 K to 295 K temperature range.

Shi, Yuping (ORCID:0000000318289415)

Low Cost High-Performance HRE-Free 3-in-1 Electric Drive Unit

The project team completed work to expand upon American Axle & Manufacturing’s (AAM) baseline technology and develop a high-speed, AC induction electric drive unit (EDU) with total direct-oil-cooling and integrated power electronics. The project accelerated advancements in EDU technology by allowing AAM to build upon the progress made in developing the underlying baseline technologies. The following seven improvements to AAM’s baseline technology were implemented in this research and development program: 1) Increased speed (30k RPM) AC induction motor, 2) Silver-sintering of discrete silicon carbide (SiC) metal-oxide-semiconductor field-effect transistors (MOSFET) to heat sinks, 3) Electrically insulated rotor bars, 4) Optimized lamination steel, 5) EDU-integrated 650VDC inverter package, 6) Over-molded stator with molded liners, and 7) 650VDC power-dense stator design. The successful development of the technology resulted in a meaningful cost reduction for EDU systems in the market. Coupled with falling battery system costs, lower EDU costs will likely accelerate the market acceptance and related production scaling of battery electric vehicles. The objective of this project was to research, develop, and test a Heavy Rare Earth (HRE)-free 3-In-1 electric drive unit (EDU) that has class leading power density and cost. The key technologies to be developed were anticipated to meet or exceed the Department of Energy (DOE) targets of a cost ≤ $\$$7/kilowatt (kW), power density ≥ 12 kW/liter, and operating voltage ≥ 600 VDC.

33 ADVANCED PROPULSION SYSTEMS

Gate control of electron correlations towards Mott field effect transistors (MottFET)

The modulation of channel conductance in field-effect transistors (FETs) via metal-insulator-semiconductor structures has revolutionized information processing and storage. However, the limitations of silicon-based FETs in electrical switching have driven the search for new materials capable of overcoming these constraints. Electrostatic gating of competing electronic phases in a Mott material near its metal-to-insulator transition (MIT) offers the prospects of substantial modulation of the conducting electrons and electrical resistivity through small changes in band filling. While electrostatic control of the MIT has been previously reported, the advancement of Mott materials toward novel Mott-based transistors, MottFETs requires the realization of their unique physical properties in a solid-state device. In this study, we present gate control of electron correlation using a solid-state device utilizing the oxide Mott system La 1-x Sr x VO 3 as a correlated FET channel. We report on a gate resistance response that cannot be explained in a purely electrostatic framework. This behavior suggests an enhancement in effective mass and a reduction in effective carrier density as the system approaches its insulating state, consistent with theoretical predictions for Mott systems, suggesting at least 100× charge gain originating from the correlated behavior. These preliminary results pave the way toward the development of highly efficient, low-power electronic devices that could surpass the performance bottlenecks of conventional FETs by leveraging the electronic phase transitions of correlated electron systems.

75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND

Aluminum Boron Nitride Ferroelectric Field-Effect Transistors With ZnO Semiconductor Channel

The discovery of ferroelectricity in hafnium zirconium oxide (HfxZr 1−x O2) and related fluorite materials has spurred interest in ferroelectric devices suitable for integration with silicon integrated circuits (ICs), especially those that can be embedded in the back-end-of-line (BEOL) process. More recently, ferroelectricity has been found in wurtzite aluminum nitride-based materials, such as scandium and boron-doped aluminum nitride (Al 1−x ScxN and Al 1−x BxN). Although these materials currently have undesirably large coercive electric fields, and small breakdown electric field-to-coercive electric field ratio, their low processing temperatures and large remanent polarization offer intriguing possibilities for device applications. Furthermore, we report ferroelectric field-effect transistors (FeFETs) with a 15 nm thick Al0.88B0.12N layer and an 11 nm ZnO semiconductor channel, achieving a memory window >1 V and switching voltages ( V switch ) <±10 V.

42 ENGINEERING

Emerging applications: Neuromorphic computing and reservoir computing

The emergence of doped hafnium oxide (HfO 2 )-based ferroelectric films has enabled highly scalable and silicon-compatible ferroelectric devices, opening new frontiers in neuromorphic and reservoir computing. Among these, ferroelectric field-effect transistors (FeFETs) are particularly promising due to their analog memory characteristics and unique polarization dynamics. These properties make FeFETs ideal candidates for artificial synapses in neuromorphic architectures, supporting deep neural networks and spiking neural networks based on leaky-integrate-and-fire (LIF) mechanisms. Beyond neuromorphic computing, FeFETs also play a crucial role in physical reservoir computing, leveraging their intrinsic nonlinear and history-dependent behavior for efficient real-time learning. This approach offers significant advantages for time-series processing and edge artificial intelligence (AI) applications, addressing the growing need for energy-efficient computing. As a result, this article explores the principles, key demonstrations, and future potential of FeFET-based neuromorphic and reservoir computing, highlighting their impact on next-generation AI hardware.

36 MATERIALS SCIENCE

Thermal Optimization and Experimental Demonstration of a Silicon Carbide, Half-Bridge Power Module

This paper describes modeling and experimental work to design and demonstrate a silicon carbide (SiC), single-side-cooled power module. Two SiC metal-oxide-semiconductor field-effect transistors (MOSFET) were used for each switch position and packaged on a metalized ceramic substrate. Thermal modeling was first conducted to optimize the module packaging to minimize junction-to-fluid thermal resistance and device temperature variations. This procedure identified the optimal device placement and baseplate thickness to maximize thermal performance. A heat exchanger - incorporating impinging jets of water-ethylene glycol - was designed to cool the module's baseplate to minimize thermal resistance and pumping power. The heat exchanger used relatively low fluid velocities (<1.5 m/s) to minimize erosion-corrosion effects and relatively large fluid channel sizes (>=1 mm) to prevent clogging. The power module concept was fabricated, and experiments were conducted to measure its thermal performance. Direct current was used to power the module devices, and junction temperatures were measured via device temperature-sensitive parameters. The experimental results were found to be in good agreement with model predictions (within 2%) and yielded junction-to-fluid thermal resistance values as low as about 15 mm2 K/W at relatively low pumping power values. The results demonstrate the improved performance associated with jet impingement cooling and represent an improvement over existing channel-flow-type cold plates, which can enable improvements to power density and reliability.

36 MATERIALS SCIENCE

Tunable 3D Aerosol Jet Printing of Low‐Power Redox‐Gated Transistors with Multicomponent Inks

Printed hybrid electronics (PHE) offer a promising alternative for microelectronics fabrication, addressing some limitations of traditional subtractive manufacturing. Despite the versatility of PHE, particularly in the customization of printing inks, these devices have not yet matched the performance of silicon-based electronics due to challenges in gating mechanisms and operational stability. However, the potential of low-voltage redox-gating to achieve significant carrier modulations in correlated metal oxides remains unexplored in PHE. This study systematically investigates vanadium dioxide (VO 2 ) nanoparticles and redox inks, linking their organization in solution to their morphology, phase state, and properties in solid films and multilayered structures. Using an aerosol jet printer (AJP), a solid-state VO 2 transistor is fabricated, operating at just 0.4 V gating voltage. The printed VO 2 films demonstrate redox-modulated conductivity and consistent transistor behavior. The solid-state redox gating materials also provide long-term stability, with the device maintaining performance over 6000 cycles without degradation. These results highlight the potential of redox gating to enhance the application of functional nanoparticles in printed hybrid microelectronics, especially for flexible, low-voltage, and energy-efficient devices.

36 MATERIALS SCIENCE

Probability Density Function for the spatial and intensity distribution of neutron-induced defects in Silicon

The ability to model semiconductor device degradation under neutron irradiation depends upon having a robust modeling capability for the neutron-induced collision cascades as well as a means to analytically fit the resulting probability distributions of defect production and ionizing energy deposition for purposes of extrapolation to low-probability, high-consequence scenarios. In this paper, the widely-utilized binary collision approximation codes MARLOWE and SRIM are deployed in conjunction with a critical examination of their parameterizations as benchmarked against higher-fidelity molecular dynamics simulations. A simple 3-parameter form described by the Generalized Logistic Distribution is shown to be a good fit to Frenkel pair and ionization intensity distributions in bulk silicon. The BCA codes are then applied to simulate cascades in 5 nm layers of a representative gate-all-around nanosheet transistor, where joint probability distributions of threshold levels of damage to multiple layers are evaluated.

36 MATERIALS SCIENCE

A 24-channel ultra-low-noise preamplifier for dN/dx measurements with drift tube detectors

Cluster counting $(dN/dx)$ is a promising method to enhance particle identification for gaseous detectors, especially in next-generation collider experiments like the FCC-ee, where good $π/K$ separation over a broad momentum range is essential. However, its implementation in large-scale systems has been limited by the challenging requirements for high-resolution signal amplification and readout. This paper presents a 24-channel ultra-low-noise preamplifier board designed for drift tube detectors to enable $dN/dx$ measurements. The three-stage amplification topology employs SiGe transistors and integrates dedicated noise-minimization techniques, achieving a charge gain of 21.11 mV/fC from 0.3 fC to 50 fC, a bandwidth of 542 MHz, and a voltage gain of 47.8 dB. The measured voltage noise density is 0.35 nV/$\sqrt{\textrm{Hz}}$ , surpassing most of the state-of-the-art preamplifiers for gaseous and silicon detectors. Validation tests conducted on the sMDT chambers at the CERN Proton Synchrotron test beam facility demonstrate that the proposed design meets the stringent preamplifier requirements for implementing the $dN/dx$ method in drift-tube detector systems, achieving an equivalent noise charge of 0.14 fC and a signal-to-noise ratio of 73 when operated with a He:iC 4 H 10 (90:10) gas mixture. The design also shows promise for broader application in other gaseous or semiconductor detectors.

Drift tube detector

Identification and mitigation of memory block timing issue in ITk ABCStar during ASIC production

The ABCStar is a mixed-signal front-end readout ASIC for the strips sensor portion of the ATLAS ITk detector being developed as part of the High-Luminosity LHC upgrade. In pre-production testing, a subtle design flaw was uncovered in the ABCStar that was reducing wafer yields in some manufactured lots from the expected 90% to as low as 2%. The root cause was determined to be a timing issue in the logic synthesized to control previously silicon proven memory blocks re-used for this ASIC. The solutions proposed included manufacturing process changes by the wafer foundry, changes to the operating parameters for the ABCStar in the detector, and the possibility that a redesign might be required. The two mitigation efforts were undertaken in parallel, with the process modification route a less desirable solution since already manufactured wafers would need to be scrapped in favour of the new ones. Based on a knowledge of the existing process, and testing done on the worst performing wafers, it was proposed that raising the core operating voltage of the ABCStar from 1.20V to 1.25V could address the timing issue by sufficiently speeding up its transistors. An extensive testing program that included the effects of temperature and radiation expected over the lifetime of the ITk detector was conducted to validate that approach. Those tests and studies proved that even the worst performing wafers would have yields over 80% with the 1.25V core voltage, and neither the modified process nor redesign would be required for ensuring reliable operation of the ITk. Based on testing, a further timing mitigation was implemented to provide an additional margin of reliability by increasing the duty cycle of the clock to the ABCStar. Testing of all ABCStar wafers has been completed and the production of the detector modules using these ASICs is now well underway as a result of the efforts detailed herein.

FOS: Physical sciences

High-performance 2D electronic devices enabled by strong and tough two-dimensional polymer with ultra-low dielectric constant

As the feature size of microelectronic circuits is scaling down to nanometer order, the increasing interconnect crosstalk, resistance-capacitance (RC) delay and power consumption can limit the chip performance and reliability. To address these challenges, new low-k dielectric (k < 2) materials need to be developed to replace current silicon dioxide (k = 3.9) or SiCOH, etc. However, existing low-k dielectric materials, such as organosilicate glass or polymeric dielectrics, suffer from poor thermal and mechanical properties. Two-dimensional polymers (2DPs) are considered promising low-k dielectric materials because of their good thermal and mechanical properties, high porosity and designability. Here, we report a chemical-vapor-deposition (CVD) method for growing fluoride rich 2DP-F films on arbitrary substrates. We show that the grown 2DP-F thin films exhibit ultra-low dielectric constant (in plane k = 1.85 and out-of-plane k = 1.82) and remarkable mechanical properties (Young’s modulus > 15 GPa). We also demonstrated the improved performance of monolayer MoS 2 field-effect-transistors when utilizing 2DP-F thin films as dielectric substrates.

36 MATERIALS SCIENCE

Theoretical perspective on phase stability and polarization switching in ferroelectric hafnia

Fluorite-based ferroelectric materials are revolutionizing the application space of polar semiconductors. These materials leverage robust polarization of extremely thin films, compatibility with the silicon chip processing, and decades of manufacturing experience to enable a new generation of ferroelectric memory devices. As a new paradigm for ferroelectrics, understanding of phase transitions and the switching mechanism in fluorites is essential both for advancing applications and for fundamental science. In this article, we outline the recent progress that has been made to understand the relative phase stability, phase transition and order parameter coupling, ferroelectric switching through unique nucleation and growth processes, and how defects affect these phases and processes. The main challenges, opportunities, and next steps for leveraging these materials for next-generation devices are reviewed.

Condensed Matter Physics