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Improvements in the open-circuit voltage of 0.1 ohm-cm silicon solar cells have been achieved using a multistep diffusion technique. Experimental details are given along with the results of an analysis that indicate that anomalous behaviors of the electron mobility in the cell base limits attainment of higher voltages.
A power factor type motor controller is disclosed in which the conventional power factor constant voltage command signal is replaced during a starting interval with a graduated control voltage. This continuation-impart of a pending patent application (Serial No. 199, 765: Three Phase Factor Controller) provides a means for modifying the operation of the system for a motor start-up interval of 5 to 30 second. Using a ramp generators, an initial ramp-like signal replaces a constant power factor signal supplied by a potentiometer. The ramp-like signal is applied to a 15 terminal where it is summed with an operating power factor signal from phase detectors in order to obtain a control signal for ultimately controlling SCR devices. The SCR devices are turned on at an advancing rate with time responsive to the combination signal described rather than simply a function of a ramp-like signal alone.
Design considerations, fabrication procedures, and methods of evaluation for high-voltage power-transistor development are discussed. Technique improvements such as controlling the electric field at the surface and perserving lifetimes in the collector region which have advanced the state of the art in high-voltage transistors are discussed. These improvements can be applied directly to the development of 1200 volt, 200 ampere transistors.
An improved equation for battery discharge voltage was developed. By looking at the voltage discharge curves, some prediction of cell life could be made.
A theory is presented for the steady-state potential of insulated surfaces near exposed high voltages. The term 'insulated surfaces' is used to mean either dielectric surfaces or electrically isolated metallic surfaces. The potential is bounded below by the zero of the material's I-V curve assuming total suppression of secondary electrons, and above by assuming total extraction of secondaries. Within these bounds, the material's surface potential is determined consistently with the solution to Poisson's equation external to the vehicle. The theory is compared with rocket experiments and with SCATHA satellite data. Also, an explanation is suggested for the observed 'snapover' of solar cell coverslips from near plasma ground potential to near the potential of positively biased interconnects with increasing bias voltage.
Standard integrated circuit technology has been developed for the design and fabrication of planar multijunction (PMJ) solar cell chips. Each 1 cm x 1 cm solar chip consisted of six n(+)/p, back contacted, internally series interconnected unit cells. These high open circuit voltage solar cells were fabricated on 2 ohm-cm, p-type 75 microns thick, silicon substrates. A five photomask level process employing contact photolithography was used to pattern for boron diffusions, phorphorus diffusions, and contact metallization. Fabricated devices demonstrated an open circuit voltage of 3.6 volts and a short circuit current of 90 mA at 80 AMl suns. An equivalent circuit model of the planar multi-junction solar cell was developed.
Optical preprocessor compares 16 incoming signals with reference voltages. Integrated optical substraction to take "vector difference" of two sets of analog voltages. Applications include satellite onboard processing of pictorial data so data not useful discardes; device recognizes presence of accessive cloud cover and signals hault to data transmission.
An apparatus and method for comparing internal voltage potentials of first and second operating electronic components such as large scale integrated circuits (LSI's) in which voltage differentials are visually identified via an appropriate display means are described. More particularly, in a first embodiment of the invention a first and second scanning electron microscope (SEM) are configured to scan a first and second operating electronic component respectively. The scan pattern of the second SEM is synchronized to that of the first SEM so that both simultaneously scan corresponding portions of the two operating electronic components. Video signals from each SEM corresponding to secondary electron signals generated as a result of a primary electron beam intersecting each operating electronic component in accordance with a predetermined scan pattern are provided to a video mixer and color encoder.
This report supplies the technical background and design techniques needed by an engineer who is designing electrical insulation for high-voltage, high-power components, equipment, and systems on spacecraft. The data in this volume is in addition to the material in Volume 4 of the final report "High Voltage Design Guide: Aircraft' which is common to the electrical insulation design for both aircraft and spacecraft equipment. The common data includes testing, tracking, partial discharges and corona. Unique material involves the semi vacuum environment, spacecraft charging, and multipactor.
The results of testing a high voltage electrical power system (EPS) breadboard using high voltage power processing equipment developed at Marshall Space Flight Center and Ni-Cd batteries are discussed. These test results are used to extrapolate to an efficient, reliable, high capacity EPS for near term low Earth orbit, high power applications. EPS efficiencies, figures of merit, and battery reliability with a battery protection and reconditioning circuit are presented.
Voltage breakdown failures in photovoltaic module electrical insulations lead to loss of entire source circuits and require costly maintenance and replacement. Avoiding such catastrophes requires that modules be designed so that voltage breakdown either never occurs or occurs so rarely that it affects the least life cycle energy costs insignificantly. To achieve this desired balance of cost and reliability, the module design engineer must understand the failure mechanisms and use data on materials and failue rates to suppress or retard them. Recently obtained failure mechanism information, rate data and materials property data and a qualitative model of module failure prediction are presented.
A new concept of using a tapped output-filter inductor and an auxiliary commutating diode to reduce the likelihood of transformer core saturation in a push-pull, voltage-fed converter is presented. The linearized circuit model and transfer functions are derived with a hybrid approach using both state-space and circuit averaging. Operation of the new converter - including parasitic effects - is discussed, and a design equation for inductor tap ratio is established. It is predicted and experimentally confirmed that the new converter has more symmetrical transformer core operation, and the potential exits for lower transistor turnon current and reduced transistor voltage stress. These benefits reduce switching loss and enhance transistor reliability.
The surface of low-resistivity silicon solar cells appears to be a major source of dark diffusion current. This region, consisting of the interface and the adjacent heavily doped layer, therefore, prevents attainment of the high open-circuit voltages expected from these cells. This paper describes the experimental effort carried out to reduce the various contributions of dark current from the surface. Analysis of results from this effort points to means of improving cell voltages by changing processing and structures.
Arcing to negatively biased, exposed solar cell interconnects on solar arrays placed in plasma environments was established. Arcing, however, may cause damaging interference with the operation of electrical power systems in spacecraft planned to be driven with high-voltage solar arrays. An analytical model was developed to estimate the effects of netagive bias arcs on solar array power system performance. Solar cell characteristics, plasma interactions, and power system features are modeled by a linear, lumped element transient circuit, and the time domain equations are solved. Numerical results for solar array common mode and load voltage transients are calculated for typical conditions. Acceptable load transients are found for a range of arc current amplitudes and time constants.
A new family of semiconductor switches using double injection techniques and compensated deep impurities is described. They have the potential to raise switching voltages a factor of 10 higher (up to 100 kV) than p-n junction devices while exhibiting extremely low (or zero) forward voltage. Several potential power switching applications are indicated.
The plasma coupling current to an approximately 2000 sq cm array was measured for externally biased positive and negative voltages on the array to 1000 V in applied magnetic field strengths from 0 to 0.93 G. The plasma density varied from 2,000 to 1.3 million electrons/cu cm. It was found that the magnetic field primarily increased the plasma coupling current for negative biases. For positive bias, the current could increase or decrease depending on the voltage, field strength, and plasma density. It was also found that the plasma coupling current was not very sensitive to how the plane of the array was oriented relative to the magnetic field.
High-low (HL) junctions form a part of many semiconductor devices, including back surface field solar cells. A first experimental determination and interpretation of the voltage across the HL junction under low- and high-injection conditions is presented as a function of the voltage across a nearby p/n junction. Theoretical analysis from first principles is shown to bear well on the experimental results. In addition, a test structure is proposed for measurement of the effective surface recombination velocity at the HL junctions.
A new family of semiconductor switches using double injection techniques and compensated deep impurities is described. They have the potential to raise switching voltages a factor of 10 higher (up to 100 kV) than p-n junction devices while exhibiting extremely low (or zero) forward voltage. Several potential power switching applications are indicated.