Engineering Papers⌕ Search

SEARCH · Engineering Papers

Results for “GaTe”

Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

Quote a phrase for an exact phrase match. Source license links do not imply unrestricted reuse.

At least 1,621 records · Page 90
All sourcesNASA NTRSDOE OSTI
NASA NTRS1979

Analysis of GEOS-3 altimeter data and extraction of ocean wave height and dominant wavelength

When the amplitude and timing biases are removed from the GEOS-3 Sample and Hold (S&H) gates, the mean return waveforms can be excellently fitted with a theoretical template which represents the convolution of: (1) the radar point target response; (2) the range noise (jitter) in the altimeter tracking loop; (3) the sea surface height distribution; and (4) the antenna pattern as a function of the range to mean sea level. Several techniques of varying complexity to remove the effect of the tracking loop jitter in computing the wave height are considered. They include: (1) realigning the S&H gates to their actual positions with respect to mean sea level before averaging; (2) using the observed standard deviation on the altitude measurement to remove the integrated effect of the tracking loop jitter, and (3) using a look-up table to correct for the expected value of range noise. Analysis of skewness in the GEOS return waveform demonstrates the potential of a satellite radar altimeter to determine the dominant wavelength of ocean waves.

Walsh, E. J.↗
NASA NTRS1979

Development of non-volatile semiconductor memory

A 256 word by 8-bit random access memory chip was developed utilizing p channel, metal gate metal-nitride-oxide-silicon (MNOS) technology; with operational characteristics of a 2.5 microsecond read cycle, a 6.0 microsecond write cycle, 800 milliwatts of power dissipation; and retention characteristics of 10 to the 8th power read cycles before data refresh and 5000 hours of no power retention. Design changes were implemented to reduce switching currents that caused parasitic bipolar transistors inherent in the MNOS structure to turn on. Final wafer runs exhibited acceptable yields for a die 250 mils on a side. Evaluation testing was performed on the device in order to determine the maturity of the device. A fixed gate breakdown mechanism was found when operated continuously at high temperature.

Heikkila, W. W.↗
NASA NTRS1979

Development and fabrication of low ON resistance high current vertical VMOS power FETs

The design of a VMOS Power FET exhibiting low ON resistance, high current as well as high breakdown voltage and fast switching speeds is described. The design which is based on a 1st-order device model, features a novel polysilicon-gate structure and fieldplated groove termination to achieve high packing density and high breakdown voltage, respectively. One test chip, named VNTKI, can block 180 V at an ON resistence of 2.5 ohm. A 150 mil x 200 mil (.19 sq cm) experimental chip has demonstrated a breakdown voltage of 200v, an ON resistance of 0.12 ohm, a switching time of less than 100 ns, and a pulse drain - current of 50 A with 10 V gate drive.

Kay, S.↗
NASA NTRS1981

CADAT network translator

Program converts cell-net data into logic-gate models for use in test and simulation programs. Input consists of either Place, Route, and Fold (PRF) or Place-and-Route-in-Two-Dimensions (PR2D) layout data deck. Output consists of either Test Pattern Generator (TPG) or Logic-Simulation (LOGSIM) logic circuitry data deck. Designer needs to build only logic-gate-model circuit description since program acts as translator. Language is FORTRAN IV.

Pitts, E. R.↗
NASA NTRS1979

Ku-band field-effect power transistors

A single stage amplifier was developed using an 8 gate, 1200 micrometer width device to give a gain of 3.3 + or - 0.1 dB over the 14.4 to 15.4 GHz band with an output power of 0.48 W and 15% minimum efficiency with 0.255 W of input power. With two 8 gate devices combined and matched on the device carrier, using a lumped element format, a gain of 3 dB was attained over the 14.5 to 15.5 GHz band with a maximum efficiency of 9.9% for an output power of 0.8 W.

Taylor, G. C.↗
NASA NTRS1979

Distributed effect in GaAs MESFET

In order to obtain higher output power, the width of a single cell MESFET must be large. When it becomes too large the distributed effect along the width direction tends to limit the output power. It is found that the distributed effect is important when the gate width not less than 150 microns and that the gain decreases with gate width. Also found is that spurious oscillations occur due to line resonances at much higher frequencies than can be accounted for by the instability factor in the discrete device model.

Wang, Y.-C.↗
NASA NTRS1980

Frequency response of charge transfer in MOS inversion layers

The dynamics of charge transfer from a reservoir into an MOS inversion layer, which limits the frequency response of an MOS transistor or a charge-coupled device, is investigated. Using Berman and Kerr's model of space-charge capacitance in the semiconductor, a small-signal distributed model is developed for an MOS structure which transfers charge in an inversion channel due to a variation in the gate voltage. The dynamics of the charge transfer is characterized by a time constant which is determined by the length of the inversion channel and its mobility. Experimental data of gate capacitance vs frequency, taken from a test structure with a diffused source/drain well, are satisfactorily fitted by theoretical curves derived from the model. The channel mobility is precisely determined from the adjusted time constant. The influence of interface states on the capacitance-frequency relationship is also briefly discussed.

Lieneweg, U.↗
NASA NTRS1982

Improved Model for MOS Breakdown

With an improved model, accelerated high-field tests can be used to predict gate-oxide breakdown in metal-oxide-semi-conductor (MOS) structures. Principal mechanism in MOS breakdown is mobile-ion emission from metal/oxide interface, which occurs during application of positive gate-bias field. Breakdown is related to clustering of emitted ions at localized defect sites in oxide/silicon interface. Using new model to interpret data, tests that normally take several weeks at low fields to accumulate sufficient statistics can be completed in only a few hours at high fields.

Li, S. P.↗
NASA NTRS1978

Design, development, fabrication and delivery of register and multiplexer units

Several approaches for implementing the register and multiplexer unit into two CMOS monolithic chip types were evaluated. The CMOS standard cell array technique was selected and implemented. Using this design automation technology, two LSI CMOS arrays were designed, fabricated, packaged, and tested for proper static, functional, and dynamic operation. One of the chip types, multiplexer register type 1, is fabricated on a 0.143 x 0.123 inch chip. It uses nine standard cell types for a total of 54 standard cells. This involves more than 350 transistors and has the functional equivalent of 111 gates. The second chip, multiplexer register type 2, is housed on a 0.12 x 0.12 inch die. It uses 13 standard cell types, for a total of 42 standard cells. It contains more than 300 transistors, the functional equivalent of 112 gates. All of the hermetically sealed units were initially screened for proper functional operation. The static leakage and the dynamic leakage were measured. Dynamic measurements were made and recorded. At 10 V, 14 megabit shifting rates were measured on multiplexer register type 1. At 5 V these units shifted data at a 6.6 MHz rate. The units were designed to operate over the 3 to 15 V operating range and over a temperature range of -55 to 125 C.

Feller, A.↗
NASA NTRS1980

Redundant operation of counter modules

A technique for the redundant operation of counter modules is described. Redundant operation is maintained by detecting the zero state of each counter and clearing the other to that state, thus periodically resynchronizing the counters, and obtaining an output from both counters through AC coupled diode-OR gates. Redundant operation of counter flip flops is maintained in a similar manner, and synchronous operation of redundant squarewave clock generators of the feedback type is effected by connecting together the feedback inputs of the squarewave generators through a coupling resistor, and obtaining an output from both generators through AC coupled diode-OR gates.

Nagano, S.↗
NASA NTRS1981

Evaluation of Microwave Landing System (MLS) effect on the delivery performance of a fixed-path metering and spacing system

Metering and spacing (M & S) system's algorithms described assume an aircraft two dimensional are navigation capability. The three navigation systems compared were: very high frequency omnidirectional range/distance measuring equipment (VOR/DME) and ILS, VOR/DME and + or - 40 MLS, and VOR/DME and + or - 60 MLS. Other factors studied were M & S tentative schedule point location, route geometry effects, and approach gate location effects. Summarized results are: the MLS offers some improvement over VOR/DME and ILS if all approach routes contain computer assisted turns; pilot reaction to moving the gate closer to the runway threshold may adversely affect M & S performance; and coupling en route metering to terminal scheduling transfers most of the terminal holding to more full efficient, higher altitude en route delay.

Credeur, L.↗
NASA NTRS1983

Hardware Fault Simulator for Microprocessors

Breadboarded circuit is faster and more thorough than software simulator. Elementary fault simulator for AND gate uses three gates and shaft register to simulate stuck-at-one or stuck-at-zero conditions at inputs and output. Experimental results showed hardware fault simulator for microprocessor gave faster results than software simulator, by two orders of magnitude, with one test being applied every 4 microseconds.

Hess, L. M.↗
NASA NTRS1982

High temperature LSI

Integrated injection logic (1,2) technology for reliable operation under a -55 C to +300 C, temperature range is discussed. Experimental measurements indicate that an 80 mv signal swing is available at 300 C with 100 micro A injection current per gate. In addition, modeling results predict how large gate fan-ins can decrease the maximum thermal operational limits. These operational limits and the longterm reliability factors associated with device metallization are evaluated via specialized test mask.

Dening, D. C.↗
NASA NTRS1982

Digital demodulator

A digital demodulator for converting pulse code modulated data from phase shift key (PSK) to non return to zero (NRZ) and to biphase data is described. The demodulator is composed of standard integrated logic circuits. The key to the demodulation function is a pair of cross coupled one shot multivibrators and which with a flip-flop produce the NRZ-L is all that is required, the circuitry is greatly simplified and the 2(v) times bit rate contraint can be removed from the carrier. A flip-flop, an OR gate, and AND gate and a binary counter generate the bit rate clock (BTCK) for the NRZ-L. The remainder of the circuitry is for converting the NRZ-L and BTCK into biphase data. The device was designed for use in the space shuttle bay environment measurements.

Shull, T. A.↗
NASA NTRS1982

Dynamic switch matrix for the TDMA satellite switching system

Future high capacity satellite communication systems require signal processing on board satellites. The on-board signal processing includes switching of RF signals between multiple antennas to provide interconnection between the uplink and downlink beams. This paper describes the development of a dynamic switch matrix for a TDMA satellite switching system to be used in the next generation communications satellites. In this paper, a dynamic switch matrix, which includes the microwave switch matrix, the distribution control unit and the timing source, will be described. Several different microwave switch matrix architectures and switching devices were evaluated and compared. A unique coupler crossbar switch matrix architecture with dual-gate field effect transistor as switching element was developed. Experimental results of both microwave switch matrix (MSM) and distribution control unit (DCU) are presented. These test results verify the MSM with coupler crossbar architecture and dual-gate FET as switching element will meet the future SS-TDMA system requirements. Finally, the reliability of the dynamic switch matrix is addressed. The analysis shows reliability of 0.9981 for 7 year space operation can be achieved for the designed dynamic switch matrix.

Ho, P. T.↗
NASA NTRS1982

Beyond the supercomputer

A NASA-directed development of massively parallel processor (MPP) computers is outlined, noting intended applications for data processing for near term earth resource and environment mapping, radar, and television transmissions. The MPP is designed to perform 100 billion operations/sec to obtain satisfactory image processing, while separate processing units correct distortions, register images, calculate correlation functions, and classify multispectral characteristics. Arrays of 1s and 0s will be manipulated in analog-to-digital conversions generating separate planes corresponding to powers of binaries. Data wires are replaced by fiber-optic tubes or thousands of wires, and single logic gates are replaced by thousands of logic gates and every memory element by thousands of memory elements. Features of the interconnections and the images control processor units are detailed, along with implementation of sliders for program flexibility.

Schaefer, D. H.↗
NASA NTRS1982

Pulsed phase locked loop strain monitor

The RF output of a voltage controlled oscillator (VCO) is periodically gated to a transducer which produces acoustic waves in a bolt. The reflected acoustic waves are converted to electrical signals by the transducer and gated to a mixer which also receives the output from the VCO and produces an output which is filtered by a low pass filter. The output of filter is a dc signal proportional to the phase difference change from a fixed phase difference between the two input signals to the mixer. This dc signal is sampled at an instant and held by circuit in response to the "P" signal. The output of the circuit is integrated and then applied to the VCO to change the frequency of the VCO such that the phase difference between the two inputs to the mixer remains at the fixed phase difference. The frequency of the VCO is a measure of the change in strain of the bolt.

Heyman, J. S.↗
NASA NTRS1981

Raingage network sampling statistics

Sampling problems raise large difficulties for the precipitation measurements from space. In the tropics rainfall processes are organized in scales which are hardly resolved by the microwave radiometers on board of satellites. Even in the cloud clusters, which mark significant, large extended signals in the visible and infrared images, the precipitation areas cover only a small region. Our analysis of the cloud clusters over the W Pacific Ocean revealed that more than 50% of the area of a typical Western Pacific cluster are without rain. The radar observations during GATE generally confirmed those results. The rainfall was calculated from Nimbus V microwave data at 19.35 GHz and the results were compared with the GATE radar rainfall. The results are improved if the rain areas within the field of view are determined by additional observations and lead to a correction of the microwave brightness temperature.

Vogel, J. L.↗