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At least 163 records · Page 9

A new fabrication technique for back-to-back varactor diodes

A new varactor diode process has been developed in which much of the processing is done from the back of an extremely thin semiconductor wafer laminated to a low-dielectric substrate. Back-to-back BNN diodes were fabricated with this technique; excellent DC and low-frequency capacitance measurements were obtained. Advantages of the new technique relative to other techniques include greatly reduced frontside wafer damage from exposure to process chemicals, improved capability to integrate devices (e.g. for antenna patterns, transmission lines, or wafer-scale grids), and higher line yield. BNN diodes fabricated with this technique exhibit approximately the expected capacitance-voltage characteristics while showing leakage currents under 10 mA at voltages three times that needed to deplete the varactor. This leakage is many orders of magnitude better than comparable Schottky diodes.

Smith, R. Peter↗

Design, performance, and evaluation of a direct-current contactor for space nuclear electrical systems

A direct-current contactor for use in large space power systems was designed, built, and tested. It was developed to be operational in an environment of 540 C and at a pressure of 0.0001 N/sq m or lower. The contactor is rated to pass 10 A continuously and to interrupt a 20-A current at 10,000 V. It was tested to determine the corona threshold level and the leakage current at different temperatures. Also, it was tested for its closing and interruption ability.

Mueller, L. A.↗

Mechanism for nearly ohmic behavior in annealed Au/n-GaAs Schottky diodes

The mechanism of the ohmic behavior commonly observed after annealing Au/n-GaAs 110-oriented Schottky diodes was investigated using electron-beam-induced current (EBIC) measurements, secondary electron imaging (SEI), and SEM and TEM observations. The results showed that the ohmic behavior of annealed Schottky diodes originates from a shunt current pathway at the diode periphery. The SEI, EBIC, and electrical measurements indicated that the ohmic leakage current is due to the surface recombinations at the exposed surface of GaAs between elongated Au crystallites.

Leon, R. P.↗

2D Quantum Transport Modeling in Nanoscale MOSFETs

With the onset of quantum confinement in the inversion layer in nanoscale MOSFETs, behavior of the resonant level inevitably determines all device characteristics. While most classical device simulators take quantization into account in some simplified manner, the important details of electrostatics are missing. Our work addresses this shortcoming and provides: (a) a framework to quantitatively explore device physics issues such as the source-drain and gate leakage currents, DIBL, and threshold voltage shift due to quantization, and b) a means of benchmarking quantum corrections to semiclassical models (such as density- gradient and quantum-corrected MEDICI). We have developed physical approximations and computer code capable of realistically simulating 2-D nanoscale transistors, using the non-equilibrium Green's function (NEGF) method. This is the most accurate full quantum model yet applied to 2-D device simulation. Open boundary conditions, oxide tunneling and phase-breaking scattering are treated on equal footing. Electrons in the ellipsoids of the conduction band are treated within the anisotropic effective mass approximation. Quantum simulations are focused on MIT 25, 50 and 90 nm "well- tempered" MOSFETs and compared to classical and quantum corrected models. The important feature of quantum model is smaller slope of Id-Vg curve and consequently higher threshold voltage. These results are quantitatively consistent with I D Schroedinger-Poisson calculations. The effect of gate length on gate-oxide leakage and sub-threshold current has been studied. The shorter gate length device has an order of magnitude smaller current at zero gate bias than the longer gate length device without a significant trade-off in on-current. This should be a device design consideration.

Svizhenko, Alexei↗

Induced emission of radiation from a large space-station-like structure in the ionosphere

Large conducting structures in the ionosphere may have currents flowing through them which close in the ionospheric plasma. These currents can arise either from current leakage from an onboard power distribution system or by being induced by the motional electric field. Associated with these currents will be broadband electromagnetic radiation in the Alfven and lower hybrid bands. The radiation impedance of this electromagnetic radiation is explored for a structure of space-station-like dimensions as a function of the geometry of the structure and the composition of the ionic environment. It is shown that modification of the collecting area of the structure and environment can be used to minimize the radiation impedance. For a space station, the radiated power will at most be of the order of watts, which does not represent a significant power loss. However, the radiation field will give rise to a substantial pollution of the electromagnetic spectrum in the vicinity of the space station. Design choices to minimize this interference are suggested.

Hastings, D. E.↗

A low noise CMOS camera system for 2D resonant inelastic soft X-ray scattering

Resonant Inelastic X-ray Scattering (RIXS) is a powerful spectroscopic technique to study quantum properties of materials in the bulk. A novel variant of RIXS, called 2D RIXS, enables concurrent measurement of the scattered X-ray spectrum for a wide range of input energies, improving on the typically low throughput of 1D RIXS. In the soft X-ray domain, 2D RIXS demands an X-ray camera system with small pixels, large area, high quantum efficiency and low noise to limit the false detection rate in long duration exposures. We designed and implemented a 7.5 Megapixel back-illuminated CMOS detector with 5 μm pixels and high quantum efficiency in the 200–1,000 eV X-ray energy range for the QERLIN 2D RIXS spectrometer at the Advanced Light Source. The QERLIN beamline and detector are currently in commissioning. The camera noise from in-situ 3 s long dark exposures is 7e - or less and the leakage current is 6.5 × 10 -3 e - /(pixel ∙ s). For individual 500 eV X-rays, the expected efficiency is greater than 75% and the false detection rate is ~1 × 10 -5 per pixel.

47 OTHER INSTRUMENTATION↗

Characterization of Piezoelectric Stacks for Space Applications

Future NASA missions are increasingly seeking to actuate mechanisms to precision levels in the nanometer range and below. Co-fired multilayer piezoelectric stacks offer the required actuation precision that is needed for such mechanisms. To obtain performance statistics and determine reliability for extended use, sets of commercial PZT stacks were tested in various AC and DC conditions at both nominal and high temperatures and voltages. In order to study the lifetime performance of these stacks, five actuators were driven sinusoidally for up to ten billion cycles. An automated data acquisition system was developed and implemented to monitor each stack's electrical current and voltage waveforms over the life of the test. As part of the monitoring tests, the displacement, impedance, capacitance and leakage current were measured to assess the operation degradation. This paper presents some of the results of this effort.

active mirrors↗

Leakage effects in n-GaAs MESFET with n-GaAs buffer layer

Whereas improvement of the interface between the active layer and the buffer layer has been demonstrated, the leakage effects can be important if the buffer layer resistivity is not sufficiently high and/or the buffer layer thickness is not sufficiently small. It was found that two buffer leakage currents exist from the channel under the gate to the source and from drain to the channel in addition to the buffer leakage resistance between drain and source. It is shown that for a 1 micron gate-length n-GaAs MESFET, if the buffer layer resistivity is 12 OHM-CM and the buffer layer thickness h is 2 microns, the performance of the device degrades drastically. It is suggested that h should be below 2 microns.

Wang, Y. C.↗

Low Temperature (30 K) TID Test Results of a Radiation Hardened 128 Channel Serial-to-Parallel Converter

This viewgraph presentation reviews the low temperature, Total Ionizing Dose (TID) tests of radiation hardened serial to parallel converter to be used on the James Webb Space Telescope. The test results show that the original HV583 level shifter - a COTS part -was not suitable for JWST because the supply currents exceeded specs after 20 krad( Si) .The HV584 - functionally similar to the HV583 -was designed using RHBD approach that reduced the leakage currents to within acceptable levels and had only a small effect on the level-shifted output voltage.

Meyer, Stephen↗

Effects of fast and thermal neutron irradiation on Ga-polar and N-polar GaN diodes

Studies of the radiation tolerance and electrical behavior of gallium nitride (GaN) based devices are important for the next generation of high-power and high-voltage electronics that may be subjected to harsh environments such as nuclear reactor and fusion facilities, particle accelerators, and post-denotation environments. Here, in this work, we study the behavior of Ga-polar and N-polar GaN Schottky diodes before and after exposure to fast and thermal + fast neutrons. Temperature-dependent current–voltage (I–V) and circular transmission line method (CTLM) measurements were used to study the electrical characteristics. A strong reduction in reverse leakage current and an increase in differential resistance in forward bias were observed after neutron irradiation. Thermionic emission (TE), Frenkel–Poole (FP) emission, and Fowler–Nordheim (FN) tunneling models were used to explain the forward and reverse I–V characteristics pre- and post-irradiation. The study confirms that Ga-polar and N-polar GaN Schottky diodes exhibit different electrical responses to fast and thermal neutron irradiations. The reverse bias characteristics of N-polar diodes are less affected after the fast neutron irradiation compared to Ga-polar diodes, while in the forward bias region, the electrical behavior after fast and thermal neutron irradiations is similar in Ga-polar and N-polar diodes. The results indicate that the role of orientation should be considered in the design of GaN-based radiation-tolerant electronics.

42 ENGINEERING↗

Lightning Pin Injection Testing on MOSFETS

Lightning transients were pin-injected into metal-oxide-semiconductor field-effect transistors (MOSFETs) to induce fault modes. This report documents the test process and results, and provides a basis for subsequent lightning tests. MOSFETs may be present in DC-DC power supplies and electromechanical actuator circuits that may be used on board aircraft. Results show that unprotected MOSFET Gates are susceptible to failure, even when installed in systems in well-shielded and partial-shielded locations. MOSFET Drains and Sources are significantly less susceptible. Device impedance decreased (current increased) after every failure. Such a failure mode may lead to cascading failures, as the damaged MOSFET may allow excessive current to flow through other circuitry. Preliminary assessments on a MOSFET subjected to 20-stroke pin-injection testing demonstrate that Breakdown Voltage, Leakage Current and Threshold Voltage characteristics show damage, while the device continues to meet manufacturer performance specifications. The purpose of this research is to develop validated tools, technologies, and techniques for automated detection, diagnosis and prognosis that enable mitigation of adverse events during flight, such as from lightning transients; and to understand the interplay between lightning-induced surges and aging (i.e. humidity, vibration thermal stress, etc.) on component degradation.

Ely, Jay J.↗

Solar Array at Very High Temperatures: Ground Tests

Solar array design for any spacecraft is determined by the orbit parameters. For example, operational voltage for spacecraft in Low Earth Orbit (LEO) is limited by significant differential charging due to interactions with low temperature plasma. In order to avoid arcing in LEO, solar array is designed to generate electrical power at comparatively low voltages (below 100 V) or to operate at higher voltages with encapsulated of all suspected discharge locations. In Geosynchronous Orbit (GEO) differential charging is caused by energetic electrons that produce differential potential between coverglass and conductive spacecraft body in a kilovolt range. In such a case, weakly conductive layer over coverglass (ITO) is one of possible measures to eliminate dangerous discharges on array surface. Temperature variations for solar arrays in both orbits are measured and documented within the range of -150 C +110 C. This wide interval of operational temperatures is regularly reproduced in ground tests with radiative heating and cooling inside shroud with flowing liquid nitrogen. The requirements to solar array design and tests turn out to be more complicated when planned trajectory crosses these two orbits and goes closer to Sun. Conductive layer over coverglass causes sharp increase in parasitic current collected from LEO plasma, high temperature may cause cracks in encapsulating material (RTV), radiative heating of coupon in vacuum chamber becomes practically impossible above 150 C, conductivities of glass and adhesive go up with temperature that decrease array efficiency, and mechanical stresses grow up to critical magnitudes. A few test arrangements and respective results are presented in current paper. Coupons were tested against arcing in simulated LEO and GEO environments under elevated temperatures up to 200 C. The dependence of leakage current on temperature was measured, and electrostatic cleanness was verified for coupons with antireflection (AR) coating over ITO layer.

differential charging↗

Wafer-scale high-k SrTiO 3 dielectrics with rational barrier-layer design for low leakage and high charge density

High-k oxides such as SrTiO 3 promise large capacitance, but their dielectric response is often limited by leakage currents due to reduced bandgaps. We show that introducing a thin barrier layer beneath SrTiO 3 is a simple and effective way to suppress leakage and increase charge density. Using hybrid molecular beam epitaxy, we grew uniform SrTiO 3 films on Nb:SrTiO 3 , CaSnO 3 /Nb:SrTiO 3 , and 2-in. SiO 2 /p-Si stacks to directly compare how different barrier layers influence device behavior. Both CaSnO 3 and SiO 2 reduce leakage, but the ultra-wide-bandgap SiO 2 layer enables much higher operating voltages, yielding charge densities exceeding 5 × 10 13 cm −2 at room temperature—more than a fivefold enhancement compared to devices without a barrier layer. This improvement comes with a predictable trade-off: the lower dielectric constant of SiO 2 reduces overall capacitance, making its thickness an important design parameter. Together, these results demonstrate that rational barrier-layer engineering—including wafer-scale integration on Si—provides a clear pathway to achieving higher charge densities in SrTiO 3 -based dielectric devices.

36 MATERIALS SCIENCE↗

Solar Array at Very High Temperatures: Ground Tests

Solar array design for any spacecraft is determined by the orbit parameters. For example, operational voltage for spacecraft in Low Earth Orbit (LEO) is limited by significant differential charging due to interactions with low temperature plasma. In order to avoid arcing in LEO, solar array is designed to generate electrical power at comparatively low voltages (below 100 volts) or to operate at higher voltages with encapsulation of all suspected discharge locations. In Geosynchronous Orbit (GEO) differential charging is caused by energetic electrons that produce differential potential between the coverglass and the conductive spacecraft body in a kilovolt range. In such a case, the weakly conductive layer over coverglass, indium tin oxide (ITO) is one of the possible measures to eliminate dangerous discharges on array surface. Temperature variations for solar arrays in both orbits are measured and documented within the range of minus150 degrees Centigrade to plus 1100 degrees Centigrade. This wide interval of operational temperatures is regularly reproduced in ground tests with radiative heating and cooling inside a shroud with flowing liquid nitrogen. The requirements to solar array design and tests turn out to be more complicated when planned trajectory crosses these two orbits and goes closer to the Sun. The conductive layer over coverglass causes a sharp increase in parasitic current collected from LEO plasma, high temperature may cause cracks in encapsulating (Room Temperature Vulcanizing (RTV) material; radiative heating of a coupon in vacuum chamber becomes practically impossible above 1500 degrees Centigrade; conductivities of glass and adhesive go up with temperature that decrease array efficiency; and mechanical stresses grow up to critical magnitudes. A few test arrangements and respective results are presented in current paper. Coupons were tested against arcing in simulated LEO and GEO environments under elevated temperatures up to 2000 degrees Centigrade. The dependence of leakage current on temperature was measured, and electrostatic cleanness was verified for coupons with antireflection (AR) coating over the indium tin oxide (ITO) layer.

differential charging↗

Interactions between the Space Station and the environment: A preliminary assessment of EMI

A review of the interactions between proposed Space Station systems/payloads and the environment that contribute to electromagnetic interference was performed. Seven prime sources of interference have been identified. These are: The Space Station power system; active experiments such as beam injection; ASTROMAG; ram and wake density gradients; pick up ions produced by vented or offgassed clouds; waves produced by current loops that include the plasma and structure; arcing from high voltage solar arrays (or possible ESD in polar orbit). This review indicates that: minimizing leakage current from the 20 kHz power system to the structure; keeping the surfaces of the Space Station structure, arrays, and radiators nonconducting; minimizing venting of payloads or systems to non-operational periods; careful placement of payloads sensitive to magnetic field perturbations or wake noise; and designing an operational timeline compatible with experiment requirement are the most effective means of minimizing the effects of this interference. High degrees of uncertainty exist in the estimates of magnitudes of gas emission induced EMI, radiation of 20 kHz and harmonics, ASTROMAG induced interference, and arc threshold/frequency of the solar array. These processes demand further attention so that mitigation efforts are properly calibrated.

Murphy, G. B.↗

Temperature-Dependent Transport Characteristics of 2D MoS2 Channel FETs Grown Using Salt-Based Precursors

D Transition Metal Dichalcogenides (TMDs), particularly MoS2, are promising candidates for sub-10 nm Gate All Around (GAA) CMOS FETs. Salt-assisted Chemical Vapor Deposition (CVD) enable lateral MoS2 growth at atmospheric pressure and low temperatures. This work analyzes salt-based precursor-driven CVD-grown MoS2 FETs at various temperatures. MoS2 was grown using Ammonium Molybdate salt, sulfurized at 750∘C, and transferred onto p−Si3/SiO2 substrates. At room temperature, threshold voltage (VT) ranged from -35 V to -25 V, with a peak drain current of 1.2μA/μm. As temperature increased above 325K, VT shifted exponentially, and carrier mobility dropped significantly. At 400 K, the gate lost channel control, though gate leakage current remained low. These results are compared with non-salt-based MoS2 growth to assess salt precursor effects.Notice: This manuscript has been authored by UT-Battelle, LLC, under contract DE-AC05-00OR22725 with the US Department of Energy (DOE). The US government retains and the publisher, by accepting the article for publication, acknowledges that the US government retains a nonexclusive, paid-up, irrevocable, worldwide license to publish or reproduce the published form of this manuscript, or allow others to do so, for US government purposes. DOE will provide public access to these results of federally sponsored research in accordance with the DOE Public Access Plan (https://www.energy.gov/doe-public-access-plan).

Jones, Andrew [ORNL] (ORCID:0009000233849687)↗

Investigation of Field Emitter Array Vacuum Microtriodes for Space Electronics Applications

Research into processing techniques for fabrication of vacuum microelectronic devices has been carried out, with special emphasis being given to the growth of silicon dioxide thin films. Oxide films ranging from 30 nm to approximately 2 micrometers have been grown on single crystal silicon wafers. Metal-oxide-semiconductor capacitor test structures have been made from some of these oxide films, and current-versus-voltage plots for these structures have been measured. It has been observed that the rate of applied voltage across the oxide films produces marked differences in measured leakage current. Breakdown fields across two of the thinnest oxide films have been measured and are comparable with highest values reported in literature. Several silicon wafers were processed to make field- emitter array diodes, and were delivered to collaborators at NASA-Lewis Research Center for final fabrication steps and testing.

Smith, Mark A.↗

Heavy ion irradiation induced failure of gallium nitride high electron mobility transistors: effects of in-situ biasing

Abstract While radiation is known to degrade AlGaN/GaN high-electron-mobility transistors (HEMTs), the question remains on the extent of damage governed by the presence of an electrical field in the device. In this study, we induced displacement damage in HEMTs in both ON and OFF states by irradiating with 2.8 MeV Au 4+ ion to fluence levels ranging from 1.72 × 10 10 to 3.745 × 10 13 ions cm −2 , or 0.001–2 displacement per atom (dpa). Electrical measurement is done in situ , and high-resolution transmission electron microscopy (HRTEM), energy dispersive x-ray (EDX), geometrical phase analysis (GPA), and micro-Raman are performed on the highest fluence of Au 4+ irradiated devices. The selected heavy ion irradiation causes cascade damage in the passivation, AlGaN, and GaN layers and at all associated interfaces. After just 0.1 dpa, the current density in the ON-mode device deteriorates by two orders of magnitude, whereas the OFF-mode device totally ceases to operate. Moreover, six orders of magnitude increase in leakage current and loss of gate control over the 2-dimensional electron gas channel are observed. GPA and Raman analysis reveal strain relaxation after a 2 dpa damage level in devices. Significant defects and intermixing of atoms near AlGaN/GaN interfaces and GaN layer are found from HRTEM and EDX analyses, which can substantially alter device characteristics and result in complete failure.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗