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At least 163 records · Page 9

Capacitor bonding techniques and reliability

The effect of thermal cycling on the mechanical failure of bonded ceramic chip capacitors mounted on alumina substrates is studied. It is shown that differential thermal expansion is responsible for the cumulative effects which lead to delayed failure of the capacitors. Harder or higher melting solders are found to be less susceptible to thermal cycling effects, although they are more likely to fail during initial processing operations.

Kinser, D. L.↗

High energy storage density of temperature-stable X9R ceramics

Highlights: • The addition of KNbO{sub 3} improved the temperature-stable properties and energy density. • The x = 0.07 and x = 0.09 sample met the X8R requirements. • The x = 0.03 and x = 0.05 sample met the X9R requirements. • The maximum discharge energy density of x = 0.05 sample reached up to 2 J/cm{sup 3} at 17.85 kV/mm. - Abstract: The effects of KNbO{sub 3} addition on the temperature stability of dielectric properties and energy-storage performances of Sr{sub 0.5}Na{sub 0.25}Bi{sub 0.25}TiO{sub 3}-MgO ((1-x)SNBTM5-xKN) ceramics were systematically investigated. It shows that KNbO{sub 3} has completely diffused into SNBT lattice to form a solid solutions. Two obvious maxima in permittivity curves were observed due to the formation of the polar nanoregions. For the sample with x = 0.05 addition, its permittivity variation region, where △ε'/ε'{sub 25 °C} is no more than ± 15%, retains wide the range from −55 °C to 200 °C, indicating that the ceramics can meet the requirement of X9R specification. Furthermore, this sample shows a high electric breakdown strength of 17.85 kV/mm and a high discharge energy density of 2 J/cm{sup 3}. The noticeable reduced remnant polarization induced by KNbO{sub 3} addition also contributes to the improved energy-storage performances. Thus, these novel ceramics with the aforementioned characteristics will potentially benefit the applications of high pulse power capacitors at high temperatures.

75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND↗

Retention of intermediate polarization states in ferroelectric materials enabling memories for multi-bit data storage

A homogeneous ferroelectric single crystal exhibits only two remanent polarization states that are stable over time, whereas intermediate, or unsaturated, polarization states are thermodynamically instable. Commonly used ferroelectric materials however, are inhomogeneous polycrystalline thin films or ceramics. To investigate the stability of intermediate polarization states, formed upon incomplete, or partial, switching, we have systematically studied their retention in capacitors comprising two classic ferroelectric materials, viz. random copolymer of vinylidene fluoride with trifluoroethylene, P(VDF-TrFE), and Pb(Zr,Ti)O{sub 3}. Each experiment started from a discharged and electrically depolarized ferroelectric capacitor. Voltage pulses were applied to set the given polarization states. The retention was measured as a function of time at various temperatures. The intermediate polarization states are stable over time, up to the Curie temperature. We argue that the remarkable stability originates from the coexistence of effectively independent domains, with different values of polarization and coercive field. A domain growth model is derived quantitatively describing deterministic switching between the intermediate polarization states. We show that by using well-defined voltage pulses, the polarization can be set to any arbitrary value, allowing arithmetic programming. The feasibility of arithmetic programming along with the inherent stability of intermediate polarization states makes ferroelectric materials ideal candidates for multibit data storage.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗

Reliability Assurance for COTS Capacitors

Burn-in (BI) and life testing (LT) are the most important reliability related elements of quality assurance for components used in space systems. This presentation discusses the need of transition from the existing approach to BI, LT, and destructive physical analysis (DPA) of COTS capacitors that is based on military specifications to an alternative approach that is based on Physics of Failure and HALT.

reliability↗

Modeling the electrode geometry of co-planar capacitors for the microwave dielectric characterization of ceramic thin films

This paper describes the influence of co-planar electrode geometry on the measurement accuracy of microwave dielectric properties of sol-gel-derived Na{sub 0.5}Bi{sub 0.5}TiO{sub 3}-NaTaO{sub 3} thin films. The interdigital, co-planar capacitor configurations were prepared with E-beam lithography. A combination of analytical and numerical modelling was used for the optimization of co-planar, interdigital electrode structures for the thin-film characterization. We observed that the number of fingers, their length, as well as the gap between the fingers of the interdigital electrode structure of the co-planar capacitor have a pronounced influence on the accuracy of measurements.

75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND↗

Near room temperature magnetodielectric consequence in (Li, Ti) doped NiO ceramic

In the quest for high-k dielectrics with decent magnetodielectric (MD) response, ball-milled processed (Li, Ti) doped NiO ceramics have been evaluated by various experimental techniques. Magnetic properties in these ceramics manifest with a pronounced anomaly appearing at ∼260 K, suggesting ferrimagnetic phase (related to cluster magnetism) and co-existence with a glassy-like antiferromagnetic phase at ∼7 K. Room temperature neutron diffraction pattern shows the existence of short-range magnetic correlations. In the magnetically ordered state below 250 K, the magnetic structure is found to be phase coexistence of G-type antiferromagnet and ferrimagnet. Impedance spectroscopy measurements over a wide temperature range can be perfectly described with appropriate microstructural model (internal barrier layer capacitor), based on domain and domain boundary relaxations, justifying the enhancement of the dielectric response. The low-temperature (T < 100 K) dielectric relaxation is polaronic in nature, associated with the charge ordering of a mixed valence states of Ti ions (co-existence of Ti{sup 3+} and Ti{sup 4+}). Finally, our investigations in external magnetic fields up to 15 T reveal the occurrence of negative MD effect near room temperature. This intriguing intrinsic feature has been understood by the mechanism of charge-hopping-mediated MD effects.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗

Direct electrocaloric measurement of 0.9Pb(Mg{sub 1/3}Nb{sub 2/3})O{sub 3}-0.1PbTiO{sub 3} films using scanning thermal microscopy

We show that scanning thermal microscopy can measure reversible electrocaloric (EC) effects in <40 μm-thick ceramic films of the relaxor ferroelectric 0.9Pb(Mg{sub 1/3}Nb{sub 2/3})O{sub 3}-0.1PbTiO{sub 3}, with the substrate present. We recorded roughly the same non-adiabatic temperature change (±0.23 K) for a thinner film that was driven harder than a thicker film (±31 V μm{sup −1} across 13 μm versus ±11 V μm{sup −1} across 38 μm), because the thicker film lay relatively closer to the substantially larger adiabatic values that we predicted by thermodynamic analysis of electrical data. Film preparation was compatible with the fabrication of EC multilayer capacitors, and therefore our measurement method may be exploited for rapid characterisation of candidate films for cooling applications.

36 MATERIALS SCIENCE↗

Stacked-Die SiC Half-Bridge Module with Minimum Loop Inductance

Minimizing parasitic inductance of power modules is needed to advance their electrical performance. Innovation in the past decade has driven down the inductance of SiC half-bridge power modules to around 1–2 nH by using multilayer, embedded, and hybrid structures. Further reduction becomes difficult, mainly limited by the excessive interconnects required for the planar placement of vertical conducting chips. To address this, a vertically stacked-die approach is proposed in this paper, taking advantage of the vertical conducting nature of the SiC chips. With ceramic decoupling capacitors integrated, 0.48 nH overall loop inductance is achieved and validated by experimental measurement. This paper also discusses potential approaches to further reduce the inductance.

Ribeiro, Pedro↗

The relationship between reliability and bonding techniques in hybrid microcircuits

Differential thermal expansion was shown to be responsible for many observed failures in ceramic chip capacitors mounted on alumina substrates. It is shown that the mounting techniques used in bonding the capacitors have a marked effect upon the thermally induced mechanical stress and thus the failure rate. A mathematical analysis was conducted of a composite model of the capacitor-substrate system to predict the magnitude of thermally induced stresses. It was experimentally observed that the stresses in more compliant bonding systems such as soft lead tin and indium solders are significantly lower than those in hard solder and epoxy systems. The marked dependence upon heating and cooling rate was proven to be a determining factor in the prediction of failure solder systems. It was found that the harder or higher melting solders are less susceptible to thermal cycling effects but that they are more likely to fail during initial processing operations. Strain gage techniques were used to determine thermally induced expansion stresses of the capacitors and the alumina substrates. The compliance of the different bonding mediums was determined. From the data obtained, several recommendations are made concerning the optimum bonding system for the achievement of maximum reliability.

Caruso, S. V.↗

The relationship between reliability and bonding techniques in hybrid systems

Differential thermal expansion has been shown to be responsible for many observed failures in ceramic chip capacitors mounted on alumina substrates. The present work has shown that the mounting techniques used in bonding the capacitors have a marked effect upon the thermally induced mechanical stress and thus the failure rate. A mathematical analysis of a composite model of the capacitor-substrate system to predict the magnitude of thermally induced stresses have been conducted. It has been experimentally observed that the stresses in more compliant bonding systems such as soft lead/tin and indium solders are significantly lower than those in hard solder and epoxy systems. From the data obtained, several recommendations are made concerning the optimum bonding system for the achievement of maximum reliability.

Kinser, D. L.↗

Reliability of hybrid microcircuit bonding

Microcircuit failure due to differential thermal expansion depends on technique used to mount components to substrate. Effects of differential thermal expansion on ceramic chip capacitors are investigated for various bonding techniques.

Caruso, S. V.↗

The relationship between reliability and bonding techniques in hybrid systems

Differential thermal expansion has been shown to be responsible for many observed failures in ceramic chip capacitors mounted on alumina substrates. The present work has shown that the mounting techniques used in bonding the capacitors have a marked effect upon the thermally induced mechanical stress and thus the failure rate. A mathematical analysis of a composite model of the capacitor-substrate system to predict the magnitude of thermally induced stresses has been conducted. It has been observed that the stresses in more compliant bonding systems such as soft lead/tin and indium solders are significantly lower than those in hard solder and epoxy systems. The marked dependence upon heating and cooling rate has proven to be a determining factor in the prediction of failure in both the indium and tin/lead solder systems. This study has shown that the harder or higher melting solders are less susceptible to thermal cycling effects but that they are more likely to fail during initial processing operations. Recommendations are made concerning the optimum bonding system for the achievement of maximum reliability.

Kinser, D. L.↗

Partial discharge testing under direct voltage conditions

DC partial discharge (PD) (corona) testing is performed using a multichannel analyzer for pulse storing, and data is collected during increase of voltage and at quiescent voltage levels. Thus high voltage ceramic disk capacitors were evaluated by obtaining PD data interspersed during an accelerated life test. Increased PD activity was found early in samples that later failed catastrophically. By this technique, trends of insulation behavior are revealed sensitively and nondestructively in high voltage dc components.

Bever, R. S.↗

Uses of ceramics in microelectronics: A survey

The properties and behavior of ceramic materials used in components for electronic circuitry are examined to appraise the present and future directions for microelectronics, and to suggest further product development, and how innovations may be useful in other technologies. Ceramic and glass insulators, resistors, capacitors, and the use of ceramics and glasses in microcircuitry are discussed along with technology transfer to nonaerospace uses.

Bratschun, W. R.↗

Reliability Effects of Surge Current Testing of Solid Tantalum Capacitors

Solid tantalum capacitors are widely used in space applications to filter low-frequency ripple currents in power supply circuits and stabilize DC voltages in the system. Tantalum capacitors manufactured per military specifications (MIL-PRF-55365) are established reliability components and have less than 0.001% of failures per 1000 hours (the failure rate is less than 10 FIT) for grades D or S, thus positioning these parts among electronic components with the highest reliability characteristics. Still, failures of tantalum capacitors do happen and when it occurs it might have catastrophic consequences for the system. This is due to a short-circuit failure mode, which might be damaging to a power supply, and also to the capability of tantalum capacitors with manganese cathodes to self-ignite when a failure occurs in low-impedance applications. During such a failure, a substantial amount of energy is released by exothermic reaction of the tantalum pellet with oxygen generated by the overheated manganese oxide cathode, resulting not only in destruction of the part, but also in damage of the board and surrounding components. A specific feature of tantalum capacitors, compared to ceramic parts, is a relatively large value of capacitance, which in contemporary low-size chip capacitors reaches dozens and hundreds of microfarads. This might result in so-called surge current or turn-on failures in the parts when the board is first powered up. Such a failure, which is considered as the most prevalent type of failures in tantalum capacitors [I], is due to fast changes of the voltage in the circuit, dV/dt, producing high surge current spikes, I(sub sp) = Cx(dV/dt), when current in the circuit is unrestricted. These spikes can reach hundreds of amperes and cause catastrophic failures in the system. The mechanism of surge current failures has not been understood completely yet, and different hypotheses were discussed in relevant literature. These include a sustained scintillation breakdown model [1-3]; electrical oscillations in circuits with a relatively high inductance [4-6]; local overheating of the cathode [5,7, 8]; mechanical damage to tantalum pentoxide dielectric caused by the impact of MnO2 crystals [2,9, 10]; or stress-induced-generation of electron traps caused by electromagnetic forces developed during current spikes [11]. A commonly accepted explanation of the surge current failures is that at unlimited current supply during surge current conditions, the self-healing mechanism in tantalum capacitors does not work, and what would be a minor scintillation spike if the current were limited, becomes a catastrophic failure of the part [l, 12]. However, our data show that the scintillation breakdown voltages are significantly greater that the surge current breakdown voltages, so it is still not clear why the part, which has no scintillations, would fail at the same voltage during surge current testing (SCT).

Teverovsky, Alexander↗

All-Ceramic Passive Wireless Temperature Sensor Realized by Tin-Doped Indium Oxide (ITO) Electrodes for Harsh Environment Applications

In this work, an all-ceramic passive wireless inductor–capacitor (LC) resonator was presented for stable temperature sensing up to 1200 °C in air. Instead of using conventional metallic electrodes, the LC resonators are modeled and fabricated with thermally stable and highly electroconductive ceramic oxide. The LC resonator was modeled in ANSYS HFSS to operate in a low-frequency region (50 MHz) within 50 × 50 mm geometry using the actual material properties of the circuit elements. The LC resonator was composed of a parallel plate capacitor coupled with a planar inductor deposited on an Al2O3 substrate using screen-printing, and the ceramic pattern was sintered at 1250 °C for 4 h in an ambient atmosphere. The sensitivity (average change in resonant frequency with respect to temperature) from 200–1200 °C was ~170 kHz/°C. The temperature-dependent electrical conductivity of the tin-doped indium oxide (ITO, 10% SnO2 doping) on the quality factor showed an increase of Qf from 36 to 43 between 200 °C and 1200 °C. The proposed ITO electrodes displayed improved sensitivity and quality factor at elevated temperatures, proving them to be an excellent candidate for temperature sensing in harsh environments. The microstructural analysis of the co-sintered LC resonator was performed using a scanning electron microscope (SEM) which showed that there are no cross-sectional and topographical defects after several thermal treatments.

37 INORGANIC, ORGANIC, PHYSICAL, AND ANALYTICAL CH↗