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At least 1,603 records · Page 89

Irradiation of MOS-FET devices to provide desired logic functions

Gamma, X-ray, electron, or other radiation is used to shift threshold potentials of MOS devices on logic circuits. Before irradiation MOS gates to be shifted are biased positive and other gates are grounded to substrate. Threshold lasts 10 years. Thermal annealing brings circuit back to original configuration.

Danchenko, V.↗

Single photon detection and timing in the Lunar Laser Ranging Experiment.

The goals of the Lunar Laser Ranging Experiment lead to the need for the measurement of a 2.5 sec time interval to an accuracy of a nanosecond or better. The systems analysis which included practical retroreflector arrays, available laser systems, and large telescopes led to the necessity of single photon detection. Operation under all background illumination conditions required auxiliary range gates and extremely narrow spectral and spatial filters in addition to the effective gate provided by the time resolution. Nanosecond timing precision at relatively high detection efficiency was obtained using the RCA C31000F photomultiplier and Ortec 270 constant fraction of pulse-height timing discriminator. The timing accuracy over the 2.5 sec interval was obtained using a digital interval with analog vernier ends. Both precision and accuracy are currently checked internally using a triggerable, nanosecond light pulser. Future measurements using sub-nanosecond laser pulses will be limited by the time resolution of single photon detectors.

Poultney, S. K.↗

Low phase-noise digital frequency divider

Digitally generated countdown pulse at submultiple frequency is applied to one electrode of FET gate to establish threshold state; gate cannot function until desired portion of reference half-wave pulse which is to be passed appears on second electrode.

Lutes, G. F., Jr.↗

Advanced investigation of two-phase charge-coupled devices

The performance of experimental two phase, charge-coupled shift registers constructed using polysilicon gates overlapped by aluminum gates was studied. Shift registers with 64, 128, and 500 stages were built and operated. Devices were operated at the maximum clock frequency of 20 MHz. Loss per transfer of less than .0001 was demonstrated for fat zero operation. The effect upon transfer efficiency of various structural and materials parameters was investigated including substrate orientation, resistivity, and conductivity type; channel width and channel length; and method of channel confinement. Operation of the devices with and without fat zero was studied as well as operation in the complete charge transfer mode and the bias charge, or bucket brigade mode.

Kosonocky, W. F.↗

Quiet time magnetospheric field depression at 2.3-3.6 earth radii.

Flux gate magnetometer data from OGO 5 are presented that establish the existence of large field depressions under conditions of varying degree of disturbance at distances ranging from 2.3 to 3.6 earth radii at all local times. For this study, flux gate data obtained near perigee during the period of approximately one year from Jan. 21, 1969, to Feb. 23, 1970, were used.

Sugiura, M.↗

Apparatus for inserting and removing specimens from high temperature vacuum furnaces

The apparatus comprises a high speed gate valve for isolating the interior of the furnance from an air lock chamber on the opposite side of the gate valve. The air lock chamber is provided with valve ports connected to a vacuum source, a source of inert quenching gas, and the atmosphere, respectively. Attached to the end of the air lock chamber away from the furnace is a cylindrical tube having disposed within it a rod carrying specimen pan at the end towards the furnace and having mounted at its top end an annular magnet having a diameter slightly less than the interior diameter of the tube. The top end of the tube is closed by a removeable cap. Encircling the tube in the vicinity of the magnet is a carbon steel ring which when axially moved along the tube causes the magnet to follow it and thereby controls the position of the rod and specimen pan within the tube.

Whitehead, C. W.↗

Design, processing, and testing of LSI arrays for space station

At wafer probe, units of the TA6567 circuit, a beam leaded COS/MOS/SOS 256-bit RAM, were demonstrated to be functionally perfect. An aluminum gate current-sense version and a silicon-gate voltage-sense version of this memory were developed. Initial base line data for the beam lead SOS process using the TA5388 circuit show the stability of the dc device characteristics through the beam lead processing.

Schneider, W. C.↗

Instrumentation for measurement of aircraft noise and sonic boom

A jet aircraft noise and sonic boom measuring device which converts sound pressure into electric current is described. An electric current proportional to the sound pressure level at a condenser microphone is produced and transmitted over a cable, amplified by a zero drive amplifier and recorded on magnetic tape. The converter is comprised of a local oscillator, a dual-gate field-effect transistor (FET) mixer and a voltage regulator/impedance translator. A carrier voltage that is applied to one of the gates of the FET mixer is generated by the local oscillator. The microphone signal is mixed with the carrier to produce an electrical current at the frequency of vibration of the microphone diaphragm by the FET mixer. The voltage of the local oscillator and mixer stages is regulated, the carrier at the output is eliminated, and a low output impedance at the cable terminals is provided by the voltage regulator/impedance translator.

Zuckerwar, A. J.↗

Technical guidance and analytic services in support of SEASAT-A

The design of a high resolution radar for altimetry and ocean wave height estimation was studied. From basic principles, it is shown that a short pulse wide beam radar is the most appropriate and recommended technique for measuring both altitude and ocean wave height. To achieve a topographic resolution of + or - 10 cm RMS at 5.0 meter RMS wave heights, as required for SEASAT-A, it is recommended that the altimeter design include an onboard adaptive processor. The resulting design, which assumes a maximum likelihood estimation (MLE) processor, is shown to satisfy all performance requirements. A design summary is given for the recommended radar altimeter, which includes a full deramp STRETCH pulse compression technique followed by an analog filter bank to separate range returns as well as the assumed MLE processor. The feedback loop implementation of the MLE on a digital computer was examined in detail, and computer size, estimation accuracies, and bias due to range sidelobes are given for the MLE with typical SEASAT-A parameters. The standard deviation of the altitude estimate was developed and evaluated for several adaptive and nonadaptive split-gate trackers. Split-gate tracker biases due to range sidelobes and transmitter noise are examined. An approximate closed form solution for the altimeter power return is derived and evaluated. The feasibility of utilizing the basic radar altimeter design for the measurement of ocean wave spectra was examined.

Brooks, W. L.↗

IGFET/SOI fabrication method

Technique increases switching speeds, shortens channel length, reduces parasitic capacitance and gate overlap, and minimizes gate-to-channel capacitance. The p and n sections may be reversed, allowing fabrication of complementary devices.

Feltner, W. R.↗

Experimental investigation of a double-diffused MOS structure

Self-aligned polysilicon gate technology was applied to double-diffused MOS (DMOS) construction in a manner that retains processing simplicity and effectively eliminates parasitic overlap capacitance because of the self-aligning feature. Depletion mode load devices with the same dimensions as the DMOS transistors were integrated. The ratioless feature results in smaller dimension load devices, allowing for higher density integration with no increase in the processing complexity of standard MOS technology. A number of inverters connected as ring oscillators were used as a vehicle to test the performance and to verify the anticipated benefits. The propagation time-power dissipation product and process related parameters were measured and evaluated. This report includes (1) details of the process; (2) test data and design details for the DMOS transistor, the load device, the inverter, the ring oscillator, and a shift register with a novel tapered geometry for the output stages; and (3) an analytical treatment of the effect of the distributed silicon gate resistance and capacitance on the speed of DMOS transistors.

Lin, H. C.↗

Individual control of relays in a matrix

Output of latching four-input open-collector NAND gate is connected to isolating reed relay and intersection pushbutton. In matrix assembly, edge and corner circuits will require fewer gates, since they originate control lines. Collective row or column reset buttons operate on respective control-line originating points, and control-board disable switch operates on line connecting ground side of all intersection pushbuttons.

Anderson, T. O.↗

Linear charge coupled device detector array for imaging light propagating in an integrated thin-film optical waveguide

Device design, fabrication, and operation of a linear charge coupled device (CCD) detector array integrated with a thin film optical waveguide and applications of this structure to integrated optical signal processing and fiber optical communications were discussed. A two phase, overlapping-gate CCD is connected in parallel by means of a series of gates to an array of photodiodes. The photodiode provides an electrode free surface region so that a highly efficient waveguide detector coupling technique can be implemented. A thermally-oxidized layer of SiO2 forms an effective substrate for the optical waveguide.

Chen, C. L.↗

A complementary MOS process

The complete sequence used to manufacture complementary metal oxide semiconductor (CMOS) integrated circuits is described. The fixed-gate array concept is presented as a means of obtaining CMOS integrated circuits in a fast and reliable fashion. Examples of CMOS circuits fabricated by both the conventional method and the fixed-gate array method are included. The electrical parameter specifications and characteristics are given along with typical values used to produce CMOS circuits. Temperature-bias stressing data illustrating the thermal stability of devices manufactured by this process are presented. Results of a preliminary study on the radiation sensitivity of circuits manufactured by this process are discussed. Some process modifications are given which have improved the radiation hardness of our CMOS devices. A formula description of the chemicals and gases along with the gas flow rates is also included.

Jhabvala, M. D.↗

The charge-flow transistor - A new MOS device

A new device, the charge-flow transistor (CFT), has been developed to achieve integrated MOS compatibility in sensor applications, such as gas, humidity, and fire detection, where one is interested in monitoring the transverse resistance of a thin film. The resistive material is incorporated into the gate structure of the CFT in such a way that there is a time delay between the application of the gate-to-source voltage and the appearance of a complete channel. This time delay depends on the resistivity of the thin film. A theory of device operation is presented, together with experimental results on the first CFT's. These results confirm the principles of operation, and demonstrate the utility of the CFT for making fully integrated sensing devices.

Senturia, S. D.↗

FPLA mechanization of arithmetic elements to produce A + B or to pass A only

A 4-bit and a 3-bit adder are described which can be implemented under special hardware restrictions. The chip to be used is field-programmable logic array (FPLA) with 12 input lines, 50 AND gates inside, and output through only 6 OR gates. The context in which it is being used requires an enable function which can suppress one of the two numbers to be added. The 3-bit enabled adder is compatible with lookahead-carry mechanizations using the 74S182.

Wallis, D. E.↗

Space-charge-limited solid-state triode

A solid-state triode is provided from a wafer of nearinstrinsic semiconductor material sliced into filaments of rectangular cross section. Before slicing, emitter and collector regions are formed on the narrow sides of the filaments, and after slicing gate regions are formed in arrow strips extending longitudinally along the midsections of the wide sides of the filaments. Contacts are then formed on the emitter, collector and gate regions of each filament individually for a single filament device, or in parallel for an array of filament devices to increase load current.

Shumka, A.↗

Investigation of the dynamic range problem and providing software support for the AOL system

The present scheme for providing system timing for the airborne oceanographic lidar (AOL) system is not completely satisfactory. The possibility of using a digital approach to generate the forty pulses needed to energize the gates leading to the charge digitizers was investigated. The solution in terms of general analog and digital circuitry is straightforward. The crystal oscillator provides a stable frequency source which is used as a clock to the ring counter. The ring counter propagates a pulse from stage one to stage forty. Each of the outputs has an amplifier for isolation. This design is easy to implement in the frequency range up to 50 MHZ. Because a gate pulse width of from about 2 to 6 ns is needed for the AOL system, this dictates an input clock frequency to the shift register of from 100 MHA to 500 MHA. Problems associated with generating pulses in this range of operation are examined and an alternate solution is discussed.

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