Engineering Papers⌕ Search

SEARCH · Engineering Papers

Results for “DATA PROCESSOR”

Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

Quote a phrase for an exact phrase match. Source license links do not imply unrestricted reuse.

At least 1,477 records · Page 82

A microprocessor-based control system for the Vienna PDS microdensitometer

The Motorola Exorset 30 system, based on a Motorola 6809 microprocessor which serves as control processor for the microdensitometer is presented. User communication and instrument control are implemented in this syatem; data transmission to a host computer is provided via standard interfaces. The Vienna PDS system (VIPS) software was developed in BASIC and M6809 assembler. It provides efficient user interaction via function keys and argument input in a menu oriented environment. All parameters can be stored on, and retrieved from, minifloppy disks, making it possible to set up large scanning tasks. Extensive user information includes continuously updated status and coordinate displays, as well as a real time graphic display during scanning.

Jenkner, H.↗

A computer modeling methodology and tool for assessing design concepts for the Space Station Data Management System

A computer modeling tool is being developed to assess candidate designs for the Space Station Data Management System (DMS). The DMS is to be a complex distributed computer system including the processor, storage devices, local area networks, and software that will support all processing functions onboard the Space Station. The modeling tool will allow a candidate design for the DMS, or for other subsystems that use the DMS, to be evaluated in terms of parameters. The tool and its associated modeling methodology are intended for use by DMS and subsystem designers to perform tradeoff analyses between design concepts using varied architectures and technologies.

Jones, W. R.↗

Off-line processing of ERS-1 synthetic aperture radar data with high precision and high throughput

The first European remote sensing satellite ERS-1 will be launched by the European Space Agency (ESA) in 1989. The expected lifetime is two to three years. The spacecraft sensors will primarily support ocean investigations and to a limited extent also land applications. Prime sensor is the Active Microwave Instrumentation (AMI) operating in C-Band either as Synthetic Aperture Radar (SAR) or as Wave-Scatterometer and simultaneously as Wind-Scatterometer. In Europe there will be two distinct types of processing for ERS-1 SAR data, Fast Delivery Processing and Precision Processing. Fast Delivery Proceessing will be carried out at the ground stations and up to three Fast Delivery products per pass will be delivered to end users via satellite within three hours after data acquisition. Precision Processing will be carried out in delayed time and products will not be generated until several days or weeks after data acquisition. However, a wide range of products will be generated by several Processing and Archiving Facilities (PAF) in a joint effort coordinated by ESA. The German Remote Sensing Data Center (Deutsches Fernerkundungsdatenzentrum DFD) will develop and operate one of these facilities. The related activities include the acquisition, processing and evaluation of such data for scientific, public and commercial users. Based on this experience the German Remote Sensing Data Center is presently performing a Phase-B study regarding the development of a SAR processor for ERS-1. The conceptual design of this processing facility is briefly outlined.

Gredel, J.↗

GPS Measurement Of Attitude

Signals transmitted by satellites of Global Positioning System (GPS) measure orientation of baseline on ship, aircraft, or other vehicle with accuracy. Two GPS antennas and receivers placed at well separated points on platform. Receivers measure positions of ends of baseline as functions of time. Output processor computes vector difference between two positions and determines orientation of baseline. Combined with conventional GPS data, orientation data allows more precise navigation and mapping and enhances calculations related to performance and control of vehicle.

Dinardo, S. J.↗

Wavelength-Division Multiplexing Of Avionic Digital Control Signals

Proposed wavelength-division multiplexing optoelectronic system aboard aircraft transmits digital control signals from central flight-control computer via optical fibers to multiple distributed processors, actuators, and sensors. In comparison with serial TDM communication systems, this system offers potentially higher data throughput, greater tolerance to transient induced faults, and lower bit-error rates. Also immune to electromagnetic interference at suboptical frequencies.

Patterson, James D.↗

The implementation of a lossless data compression module in an advanced orbiting system: Analysis and development

Data compression has been proposed for several flight missions as a means of either reducing on board mass data storage, increasing science data return through a bandwidth constrained channel, reducing TDRSS access time, or easing ground archival mass storage requirement. Several issues arise with the implementation of this technology. These include the requirement of a clean channel, onboard smoothing buffer, onboard processing hardware and on the algorithm itself, the adaptability to scene changes and maybe even versatility to the various mission types. This paper gives an overview of an ongoing effort being performed at Goddard Space Flight Center for implementing a lossless data compression scheme for space flight. We will provide analysis results on several data systems issues, the performance of the selected lossless compression scheme, the status of the hardware processor and current development plan.

Yeh, Pen-Shu↗

Design of a massively parallel computer using bit serial processing elements

A 1-bit serial processor designed for a parallel computer architecture is described. This processor is used to develop a massively parallel computational engine, with a single instruction-multiple data (SIMD) architecture. The computer is simulated and tested to verify its operation and to measure its performance for further development.

Aburdene, Maurice F.↗

Space Shuttle Main Engine Propellant Path Leak Detection Using Sequential Image Processing

Initial research in this study using theoretical radiation transport models established that the occurrence of a leak is accompanies by a sudden but sustained change in intensity in a given region of an image. In this phase, temporal processing of video images on a frame-by-frame basis was used to detect leaks within a given field of view. The leak detection algorithm developed in this study consists of a digital highpass filter cascaded with a moving average filter. The absolute value of the resulting discrete sequence is then taken and compared to a threshold value to produce the binary leak/no leak decision at each point in the image. Alternatively, averaging over the full frame of the output image produces a single time-varying mean value estimate that is indicative of the intensity and extent of a leak. Laboratory experiments were conducted in which artificially created leaks on a simulated SSME background were produced and recorded from a visible wavelength video camera. This data was processed frame-by-frame over the time interval of interest using an image processor implementation of the leak detection algorithm. In addition, a 20 second video sequence of an actual SSME failure was analyzed using this technique. The resulting output image sequences and plots of the full frame mean value versus time verify the effectiveness of the system.

Smith, L. Montgomery↗

A Parallel Cartesian Approach for External Aerodynamics of Vehicles with Complex Geometry

This workshop paper presents the current status in the development of a new approach for the solution of the Euler equations on Cartesian meshes with embedded boundaries in three dimensions on distributed and shared memory architectures. The approach uses adaptively refined Cartesian hexahedra to fill the computational domain. Where these cells intersect the geometry, they are cut by the boundary into arbitrarily shaped polyhedra which receive special treatment by the solver. The presentation documents a newly developed multilevel upwind solver based on a flexible domain-decomposition strategy. One novel aspect of the work is its use of space-filling curves (SFC) for memory efficient on-the-fly parallelization, dynamic re-partitioning and automatic coarse mesh generation. Within each subdomain the approach employs a variety reordering techniques so that relevant data are on the same page in memory permitting high-performance on cache-based processors. Details of the on-the-fly SFC based partitioning are presented as are construction rules for the automatic coarse mesh generation. After describing the approach, the paper uses model problems and 3- D configurations to both verify and validate the solver. The model problems demonstrate that second-order accuracy is maintained despite the presence of the irregular cut-cells in the mesh. In addition, it examines both parallel efficiency and convergence behavior. These investigations demonstrate a parallel speed-up in excess of 28 on 32 processors of an SGI Origin 2000 system and confirm that mesh partitioning has no effect on convergence behavior.

Aftosmis, M. J.↗

Implementation of Adaptive Digital Controllers on Programmable Logic Devices

Much has been made of the capabilities of FPGA's (Field Programmable Gate Arrays) in the hardware implementation of fast digital signal processing. Such capability also makes an FPGA a suitable platform for the digital implementation of closed loop controllers. Other researchers have implemented a variety of closed-loop digital controllers on FPGA's. Some of these controllers include the widely used proportional-integral-derivative (PID) controller, state space controllers, neural network and fuzzy logic based controllers. There are myriad advantages to utilizing an FPGA for discrete-time control functions which include the capability for reconfiguration when SRAM-based FPGA's are employed, fast parallel implementation of multiple control loops and implementations that can meet space level radiation tolerance requirements in a compact form-factor. Generally, a software implementation on a DSP (Digital Signal Processor) or microcontroller is used to implement digital controllers. At Marshall Space Flight Center, the Control Electronics Group has been studying adaptive discrete-time control of motor driven actuator systems using digital signal processor (DSP) devices. While small form factor, commercial DSP devices are now available with event capture, data conversion, pulse width modulated (PWM) outputs and communication peripherals, these devices are not currently available in designs and packages which meet space level radiation requirements. In general, very few DSP devices are produced that are designed to meet any level of radiation tolerance or hardness. The goal of this effort is to create a fully digital, flight ready controller design that utilizes an FPGA for implementation of signal conditioning for control feedback signals, generation of commands to the controlled system, and hardware insertion of adaptive control algorithm approaches. An alternative is required for compact implementation of such functionality to withstand the harsh environment encountered on spacecraft. Radiation tolerant FPGA's are a feasible option for reaching this goal.

Gwaltney, David A.↗

Field-Programmable Gate Array Computer in Structural Analysis: An Initial Exploration

This paper reports on an initial assessment of using a Field-Programmable Gate Array (FPGA) computational device as a new tool for solving structural mechanics problems. A FPGA is an assemblage of binary gates arranged in logical blocks that are interconnected via software in a manner dependent on the algorithm being implemented and can be reprogrammed thousands of times per second. In effect, this creates a computer specialized for the problem that automatically exploits all the potential for parallel computing intrinsic in an algorithm. This inherent parallelism is the most important feature of the FPGA computational environment. It is therefore important that if a problem offers a choice of different solution algorithms, an algorithm of a higher degree of inherent parallelism should be selected. It is found that in structural analysis, an 'analog computer' style of programming, which solves problems by direct simulation of the terms in the governing differential equations, yields a more favorable solution algorithm than current solution methods. This style of programming is facilitated by a 'drag-and-drop' graphic programming language that is supplied with the particular type of FPGA computer reported in this paper. Simple examples in structural dynamics and statics illustrate the solution approach used. The FPGA system also allows linear scalability in computing capability. As the problem grows, the number of FPGA chips can be increased with no loss of computing efficiency due to data flow or algorithmic latency that occurs when a single problem is distributed among many conventional processors that operate in parallel. This initial assessment finds the FPGA hardware and software to be in their infancy in regard to the user conveniences; however, they have enormous potential for shrinking the elapsed time of structural analysis solutions if programmed with algorithms that exhibit inherent parallelism and linear scalability. This potential warrants further development of FPGA-tailored algorithms for structural analysis.

Singleterry, Robert C., Jr.↗

The RADARSAT Geophysical Processor System

The RADARSAT Geophysical Processor System (RGPS) is a processing system dedicated to the analysis of Synthetic Aperture Radar (SAR) data of sea ice collected by the Canadian RADARSAT satellite (Raney et al., 1991).

radarsat ice sea ice polar ice arctic ocean sar sy↗

Plural-wavelength flame detector that discriminates between direct and reflected radiation

A flame detector employs a plurality of wavelength selective radiation detectors and a digital signal processor programmed to analyze each of the detector signals, and determine whether radiation is received directly from a small flame source that warrants generation of an alarm. The processor's algorithm employs a normalized cross-correlation analysis of the detector signals to discriminate between radiation received directly from a flame and radiation received from a reflection of a flame to insure that reflections will not trigger an alarm. In addition, the algorithm employs a Fast Fourier Transform (FFT) frequency spectrum analysis of one of the detector signals to discriminate between flames of different sizes. In a specific application, the detector incorporates two infrared (IR) detectors and one ultraviolet (UV) detector for discriminating between a directly sensed small hydrogen flame, and reflections from a large hydrogen flame. The signals generated by each of the detectors are sampled and digitized for analysis by the digital signal processor, preferably 250 times a second. A sliding time window of approximately 30 seconds of detector data is created using FIFO memories.

Hall, Gregory H.↗

System for RFID-Enabled Information Collection

A sensor and system provide for radio frequency identification (RFID)-enabled information collection. The sensor includes a ring-shaped element and an antenna. The ring-shaped element includes a conductive ring and an RFID integrated circuit. The antenna is spaced apart from the ring-shaped element and defines an electrically-conductive path commensurate in size and shape to at least a portion of the conductive ring. The system may include an interrogator for energizing the ring-shaped element and receiving a data transmission from the RFID integrated circuit that has been energized for further processing by a processor.

Fink, Patrick W.↗

System and Sensor for RFID-Enabled Information Collection

A system and sensor provides for radio frequency identification (RFID)-enabled information collection. The system includes a ring-shaped element and an antenna. The ring-shaped element includes a conductive ring and an RFID integrated circuit. The antenna is spaced apart from the ring-shaped element and defines an electrically-conductive path commensurate in size and shape to at least a portion of the conductive ring. In an alternate embodiment, the sensor system further comprises a reference ring-shaped element in a fixed relationship with respect to the antenna, with the reference ring-shaped element defining another series circuit to include an electrically-conductive reference ring and a reference RFID integrated circuit. The system may include an interrogator for energizing the ring-shaped element and receiving a data transmission from the RFID integrated circuit that has been energized for further processing by a processor.

Fink, Patrick W.↗

Linear optimal power flow system and method

An electric power system or power grid is optimized using a computer-implemented tool the represents in computer memory the optimization function and at least one constraint, which the processor operates upon using a linear programming solver algorithm. The constraints are represented in memory as data structures that include both real and reactive power terms, corresponding to at least one of a power flow model and a transmission line model. The transmission line model is represented using a piecewise linear representation. The power flow model may also include for each node in the power system a real power loss term representing transmission line loss allocated to that node.

24 POWER TRANSMISSION AND DISTRIBUTION↗

Simple coarse graining and sampling strategies for image recognition

A conceptually simple way to recognize images is to directly compare test-set data and training-set data. The accuracy of this approach is limited by the method of comparison used, and by the extent to which the training-set data covers the required configuration space. Here we show that this coverage can be substantially increased using simple strategies of coarse graining (replacing groups of images by their centroids) and sampling (using distinct sets of centroids in combination). We use the MNIST data set to show that coarse graining can be used to convert a subset of training images into about an order of magnitude fewer image centroids, with no loss of accuracy of classification of test-set images by direct (nearest-neighbor) classification. Distinct batches of centroids can be used in combination as a means of sampling configuration space, and can classify test-set data more accurately than can the unaltered training set. The approach works most naturally with multiple processors in parallel.

97 MATHEMATICS AND COMPUTING↗

Accurate, Fast and Scalable Kernel Ridge Regression on Parallel and Distributed Systems

Kernel Ridge Regression (KRR) is a fundamental method in machine learning. Given an n-by-d data matrix as input, a traditional implementation requires Θ(n2) memory to form an n-by-n kernel matrix and Θ(n3) flops to compute the final model. These time and storage costs prohibit KRR from scaling up to large datasets. For example, even on a relatively small dataset (a 520k-by-90 input requiring 357 MB), KRR requires 2 TB memory just to store the kernel matrix. Additionally, the reason is that n usually is much larger than d for real-world applications. On the other hand, weak scaling becomes a problem: if we keep d and n/p fixed as p grows (p is # machines), the memory needed grows as Θ(p) per processor and the flops as Θ(p2) per processor. In the perfect weak scaling situation, both the memory needed and the flops grow as Θ(1) per processor (i.e. memory and flops are constant). The traditional Distributed KRR implementation (DKRR) only achieved 0.32% weak scaling efficiency from 96 to 1536 processors. In this work, we propose two new methods to address these problems: the Balanced KRR (BKRR) and K-means KRR (KKRR). These methods consider alternative ways to partition the input dataset into p different parts, generating p different models, and then selecting the best model among them. Compared to a conventional implementation, KKRR2 (optimized version of KKRR) improves the weak scaling efficiency from 0.32% to 38% and achieves a 591x speedup for getting the same accuracy by using the same data and the same hardware (1536 processors). BKRR2 (optimized version of BKRR) achieves a higher accuracy than the current fastest method using less training time for a variety of datasets. For the applications requiring only approximate solutions, BKRR2 improves the weak scaling efficiency to 92% and achieves 3505x speedup (theoretical speedup: 4096x).

97 MATHEMATICS AND COMPUTING↗