NASA NTRS · 19950015989
Design of a massively parallel computer using bit serial processing elements
Abstract
A 1-bit serial processor designed for a parallel computer architecture is described. This processor is used to develop a massively parallel computational engine, with a single instruction-multiple data (SIMD) architecture. The computer is simulated and tested to verify its operation and to measure its performance for further development.
Keep this discovery
Explore connections, maps & timelines
Aburdene, Maurice F., Khouri, Kamal S., Piatt, Jason E., Zheng, Jianqing. 1995-01-24. Design of a massively parallel computer using bit serial processing elements. https://ntrs.nasa.gov/citations/19950015989
Cite the original work for its findings. Save a collection to share your selection of sources.