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At least 145 records · Page 8

The simulated features of heliospheric cosmic-ray modulation with a time-dependent drift model. IV - The role of heliospheric neutral sheet deformation

Previous calculations with a time-dependent drift model revealed the model to be less successful in describing time-dependent modulation during periods of moderate to large solar activity. In this paper, it is argued that a major reason for this is that the previously used wavy heliospheric neutral sheet (HNS) description was based on an idealized HNS not subject to any spatial evolution while propagating radially outward. It is suggested that the deformation and compression of HNS wave peaks will lead to significant increases in the crossfield diffusion across these peaks (short-circuiting). The cosmic rays will effectively experience reduced tilt angles and therefore a reduction in the integrated HNS modulation effect between an observer and the heliospheric boundary. During periods of moderate to large solar activity these HNS deformation processes are progressively more frequent and should lead to a significant reduction in time-dependent modulation as predicted by drift models. Calculations done with radially propagating tilt angles that effectively decrease with radial distance give the expected reduction which improves the general description of modulation from 1987-1988.

Le Roux, J. A.↗

Steady-state probability density function of the phase error for a DPLL with an integrate-and-dump device

The steady-state behavior of a particular type of digital phase-locked loop (DPLL) with an integrate-and-dump circuit following the phase detector is characterized in terms of the probability density function (pdf) of the phase error in the loop. Although the loop is entirely digital from an implementation standpoint, it operates at two extremely different sampling rates. In particular, the combination of a phase detector and an integrate-and-dump circuit operates at a very high rate whereas the loop update rate is very slow by comparison. Because of this dichotomy, the loop can be analyzed by hybrid analog/digital (s/z domain) techniques. The loop is modeled in such a general fashion that previous analyses of the Real-Time Combiner (RTC), Subcarrier Demodulator Assembly (SDA), and Symbol Synchronization Assembly (SSA) fall out as special cases.

Simon, M.↗

Study of Contact Resistances in Integrated Circuits

Techniques explored in search for rapid, reliable test. Resistances of aluminum/silicon contacts and methods to measure subjects of NASA report. Study with three tasks undertaken to evaluate nature and reliability of large numbers of semiconductor contacts of type now being fabricated in integrated circuits: Develop yield analysis for series strings of contacts using wafer-level electrical measurements, and identify different types of faults by visual inspection; develop wafer-level tests to evaluate reliability of contact strings; and develop mathematical model for current flow in contacts and examine contact region for evidence of micro-alloying.

Buehler, M. G.↗

High temperature superconductors applications in telecommunications

The purpose of this paper is twofold: (1) to discuss high temperature superconductors with specific reference to their employment in telecommunications applications; and (2) to discuss a few of the limitations of the normally employed two-fluid model. While the debate on the actual usage of high temperature superconductors in the design of electronic and telecommunications devices - obvious advantages versus practical difficulties - needs to be settled in the near future, it is of great interest to investigate the parameters and the assumptions that will be employed in such designs. This paper deals with the issue of providing the microwave design engineer with performance data for such superconducting waveguides. The values of conductivity and surface resistance, which are the primary determining factors of a waveguide performance, are computed based on the two-fluid model. A comparison between two models - a theoretical one in terms of microscopic parameters (termed Model A) and an experimental fit in terms of macroscopic parameters (termed Model B) - shows the limitations and the resulting ambiguities of the two-fluid model at high frequencies and at temperatures close to the transition temperature. The validity of the two-fluid model is then discussed. Our preliminary results show that the electrical transport description in the normal and superconducting phases as they are formulated in the two-fluid model needs to be modified to incorporate the new and special features of high temperature superconductors. Parameters describing the waveguide performance - conductivity, surface resistance and attenuation constant - will be computed. Potential applications in communications networks and large scale integrated circuits will be discussed. Some of the ongoing work will be reported. In particular, a brief proposal is made to investigate of the effects of electromagnetic interference and the concomitant notion of electromagnetic compatibility (EMI/EMC) of high T(sub c) superconductors.

Kumar, A. Anil↗

In-circuit fault injector user's guide

A fault injector system, called an in-circuit injector, was designed and developed to facilitate fault injection experiments performed at NASA-Langley's Avionics Integration Research Lab (AIRLAB). The in-circuit fault injector (ICFI) allows fault injections to be performed on electronic systems without special test features, e.g., sockets. The system supports stuck-at-zero, stuck-at-one, and transient fault models. The ICFI system is interfaced to a VAX-11/750 minicomputer. An interface program has been developed in the VAX. The computer code required to access the interface program is presented. Also presented is the connection procedure to be followed to connect the ICFI system to a circuit under test and the ICFI front panel controls which allow manual control of fault injections.

Padilla, Peter A.↗

A verification logic representation of indeterministic signal states

The integration of modern CAD tools with formal verification environments require translation from hardware description language to verification logic. A signal representation including both unknown state and a degree of strength indeterminacy is essential for the correct modeling of many VLSI circuit designs. A higher-order logic theory of indeterministic logic signals is presented.

Gambles, J. W.↗

Feedback Linearization in a Six Degree-of-Freedom MAG-LEV Stage

A six degree-of-freedom electromagnetically suspended motion control stage (the Angstrom Stage) has been designed and constructed for use in short-travel, high-resolution motion control applications. It achieves better than 0.5 nm resolution over a 100 micron range of travel. The stage consists of a single moving element (the platen) floating in an oil filled chamber. The oil is crucial to the stage's operation since it forms squeeze film dampers between the platen and the frame. Twelve electromagnetic actuators provide the forces necessary to suspend and servo the platen, and six capacitance probes measure its position relative to the frame. The system is controlled using a digital signal processing board residing in a '486 based PC. This digital controller implements a feedback linearization algorithm in real-time to account for nonlinearities in both the magnetic actuators and the fluid film dampers. The feedback linearization technique reduces a highly nonlinear plant with coupling between the degrees of freedom into one that is linear, decoupled, and setpoint independent. The key to this procedure is a detailed plant model. The operation of the feedback linearization procedure is transparent to the outer loop of the controller, and so a proportional controller is sufficient for normal operation. We envision applications of this stage in scanned probe microscopy and for integrated circuit measurement.

Ludwick, Stephen J.↗

Applications of SPICE for modeling miniaturized biomedical sensor systems

This paper proposes a model for a miniaturized signal conditioning system for biopotential and ion-selective electrode arrays. The system consists of three main components: sensors, interconnections, and signal conditioning chip. The model for this system is based on SPICE. Transmission-line based equivalent circuits are used to represent the sensors, lumped resistance-capacitance circuits describe the interconnections, and a model for the signal conditioning chip is extracted from its layout. A system for measurements of biopotentials and ionic activities can be miniaturized and optimized for cardiovascular applications based on the development of an integrated SPICE system model of its electrochemical, interconnection, and electronic components.

Microelectrodes↗

InP Heterojunction Bipolar Transistor Amplifiers to 255 GHz

Two single-stage InP heterojunction bipolar transistor (HBT) amplifiers operate at 184 and 255 GHz, using Northrop Grumman Corporation s InP HBT MMIC (monolithic microwave integrated circuit) technology. At the time of this reporting, these are reported to be the highest HBT amplifiers ever created. The purpose of the amplifier design is to evaluate the technology capability for high-frequency designs and verify the model for future development work.

Radisic, Vesna↗

Experiments on Evolving Software Models of Analog Circuits

Analog circuits are of great importance in electronic system design since the world is fundamentally analog in nature. While the amount of digital design activity far outpaces that of analog design, most digital systems require analog modules for interfacing with the external world. It was recently estimated that approximately 60% of digital application- specific integrated circuit designs incorporated analog circuits. With challenging analog circuit design problems and few analog design engineers, there are economic reasons for automating the analog design process, especially time-to-market considerations. Techniques for analog circuit design automation began appearing about two decades ago. These methods incorporated heuristics [6], knowledge bases [1], simulated annealing [5], and other algorithms. Efforts using techniques from evolutionary computation began appearing over the last few years. These include the use of genetic algorithms to select electronic component values (for example, the resistance value of a resistor), to select circuit topologies, and to design amplifiers using a limited set of canned topologies [4]. A genetic programming-based analog circuit design system has been demonstrated in which the circuit sizes, component values, and the circuit topologies are determined automatically [3]. The genetic-algorithm systems typically represent circuit structures as vectors of parameters encoded in binary strings, while the genetic programming system manipulates tree data structures.

Lohn, Jason D.↗

A Comparison of Three-Dimensional Simulations of Traveling-Wave Tube Cold-Test Characteristics Using CST MICROWAVE STUDIO and MAFIA

Previously, it was shown that MAFIA (solutions of Maxwell's equations by the Finite Integration Algorithm), a three-dimensional simulation code, can be used to produce accurate cold-test characteristics including frequency-phase dispersion, interaction impedance, and attenuation for traveling-wave tube (TWT) slow-wave structures. In an effort to improve user-friendliness and simulation time, a model was developed to compute the cold-test parameters using the electromagnetic field simulation software package CST MICROWAVE STUDIO (MWS). Cold-test parameters were calculated for several slow-wave circuits including a ferruled coupled-cavity, a folded waveguide, and a novel finned-ladder circuit using both MWS and MAFIA. Comparisons indicate that MWS provides more accurate cold-test data with significantly reduced simulation times. Both MAFIA and MWS are based on the finite integration (FI) method; however, MWS has several advantages over MAFIA. First, it has a Windows based interface for PC operation, making it very user-friendly, whereas MAFIA is UNIX based. MWS uses a new Perfect Boundary Approximation (PBA), which increases the accuracy of the simulations by avoiding stair step approximations associated with MAFIA's representation of structures. Finally, MWS includes a Visual Basic for Applications (VBA) compatible macro language that enables the simulation process to be automated and allows for the optimization of user-defined goal functions, such as interaction impedance.

Chevalier, C. T.↗

Microwave characteristics of GaAs MMIC integratable optical detectors

Interdigitated photoconductive detectors were fabricated on microwave device structures, making them easily integratable with Monolithic Microwave Integrated Circuits (MMIC). Detector responsivity as high as 2.5 A/W and an external quantum efficiency of 3.81 were measured. Response speed was nearly independent of electrode geometry, and all detectors had usable response at frequencies to 6 GHz. A small signal model of the detectors based on microwave measurements was also developed.

Claspy, Paul C.↗

On the applicability of integrated circuit technology to general aviation orientation estimation

The criteria of the significant value of the panel instruments used in general aviation were examined and kinematic equations were added for comparison. An instrument survey was performed to establish the present state of the art in linear and angular accelerometers, pressure transducers, and magnetometers. A very preliminary evaluation was done of the computers available for data evaluation and estimator mechanization. The mathematical model of a light twin aircraft employed in the evaluation was documented, the results of the sensor survey and the results of the design studies were presented.

Debra, D. B.↗

Testing self-timed circuits using scan paths

Testing is an essential part of any digital system design and one that can be made much easier if testing is considered during the design process rather than after the system is complete. There are a number of techniques for integrating testability into system design, but many of these traditional testing methods used for synchronous circuits are not directly applicable to non-clocked asynchronous circuits. As a result, many asynchronous circuits do not employ design for testability techniques. A method of using the familiar model of scan paths modified to test self-timed systems are presented. Specifically, circuits designed using a library of self-timed modules to assemble systems with two-phase transition control and bundled data paths are considered. The method involves modifying these self-timed modules such that circuits designed from them have a built-in scan path.

Khoche, Ajay↗

Guidelines for SEU-Resistant Integrated Circuits

Paper presents recent results of continuing program for increasing resistance of integrated circuits to single-event upset (SEU). Results based on study of test data for heavy-ion SEU in more than 180 different types of devices. (Some devices perform identical functions but made by different processes.) Program also examines developments in mathematical models for SEU.

Nichols, D. K.↗

Progress in knowledge representation research

Brief descriptions are given of research being carried out in the field of knowledge representation. Dynamic simulation and modelling of planning systems with real-time sensor inputs; development of domain-independent knowledge representation tools which can be used in the development of application-specific expert and planning systems; and development of a space-borne very high speed integrated circuit processor are among the projects discussed.

Lum, Henry↗