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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 145 records · Page 8
All sourcesNASA NTRSDOE OSTI
NASA NTRS1996

Submillimeter-Wave Receiver Containing An SIS Mixer

Submillimeter-wave heterodyne receiver designed to operate at input frequencies in range of 480 to 650 GHz. Intended for use in radio astronomy at frequency of 547 or 626 GHz. Heart of receiver is waveguide mixer that includes adjustable backshort and electric-field-plane tuner. Mixing element high-current-density superconductor/insulator/superconductor (SIS) tunnel junction integrated with superconductive microstrip radio-frequency circuit that tunes out capacitance of junction; matching complex impedance of junction to available tuning range of waveguide mount.

Febvre, Pascal↗
NASA NTRS1987

Progress in MMIC technology for satellite communications

NASA's Lewis Research Center is actively involved in the development of monolithic microwave and millimeter-wave integrated circuits (MMICs). The approach of the program is to support basic research under grant or in-house, while MMIC development is done under contract, thereby facilitating the transfer of technology to users. Preliminary thrusts of the program have been the extension of technology to higher frequencies (60 GHz), degrees of complexity, and performance (power, efficiency, noise figure) by utilizing novel circuit designs, processes, and materials. A review of the progress made so far is presented.

Haugland, Edward J.↗
NASA NTRS1997

Novel Highly Parallel and Systolic Architectures Using Quantum Dot-Based Hardware

VLSI technology has made possible the integration of massive number of components (processors, memory, etc.) into a single chip. In VLSI design, memory and processing power are relatively cheap and the main emphasis of the design is on reducing the overall interconnection complexity since data routing costs dominate the power, time, and area required to implement a computation. Communication is costly because wires occupy the most space on a circuit and it can also degrade clock time. In fact, much of the complexity (and hence the cost) of VLSI design results from minimization of data routing. The main difficulty in VLSI routing is due to the fact that crossing of the lines carrying data, instruction, control, etc. is not possible in a plane. Thus, in order to meet this constraint, the VLSI design aims at keeping the architecture highly regular with local and short interconnection. As a result, while the high level of integration has opened the way for massively parallel computation, practical and full exploitation of such a capability in many applications of interest has been hindered by the constraints on interconnection pattern. More precisely. the use of only localized communication significantly simplifies the design of interconnection architecture but at the expense of somewhat restricted class of applications. For example, there are currently commercially available products integrating; hundreds of simple processor elements within a single chip. However, the lack of adequate interconnection pattern among these processing elements make them inefficient for exploiting a large degree of parallelism in many applications.

Fijany, Amir↗
NASA NTRS1974

Voltage-spike analysis for a free-running parallel inverter

Unwanted and sometimes damaging high-amplitude voltage spikes occur during each half cycle in many transistor saturable-core inverters at the moment when the core saturates and the transistors switch. The analysis shows that spikes are an intrinsic characteristic of certain types of inverters even with negligible leakage inductance and purely resistive load. The small but unavoidable after-saturation inductance of the saturable-core transformer plays an essential role in creating these undesired thigh-voltage spikes. State-plane analysis provides insight into the complex interaction between core and transistors, and shows the circuit parameters upon which the magnitude of these spikes depends.

Lee, F. C. Y.↗
NASA NTRS1982

Next generation communications satellites: multiple access and network studies

Efficient resource allocation and network design for satellite systems serving heterogeneous user populations with large numbers of small direct-to-user Earth stations are discussed. Focus is on TDMA systems involving a high degree of frequency reuse by means of satellite-switched multiple beams (SSMB) with varying degrees of onboard processing. Algorithms for the efficient utilization of the satellite resources were developed. The effect of skewed traffic, overlapping beams and batched arrivals in packet-switched SSMB systems, integration of stream and bursty traffic, and optimal circuit scheduling in SSMB systems: performance bounds and computational complexity are discussed.

Meadows, H. E.↗
NASA NTRS2017

Challenges Regarding IP Core Functional Reliability

For many years, intellectual property (IP) cores have been incorporated into field programmable gate array (FPGA) and application specific integrated circuit (ASIC) design flows. However, the usage of large complex IP cores were limited within products that required a high level of reliability. This is no longer the case. IP core insertion has become mainstream including their use in highly reliable products. Due to limited visibility and control, challenges exist when using IP cores and subsequently compromise product reliability. We discuss challenges and suggest potential solutions to critical application IP insertion.

IP cores↗
NASA NTRS2018

A Blueprint for Demonstrating Quantum Supremacy with Superconducting Qubits

Long coherence times and high fidelity control recently achieved in scalable superconducting circuits paved the way for the growing number of experimental studies of many-qubit quantum coherent phenomena in these devices. Albeit full implementation of quantum error correction and fault tolerant quantum computation remains a challenge the near term pre-error correction devices could allow new fundamental experiments despite inevitable accumulation of errors. One such open question foundational for quantum computing is achieving the so called quantum supremacy, an experimental demonstration of a computational task that takes polynomial time on the quantum computer whereas the best classical algorithm would require exponential time and/or resources. It is possible to formulate such a task for a quantum computer consisting of less than a 100 qubits. The computational task we consider is to provide approximate samples from a non-trivial quantum distribution. This is a generalization for the case of superconducting circuits of ideas behind boson sampling protocol for quantum optics introduced by Arkhipov and Aaronson. In this presentation we discuss a proof-of-principle demonstration of such a sampling task on a 9-qubit chain of superconducting gmon qubits developed by Google. We discuss theoretical analysis of the driven evolution of the device resulting in output approximating samples from a uniform distribution in the Hilbert space, a quantum chaotic state. We analyze quantum chaotic characteristics of the output of the circuit and the time required to generate a sufficiently complex quantum distribution. We demonstrate that the classical simulation of the sampling output requires exponential resources by connecting the task of calculating the output amplitudes to the sign problem of the Quantum Monte Carlo method. We also discuss the detailed theoretical modeling required to achieve high fidelity control and calibration of the multi-qubit unitary evolution in the device. We use a novel cross-entropy statistical metric as a figure of merit to verify the output and calibrate the device controls. Finally, we demonstrate the statistics of the wave function amplitudes generated on the 9-gmon chain and verify the quantum chaotic nature of the generated quantum distribution. This verifies the implementation of the quantum supremacy protocol.

Kechedzhi, Kostyantyn↗
NASA NTRS1980

Comparison of NASCAP modelling results with lumped circuit analysis

Engineering design tools that can be used to predict the development of absolute and differential potentials by realistic spacecraft under geomagnetic substorm conditions are described. Two types of analyses are in use: (1) the NASCAP code, which computes quasistatic charging of geometrically complex objects with multiple surface materials in three dimensions; (2) lumped element equivalent circuit models that are used for analyses of particular spacecraft. The equivalent circuit models require very little computation time, however, they cannot account for effects, such as the formation of potential barriers, that are inherently multidimensional. Steady state potentials of structure and insulation are compared with those resulting from the equivalent circuit model.

Stang, D. B.↗
NASA NTRS1990

Complex permittivity of lanthanum aluminate in the 20 to 300 K temperature range from 26.5 to 40.0 GHz

Dielectric constants of microwave substrates are required in the design of superconducting microwave circuits at various temperatures. In this paper, the results are reported of a study of the complex permittivity of the newly developed lanthanum aluminate (LaAlO3) substrate, in the 20 to 300 K temperature range at frequencies from 26.5 to 40.0 GHz. The value of the complex permittivity was obtained by measuring the sample scattering parameters using a microwave waveguide technique. It is observed that, while the dielectric constant did not change appreciably with frequency, its value decreased by approximately 14 percent from room temperature to 20 K.

Miranda, F. A.↗
NASA NTRS1999

A More Accurate and Efficient Technique Developed for Using Computational Methods to Obtain Helical Traveling-Wave Tube Interaction Impedance

The phenomenal growth of commercial communications has created a great demand for traveling-wave tube (TWT) amplifiers. Although the helix slow-wave circuit remains the mainstay of the TWT industry because of its exceptionally wide bandwidth, until recently it has been impossible to accurately analyze a helical TWT using its exact dimensions because of the complexity of its geometrical structure. For the first time, an accurate three-dimensional helical model was developed that allows accurate prediction of TWT cold-test characteristics including operating frequency, interaction impedance, and attenuation. This computational model, which was developed at the NASA Lewis Research Center, allows TWT designers to obtain a more accurate value of interaction impedance than is possible using experimental methods. Obtaining helical slow-wave circuit interaction impedance is an important part of the design process for a TWT because it is related to the gain and efficiency of the tube. This impedance cannot be measured directly; thus, conventional methods involve perturbing a helical circuit with a cylindrical dielectric rod placed on the central axis of the circuit and obtaining the difference in resonant frequency between the perturbed and unperturbed circuits. A mathematical relationship has been derived between this frequency difference and the interaction impedance (ref. 1). However, because of the complex configuration of the helical circuit, deriving this relationship involves several approximations. In addition, this experimental procedure is time-consuming and expensive, but until recently it was widely accepted as the most accurate means of determining interaction impedance. The advent of an accurate three-dimensional helical circuit model (ref. 2) made it possible for Lewis researchers to fully investigate standard approximations made in deriving the relationship between measured perturbation data and interaction impedance. The most prominent approximations made in the analysis were addressed and fully investigated for their accuracy by using the three-dimensional electromagnetic simulation code MAFIA (Solution of Maxwell's Equations by the Finite Integration Algorithm) (refs. 3 and 4). We found that several approximations introduced significant error (ref. 5).

Kory, Carol L.↗
NASA NTRS2001

Combining Flux Balance and Energy Balance Analysis for Large-Scale Metabolic Network: Biochemical Circuit Theory for Analysis of Large-Scale Metabolic Networks

Predicting behavior of large-scale biochemical metabolic networks represents one of the greatest challenges of bioinformatics and computational biology. Approaches, such as flux balance analysis (FBA), that account for the known stoichiometry of the reaction network while avoiding implementation of detailed reaction kinetics are perhaps the most promising tools for the analysis of large complex networks. As a step towards building a complete theory of biochemical circuit analysis, we introduce energy balance analysis (EBA), which compliments the FBA approach by introducing fundamental constraints based on the first and second laws of thermodynamics. Fluxes obtained with EBA are thermodynamically feasible and provide valuable insight into the activation and suppression of biochemical pathways.

Beard, Daniel A.↗
NASA NTRS1982

Status and capabilities of the National Full Scale Facility 40- by 80-foot wind tunnel modification

The background, requirements, and aerodynamic design of the modified NASA Ames 40 x 80 ft wind tunnel are reviewed, along with the systems integration and systems test results. Advancing vehicle sizes and airspeeds required a larger wind tunnel test section and a capability for 100 and 300 knots airspeed simulation. Acoustic mufflers at the inlet and exit of the nonreturn circuit provide noise suppression. The enlarged test section is intended to accomodate the complex flowfields of wings with high lift coefficients, and the drive system is designed with minimum residual swirl. Features of the fan blades are examined, along with characteristics of the test channels, control vanes and louvers, the exit, circuit losses, temperature rises during operation of the nonreturn circuit, and the facility acoustics. Specific construction problems and solutions for the conversion process are outlined, and it is noted that operational status is expected at the end of 1982.

Mort, K. W.↗
NASA NTRS1969

Folded stick module

Integrated circuit modules can be compactly assembled into short-run complex electronic assemblies by mounting them on a Stick module. This module provides a method of high-density packaging for industrial operations that require the fabrication of compact circuitry configurations.

Katzin, L.↗
NASA NTRS1978

S-Band complex-weight module for adaptive processing

S-band complex weight for adaptive processing is fabricated as microwave integrated circuit. When interfaced with suitable control component, it is potentially capable of producing 25 dB rejection of interface with bandwidth of 500 MHz. Performance inproves with decreased bandwidth. Versatility stems from numerous control methods available in broadening field of adaptive processing.

Gianatasio, A. J.↗
NASA NTRS1985

MOS integrated circuit fault modeling

Three digital simulation techniques for MOS integrated circuit faults were examined. These techniques embody a hierarchy of complexity bracketing the range of simulation levels. The digital approaches are: transistor-level, connector-switch-attenuator level, and gate level. The advantages and disadvantages are discussed. Failure characteristics are also described.

Sievers, M.↗