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Results for “Transistors”

Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 1,423 records · Page 79
All sourcesNASA NTRSDOE OSTI
DOE OSTI2016

Carbon nanotube network thin-film transistors on flexible/stretchable substrates

This disclosure provides systems, methods, and apparatus for flexible thin-film transistors. In one aspect, a device includes a polymer substrate, a gate electrode disposed on the polymer substrate, a dielectric layer disposed on the gate electrode and on exposed portions of the polymer substrate, a carbon nanotube network disposed on the dielectric layer, and a source electrode and a drain electrode disposed on the carbon nanotube network.

36 MATERIALS SCIENCE↗
DOE OSTI2016

Polarization induced doped transistor

A nitride-based field effect transistor (FET) comprises a compositionally graded and polarization induced doped p-layer underlying at least one gate contact and a compositionally graded and doped n-channel underlying a source contact. The n-channel is converted from the p-layer to the n-channel by ion implantation, a buffer underlies the doped p-layer and the n-channel, and a drain underlies the buffer.

36 MATERIALS SCIENCE↗
DOE OSTI2015

Strategies for Wide Bandgap, Inexpensive Transistors for Controlling High-efficiency Systems

Wide bandgap power semiconductor devices offer enormous energy efficiency gains in a wide range of potential applications. However, today, they remain too costly relative to Si devices to gain ubiquitous adoption in many higher power applications. In 2014, ARPA-E launched a new research program entitled SWITCHES, that seeks to enable the development of high voltage (1200 V+), high current (100 A) single die power semiconductor devices that, upon ultimately reaching scale, have the potential to reach functional cost parity ($/A) with silicon power transistors while also offering breakthrough relative circuit performance (low losses, high switching frequencies, and high temperature operation).

36 MATERIALS SCIENCE↗
DOE OSTI2017

Graphene-based field-effect transistor biosensors

The disclosure provides a field-effect transistor (FET)-based biosensor and uses thereof. In particular, to FET-based biosensors using thermally reduced graphene-based sheets as a conducting channel decorated with nanoparticle-biomolecule conjugates. The present disclosure also relates to FET-based biosensors using metal nitride/graphene hybrid sheets. The disclosure provides a method for detecting a target biomolecule in a sample using the FET-based biosensor described herein.

47 OTHER INSTRUMENTATION↗
DOE OSTI2019

Method to fabricate quantum dot field-effect transistors without bias-stress effect

Disclosed herein are embodiments of a method to form quantum dot field-effect transistors (QD FETs) having little to no bias-stress effect. Bias-stress effect can be reduced or eliminated through, as an example, the use of a gas or liquid to remove ligands and/or reduce charge trapping on the QD FETs, followed by deposition of an inorganic or organic matrix around the QDs in the FET.

36 MATERIALS SCIENCE↗
DOE OSTI2018

III-nitride transistor with trench gate

A transistor includes a stack of III-nitride semiconductor layers, the stack having a frontside and a backside, a source electrode in contact with the frontside of the stack, a drain electrode in contact with the backside of the stack, a trench extending through a portion of the stack, the trench having a sidewall, and a gate structure formed in the trench, including an AlN layer formed on the sidewall of the trench, an insulating cap layer formed on the AlN layer, and a gate electrode formed on the insulator cap layer and covering the sidewall of the trench.

42 ENGINEERING↗
DOE OSTI2019

Regrowth method for fabricating wide-bandgap transistors, and devices made thereby

Methods are provided for fabricating a HEMT (high-electron-mobility transistor) that involve sequential epitaxial growth of III-nitride channel and barrier layers, followed by epitaxial regrowth of further III-nitride material through a window in a mask layer. In examples, the regrowth takes place over exposed portions of the channel layer in the source and drain regions of the device, and the regrown material has a composition different from the barrier layer. In other examples, the regrowth takes place on the barrier layer, only in the access region or regions. Devices made according to the disclosed methods are also provided.

Armstrong, Andrew↗
DOE OSTI2019

Diamond based current aperture vertical transistor and methods of making and using the same

A semiconductor structure, device, or vertical field effect transistor is comprised of a drain, a drift layer disposed in a first direction relative to the drain and in electronic communication with the drain, a barrier layer disposed in the first direction relative to the drift layer and in electronic communication with the drain, the barrier layer comprising a current blocking layer and an aperture region, a two-dimensional hole gas-containing layer disposed in the first direction relative to the barrier layer, a gate electrode oriented to alter an energy level of the aperture region when a gate voltage is applied to the gate electrode, and a source in ohmic contact with the two-dimensional hole gas-containing layer. At least one of an additional layer, the drain, the drift region, the current blocking layer, the two-dimensional hole gas-containing layer, and the aperture region comprises diamond.

36 MATERIALS SCIENCE↗
DOE OSTI2020

Regrowth method for fabricating wide-bandgap transistors, and devices made thereby

Methods are provided for fabricating a HEMT (high-electron-mobility transistor) that involve sequential epitaxial growth of III-nitride channel and barrier layers, followed by epitaxial regrowth of further III-nitride material through a window in a mask layer. The regrowth takes place on the barrier layer, only in the access region or regions. Devices made according to the disclosed methods are also provided.

36 MATERIALS SCIENCE↗
DOE OSTI2023

Control of power converters having integrated capacitor blocked transistor cells

Various examples of power converters including Integrated Capacitor Blocked Transistor (ICBT) cells and methods of control of power converters having ICBT cells are described. In one example, a power converter includes an upper arm including a plurality of upper ICBT cells connected in series to form a series connection path and a lower arm including a plurality of lower ICBT cells connected in series in the series connection path. A controller can be configured to provide a control signal pair to each of the upper ICBT cells and a complementary control signal pair to each of the lower ICBT cells to control the converter output. A capacitor voltage controller can be configured to balance a voltage potential among ICBT capacitors in at least one of the upper arm and the lower arm.

Yu, Jianghui↗
DOE OSTI2023

Simulation of gallium nitride vertical fin-shaped field effect transistor for use as thermal neutron detector

Through the use of a radiation detection system simulation framework, a gallium nitride vertical fin-shaped field effect transistor (FinFET) was studied for output response when utilized as a thermal neutron detector. The FinFET was assumed to had been backfilled with boron carbide, reactive to thermal neutrons. The GaN FinFET was modeled with radiation transport from MCNP, and the electronic transport from COMSOL Multiphysics. Fabricated FinFET devices (not neutron reactive) were tested to aid in the tuning of the COMSOL FinFET model. Through time-depenent studies, the drain current response pulse to simulated ionization due to single events lead to building of a database of device responses to radiation. By integrating the current pulses over time, the induced charge was calculated. Using the results of the radiation transport PTRAC file in combination with the induced charge database, an integrated charge spectrum was calculated.

Davidson, Bryce L.↗
DOE OSTI2023

Bipolar transistor structure with collector on polycrystalline isolation layer and methods to form same

Embodiments of the disclosure provide a bipolar transistor structure with a collector on a polycrystalline isolation layer. A polycrystalline isolation layer may be on a substrate, and a collector layer may be on the polycrystalline isolation layer. The collector layer has a first doping type and includes a polycrystalline semiconductor. A base layer is on the collector layer and has a second doping type opposite the first doping type. An emitter layer is on the base layer and has the first doping type. A material composition of the doped collector region is different from a material composition of the base layer.

Holt, Judson R.↗
DOE OSTI2023

Power converter with co-packaged secondary field effect transistors (FETs)

A power converter with co-packaged secondary field effect transistors (FETs) are described. The power converter can include a first circuit, a transformer connected to an output of the first circuit, and a second circuit connected to an output of the transformer. The second circuit can include an inductor, a first FET coupled between the transformer and the inductor, and a second FET coupled between the first FET and ground. The first FET and the second FET can be co-packaged as a single package.

24 POWER TRANSMISSION AND DISTRIBUTION↗
DOE OSTI2024

Selective solid-state isolation of NMR circuit elements using back-to-back field effect transistors

Nuclear Magnetic Resonance (NMR) electronics that employ selective solid-state isolation of circuit elements can include solid-state switches, such as back-to-back Field Effect Transistor (FET) pairs, and isolated gate drive electronics adapted to operate the solid-state switches in order to selectively decouple induction coils from receive electronics. The solid-state switches can be placed in series to achieve higher standoff voltages, and can be configured for low on resistance and short switching times. The gate drive electronics can include electrical isolation components adapted to enhance standoff voltages and reduce electrical noise at the selectively isolated receive electronics.

Walsh, David O.↗
DOE OSTI2026

Design and Modeling of the Charge Readout of a SiMOS Quantum Dot with a Single Electron Transistor and CryoCMOS

Single electron spin qubits trapped in SiMOS quantum dots are a promising technology for scaling to thousand- or million-qubit systems due to their compatibility with mature CMOS manufacturing processes. A readout system that combines a single electron transistor with a custom cryogenic CMOS amplification and digitization chain offers key advantages by avoiding the use of bulky RF components or room-temperature interconnects. We present design techniques and simulation results for an optimized qubit-SET cryoCMOS interface, culminating in the design of the QNDR1 ASIC, the first cryogenic readout ASIC designed under the Quandarum project, which targets the development of a many-channel spin qubit based detector for use in high energy physics.

Quinn, Adam [Fermilab] (ORCID:0009000605056371)↗
DOE OSTI2024

Size Effect of Negative Capacitance State and Subthreshold Swing in Van der Waals Ferrielectric Field–Effect Transistors

Analytical calculations corroborated by the finite element modeling show that thin films of Van der Waals ferrielectrics covered by a 2D-semiconductor are promising candidates for the controllable reduction of the dielectric layer capacitance due to the negative capacitance (NC) effect emerging in the thin films. The NC state is conditioned by energy-degenerated poly-domain states of the ferrielectric polarization induced in the films under incomplete screening conditions in the presence of a dielectric layer. Calculations performed for the FET-type heterostructure “ferrielectric CuInP 2 S 6 film—2D-MoS 2 single-layer—SiO 2 dielectric layer” reveal the pronounced size effect of the multilayer capacitance. Derived analytical expressions for the electric polarization and multilayer capacitance allow to predict the thickness range of the dielectric layer and ferrielectric film for which the NC effect is the most pronounced in various Van der Waals ferrielectrics, and the corresponding subthreshold swing becomes much less than the Boltzmann's limit. Obtained results can be useful for the size and temperature control of the NC effect in the steep-slope ferrielectric FETs.

36 MATERIALS SCIENCE↗