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At least 127 records · Page 7

Fast and efficient Sb-based type-II phototransistors integrated on silicon

Increasing the energy efficiency and reducing the footprint of on-chip photodetectors enable dense optical interconnects for emerging computational and sensing applications. While heterojunction phototransistors (HPTs) exhibit high energy efficiency and negligible excess noise factor, their gain-bandwidth product (GBP) has been inferior to that of avalanche photodiodes at low optical powers. Here, we demonstrate that utilizing type-II energy band alignment in an Sb-based HPT results in six times smaller junction capacitance per unit area and a significantly higher GBP at low optical powers. These type-II HPTs were scaled down to 2 μm in diameter and fully integrated with photonic waveguides on silicon. Thanks to their extremely low dark current and high internal gain, these devices exhibit a GBP similar to the best avalanche devices (∼270 GHz) but with one order of magnitude better energy efficiency. Their energy consumption is about 5 fJ/bit at 3.2 Gbps, with an error rate below 10−9 at −25 dBm optical power at 1550 nm. These features suggest new opportunities for creating highly efficient and compact optical receivers based on phototransistors with type-II band alignment.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗

Nanomotor-enhanced transport of passive Brownian particles in porous media

Artificial micro/nanomotors are expected to perform tasks in interface-rich and species-rich environments for biomedical and environmental applications. In these highly confined and interconnected pore spaces, active species may influence the motion of coexisting passive participants in unexpected ways. Using three-dimensional super-resolution single-nanoparticle tracking, we observed enhanced motion of passive nanoparticles due to the presence of dilute well-separated nanomotors in an interconnected pore space. This enhancement acted at distances that are large compared to the sizes of the particles and cavities, in contrast with the insignificant effect on the passive particles with the same dilute concentration of nanomotors in an unconfined liquid. Experiments and simulations suggested an amplification of hydrodynamic coupling between self-propelled and passive nanoparticles in the interconnected confined environment, which enhanced the effective energy for passive particles to escape cavities through small holes. This finding represents an emergent behavior of confined nanomotors and suggests new strategies for the development of antifouling membranes and drug delivery systems.

77 NANOSCIENCE AND NANOTECHNOLOGY↗

Catalysts and Electrodes for Affordable Hydrogen Generation and Utilization [Slides]

Hydrogen enables energy pathways across applications and sectors in an increasingly interconnected energy system, helping deep decarbonization, economic growth, and jobs creation. Electrochemical Energy Conversion Devices produce "green" H 2 from water: electrolyzers. H 2 is used to produce "green" electricity through fuel cells. There is a need of catalysts to enhance reactions kinetics at the electrodes.

08 HYDROGEN↗

Signal-interleaving device

Interleaving devices combine and duplicate optical electronic and other energy-saving signals in signal processing applications necessary for recording heads in interconnecting logic elements in computers and in data transmission systems. Simple cubic interleaver is characterized by high energy transmission and potentiality for low cost fabrication, and is designed to be easily interconnected with other signal processing elements.

Fischer, J. R.↗

SPOT4 Operational Control Center (CMP)

CNES(F) is responsible for the development of a new generation of Operational Control Center (CMP) which will operate the new heliosynchronous remote sensing satellite (SPOT4). This Operational Control Center takes large benefit from the experience of the first generation of control center and from the recent advances in computer technology and standards. The CMP is designed for operating two satellites all the same time with a reduced pool of controllers. The architecture of this CMP is simple, robust, and flexible, since it is based on powerful distributed workstations interconnected through an Ethernet LAN. The application software uses modern and formal software engineering methods, in order to improve quality and reliability, and facilitate maintenance. This software is table driven so it can be easily adapted to other operational needs. Operation tasks are automated to the maximum extent, so that it could be possible to operate the CMP automatically with very limited human interference for supervision and decision making. This paper provides an overview of the SPOTS mission and associated ground segment. It also details the CMP, its functions, and its software and hardware architecture.

Zaouche, G.↗

A combined electron beam/optical lithography process step for the fabrication of sub-half-micron-gate-length MMIC chips

Advanced radar and communication systems rely heavily on state-of-the-art microelectronics. Systems such as the phased-array radar require many transmit/receive (T/R) modules which are made up of many millimeter wave - microwave integrated circuits (MMIC's). The heart of a MMIC chip is the Gallium Arsenide (GaAs) field-effect transistor (FET). The transistor gate length is the critical feature that determines the operating frequency of the radar system. A smaller gate length will typically result in a higher frequency. In order to make a phased array radar system economically feasible, manufacturers must be capable of producing very large quantities of small-gate-length MMIC chips at a relatively low cost per chip. This requires the processing of a large number of wafers with a large number of chips per wafer, minimum processing time, and a very high chip yield. One of the bottlenecks in the fabrication of MIMIC chips is the transistor gate definition. The definition of sub-half-micron gates for GaAs-based field-effect transistors is generally performed by direct-write electron beam lithography (EBL). Because of the throughput limitations of EBL, the gate-layer fabrication is conventionally divided into two lithographic processes where EBL is used to generate the gate fingers and optical lithography is used to generate the large-area gate pads and interconnects. As a result, two complete sequences of resist application, exposure, development, metallization and lift-off are required for the entire gate structure. We have baselined a hybrid process, referred to as EBOL (electron beam/optical lithography), in which a single application of a multi-level resist is used for both exposures. The entire gate structure, (gate fingers, interconnects and pads), is then formed with a single metallization and lift-off process. The EBOL process thus retains the advantages of the high-resolution E-beam lithography and the high throughput of optical lithography while essentially eliminating an entire lithography/metallization/lift-off process sequence. This technique has been proven to be reliable for both trapezoidal and mushroom gates and has been successfully applied to metal-semiconductor and high-electron-mobility field-effect transistor (MESFET and HEMT) wafers containing devices with gate lengths down to 0.10 micron and 75 x 75 micron gate pads. The yields and throughput of these wafers have been very high with no loss in device performance. We will discuss the entire EBOL process technology including the multilayer resist structure, exposure conditions, process sensitivities, metal edge definition, device results, comparison to the standard gate-layer process, and its suitability for manufacturing.

Sewell, James S.↗

Optical Interconnection Via Computer-Generated Holograms

Method of free-space optical interconnection developed for data-processing applications like parallel optical computing, neural-network computing, and switching in optical communication networks. In method, multiple optical connections between multiple sources of light in one array and multiple photodetectors in another array made via computer-generated holograms in electrically addressed spatial light modulators (ESLMs). Offers potential advantages of massive parallelism, high space-bandwidth product, high time-bandwidth product, low power consumption, low cross talk, and low time skew. Also offers advantage of programmability with flexibility of reconfiguration, including variation of strengths of optical connections in real time.

Liu, Hua-Kuang↗

LinkWinds: An Approach to Visual Data Analysis

The Linked Windows Interactive Data System (LinkWinds) is a prototype visual data exploration and analysis system resulting from a NASA/JPL program of research into graphical methods for rapidly accessing, displaying and analyzing large multivariate multidisciplinary datasets. It is an integrated multi-application execution environment allowing the dynamic interconnection of multiple windows containing visual displays and/or controls through a data-linking paradigm. This paradigm, which results in a system much like a graphical spreadsheet, is not only a powerful method for organizing large amounts of data for analysis, but provides a highly intuitive, easy to learn user interface on top of the traditional graphical user interface.

Jacobson, Allan S.↗

Bank Terminals

In the photo, employees of the UAB Bank, Knoxville, Tennessee, are using Teller Transaction Terminals manufactured by SCI Systems, Inc., Huntsville, Alabama, an electronics firm which has worked on a number of space projects under contract with NASA. The terminals are part of an advanced, computerized financial transaction system that offers high efficiency in bank operations. The key to the system's efficiency is a "multiplexing" technique developed for NASA's Space Shuttle. Multiplexing is simultaneous transmission of large amounts of data over a single transmission link at very high rates of speed. In the banking application, a small multiplex "data bus" interconnects all the terminals and a central computer which stores information on clients' accounts. The data bus replaces the maze-of wiring that would be needed to connect each terminal separately and it affords greater speed in recording transactions. The SCI system offers banks real-time data management through constant updating of the central computer. For example, a check is immediately cancelled at the teller's terminal and the computer is simultaneously advised of the transaction; under other methods, the check would be cancelled and the transaction recorded at the close of business. Teller checkout at the end of the day, conventionally a time-consuming matter of processing paper, can be accomplished in minutes by calling up a summary of the day's transactions. SCI manufactures other types of terminals for use in the system, such as an administrative terminal that provides an immediate printout of a client's account, and another for printing and recording savings account deposits and withdrawals. SCI systems have been installed in several banks in Tennessee, Arizona, and Oregon and additional installations are scheduled this year.

Source record↗

FNET/GridEye: A Tool for Situational Awareness of Large Power Interconnetion Grids

This paper gives an overview of a wide-area measurement system deployed at the distribution level: FNET/GridEye, which consists of hundreds of sensors, communication and a data center. The sensors are utilized to take frequency, voltage phase angle and magnitude measurements from the ordinary 110 or 220V outlets in offices or residential houses. These measurements are continuously transmitted to the data center via Internet. Many applications have been implemented to monitor large-scale interconnected power grids, and interpret grid operation status to improve system operators' situational awareness capability. Some representative online and offline applications are presented in this paper, as well as several recently developed new applications.

Zhu, Lin↗

Experimental Validation of a Modular All-Electric Power Take-Off Topology for Wave Energy Converter Enabling Marine Renewable Energy Interconnection

Power electronic converters are an enabling technology for the emerging marine energy applications, such as using ocean waves to produce electricity. This paper outlines the power take-off system and its key components used in a wave energy converter offering modularity and scalability to generate power efficiently. The proposed power take-off system was implemented based on a modular multilevel converter and could be deployed to convert any alternating current electrical energy to a different alternating current for interconnection to grid or non-grid applications. Examples of widespread deployment are supplying electricity to coastal communities or producing clean drinking water. The analysis using both the simulation tests and laboratory experiments verified the design objectives and basic functionality of the developed power take-off system. An acceptable response using a field programmable gate array-based controlled laboratory testbench was achieved, complying with guidelines specified in the prevalent industry standards. Seamless operation during steady-state and transients for the studied wave energy converter was achieved as supported by the obtained results. The key findings of this work were experimentally examined under different load conditions, direct current bus voltage fluctuations, and generator speed–torque regulation. The ability of the power take-off system to generate high-power quality of the waveforms, e.g., against adhering to the IEEE 519-2022 standard for total harmonic distortion limits, is also confirmed.

Engineering↗

Preliminary reliability evaluation of flip chip on flex interconnect technology

The study was carried out to evaluate the flip-chip-on-flex (FCOF) interconnection process in order to determine its feasibility for space flight applications. The key objectives were to: develop and apply simple and cost effective process steps needed to manufacture FCOFs and build test samples; perform a preliminary technology validation, and determine any initial environmental or application risks. The FCOF was shown to be simpler and more economical than other chip interconnection schemes.

Shaw, Jack J.↗

Smarter building start – A distributed solution

A significant focus of research and new technologies for reducing energy use in buildings is on operating the systems more efficiently during the times when the systems are active. However, there is a large potential for energy savings in determining the periods when the systems should or should not be active. This scheduling aspect of operation is often overlooked even though relatively simple solutions can unlock substantial energy savings. In this paper we describe a smart building start (SBS) algorithm that considers multiple zones in a building to determine individual schedules for room controllers as well as the central systems based on solving a simple optimization problem. Application of the SBS algorithm to multiple interconnected systems enables a staggered start-up that minimizes peak loads and also ensures comfort is within a target range with minimal system run time. The SBS algorithm extends the capability of traditional optimal start and is designed to be simple to deploy and robust. Simulation results as well as results from tests in a real building with a VAV system are presented. The presented algorithm is applicable to any type of building with a zonal or multi-zone HVAC system. To function, it needs to be able to change setpoints in rooms and monitor room temperatures, as well as, if desired, turn the central system on or off.

32 ENERGY CONSERVATION, CONSUMPTION, AND UTILIZATI↗

Towards a Software Development Framework for Interconnected Science Ecosystems

The innovative science of the future must be multi-domain and interconnected to usher in the next generation of “self-driving” laboratories enabling consequential discoveries and transformative inventions. Such a disparate and interconnected ecosystem of scientific instruments will need to evolve using a system-of-systems (SoS) approach. The key to enabling application integration with such an SoS will be the use of Software Development Kits (SDKs). Currently, SDKs facilitate scientific research breakthroughs via algorithmic automation, databases and storage, optimization and structure, pervasive environmental monitoring, among others. However, existing SDKs lack instrument-interoperability and reusability capabilities, do not effectively work in an open federated architectural environment, and are largely isolated within silos of the respective scientific disciplines. Inspired by the scalable SoS framework, this work proposes the development of INTERSECT-SDK to provide a coherent environment for multi-domain scientific applications to benefit from the open federated architecture in an interconnected ecosystem of instruments. This approach will decompose functionality into loosely coupled software services for interoperability among several solutions that do not scale beyond a single domain and/or application. Furthermore, the proposed environment will allow operational and managerial inter-dependence while providing opportunities for the researchers to reuse software components from other domains and build universal solution libraries. We demonstrate this research for microscopy use-case, where we show how INTERSECT-SDK is developing the tools necessary to enable advanced scanning methods and accelerate scientific discovery.

Malviya, Addi Thakur↗

High temperature, low mass solar blanket development

This paper presents methods of incorporating ultrathin silicon solar cells into photovoltaic blankets for space applications. This type of cell has the highest power-to-mass ratio and best performance under space radiation of any silicon solar cell. Interconnect materials and designs, and the results of the investigation of the applicability of parallel-gap resistance welding for interconnecting ultrathin cells are discussed. Data relating contact pull strength and cell electrical degradation to welding parameters such as time, voltage, and pressure are presented. Methods for bonding ultrathin cells to flexible substrates and for bonding thin covers to these cells are described, and the results of vacuum thermal cycling and thermal soak tests on prototype ultrathin cell test coupons are included.

Mesch, H. G.↗

Blanket technology

It was concluded that systems requirements would force a reassessment of the conventional approach to interconnecting cells into blanket or array modules. Defense applications (hardening) were identified as the key requirement that would force a movement away from the standard method (solder) of forming array circuits. The panel also agreed that requirements associated with the impending NASA Space Station and in-bound missions would lead to alternative interconnecting approaches. It was concluded that the diverse requirements of future space missions (high temperature and extended thermal cycling) might not be met by one approach, such as parallel-gap resistance welding. The panel suggested that other options such as high temperature solders and brazing be considered for the various mission requirements that were anticipated. The panel agreed that blanket technology was potentially suitable for in-orbit annealing to temperatures of 200 C provided that conventional soldered connecting techniques were replaced by "welding".

Scott-Monck, J.↗

The Highly Robust Electrical Interconnects and Ultrasensitive Biosensors Based on Embedded Carbon Nanotube Arrays

We report on our recent breakthroughs in two different applications using well-aligned carbon nanotube (CNT) arrays on Si chips, including (1) a novel processing solution for highly robust electrical interconnects in integrated circuit manufacturing, and (2) the development of ultrasensitive electrochemical DNA sensors. Both of them rely on the invention of a bottom-up fabrication scheme which includes six steps, including: (a) lithographic patterning, (b) depositing bottom conducting contacts, (c) depositing metal catalysts, (d) CNT growth by plasma enhanced chemical vapor deposition (PECVD), (e) dielectric gap-filling, and (f) chemical mechanical polishing (CMP). Such processes produce a stable planarized surface with only the open end of CNTs exposed, whch can be further processed or modified for different applications. By depositing patterned top contacts, the CNT can serve as vertical interconnects between the two conducting layers. This method is fundamentally different fiom current damascene processes and avoids problems associated with etching and filling of high aspect ratio holes at nanoscales. In addition, multiwalled CNTs (MWCNTs) are highly robust and can carry a current density of 10(exp 9) A/square centimeters without degradation. It has great potential to help extending the current Si technology. The embedded MWCNT array without the top contact layer can be also used as a nanoelectrode array in electrochemical biosensors. The cell time-constant and sensitivity can be dramatically improved. By functionalizing the tube ends with specific oligonucleotide probes, specific DNA targets can be detected with electrochemical methods down to subattomoles.

Li, Jun↗

Thin Film Characterization on Cu/SnAg Solder Interface for 3D Packaging Technologies

Copper is a commonly used interconnect metal in microelectronic interconnects due to its exceptional electrical and thermal properties. Particularly in applications of the 2.5 and 3D integration, Cu is utilized in through-silicon-vias (TSVs) and flip chip interconnects between microelectronic chips for providing miniaturization, lower power and higher performance than current 2D packaging approaches. Furthermore, SnAg capped Cu pillars are a common high-density interconnect technology for flip chip bonding. For these interconnects, specific properties of the Cu surface, such as roughness and cleanliness, are an important factor in the process to ensure quality solder bumps. During electroplating, tight processing parameters must be met so that defects are avoided, and high bump uniformity is achieved. An understanding of the interactions at the solder and Cu pillar interface is needed, based on the electroplating parameters, to determine the best method for populating solder on the wafer surface. In this study, surface treatment techniques such as oxygen plasma cleaning were performed on the Cu surfaces and the SnAg plating chemistry for depositing the solder were evaluated through hull cell testing to qualitatively determine the range of current densities to investigate. It was observed that current density while plating played a large role in solder bump deposition morphology. At the higher current densities greater than 60 mA/cm 2 , bump height non-uniformity and dendritic growth are observed and at lower current densities, less than or equal to 60 mA/cm 2 , uniform, continuous bump height occurred.

36 MATERIALS SCIENCE↗