The evolution of IMP spacecraft MOSFET data systems
MOSFET data systems evolution for IMP, discussing effects on system design and reliability approach
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MOSFET data systems evolution for IMP, discussing effects on system design and reliability approach
Continuing development and expansion of a series of P-channel MOSFET circuits in flight data systems is reported. Using hybrid thick film techniques, these circuits evolved into bugs with more than 1000 transistors on a chip. A proposed data system for Helios satellite will have approximately 130 bugs and a semiconductor count of more than 100,000, will weigh less than 1 N and use less than 1.2 W.
A liquid helium-cooled p-channel enhancement mode MOSFET, the 3N167, is found to have sufficiently low noise for use as a preamplifier with helium-cooled bolometers that are used in infrared astronomy. Its characteristics at 300, 77, and 4.2 K are presented. It is also shown to have useful application with certain photoconductive and photovoltaic infrared detectors.
Report describes one-year research effort in VLSL fabrication. Four activities are described: theoretical study of two-dimensional diffusion in SOS (silicon-on-sapphire); setup of sputtering system, furnaces, and photolithography equipment; experiments on double layer metal; and investigation of two-dimensional modeling of MOSFET's (metal-oxide-semiconductor field-effect transistors).
The ionizing radiation responses of metal oxide semiconductor (MOS) field-effect transistors (FETs) and MOS capacitors are compared. It is shown that the radiation-induced threshold voltage shift correlates closely with the shift in the MOS capacitor inversion voltage. The radiation-induced interface-state density of the MOSFETs and MOS capacitors was determined by several techniques. It is shown that the presence of 'slow' states can interfere with the interface-state measurements.
High current and voltage controlled remotely. Remote Power Conroller includes two series-connected banks of parallel-connected MOSFET's to withstand high current and voltage. Voltage sharing between switch banks, low-impedance, gate-drive circuits used. Provided controlled range for turn on. Individually trimmable to insure simultaneous switching within few nanoseconds during both turn on and turn off. Control circuit for each switch bank and over-current trip circuit float independently and supplied power via transformer T1 from inverter. Control of floating stages by optocouplers.
An addressable matrix of 32 CMOS transistors was designed into a test chip to be flown on the Combined Release and Radiation Effects Satellite (CRRES). In this paper the matrix is described along with a SPICE-like parameter extraction procedure called JMOSFIT, and Cobalt 60 radiation test results are presented that illustrate the shift in the 21-MOSFET parameters derived from JMOSFIT.
Theoretical paper discusses response of enhancement-mode metal oxide/semiconductor field-effect transistor to cosmic-ray ion that passes perpendicularly through gate-oxide layers. Even if ion causes no permanent damage, temporary increase of electrical conductivity along track of ion large enough and long enough to cause change in logic state in logic circuit containing MOSFET.
A simple passive circuit that improves current balance in parallelled power MOSFETs that are not precisely matched and that are operated in their active region from a common gate drive are exhibited. A nonlinear circuit consisting of diodes and resistors generates the differential gate potential required to correct for unbalance while maintaining low losses over a range of current. Also application of a thin tape wound magnetic core to effect dynamic current balance is reviewed, and a simple theory is presented showing that for operation in the active region the branch currents tend to revert to their normal unbalanced values even if the core is not driven into saturation. Results of several comparative experiments are given.
In this paper results are compared from a parameter extraction procedure applied to the linear, saturation, and subthreshold regions for enhancement-mode MOSFETs fabricated in a 3-micron CMOS process. The results indicate that the extracted parameters differ significantly depending on the extraction algorithm and the distribution of I-V data points. It was observed that KP values vary by 30 percent, VT values differ by 50 mV, and Delta L values differ by 1 micron. Thus for acceptance of wafers from foundries and for modeling purposes, the extraction method and data point distribution must be specified. In this paper measurement and extraction procedures that will allow a consistent evaluation of measured parameters are discussed.
In modified high-power, phase-controlled, full-bridge, pulse-width-modulated dc-to-dc converters, switching devices power metal oxide/semiconductor field-effect transistors (MOSFET's). Decreases dissipation of power during switching by eliminating approximately 0.7-V forward voltage drop in anti-parallel diodes. Energy-conversion efficiency increased.
Driver circuit generates rapid-voltage-transition pulses needed to switch high-power metal oxide/semiconductor field-effect transistor (MOSFET) modules rapidly between full "on" and full "off". Rapid switching reduces time of overlap between appreciable current through and appreciable voltage across such modules, thereby increasing power efficiency.
Simple circuit makes currents more nearly equal. Addition of diodes and adjustable-tap resistor increases operating range over which drain currents in two unmatched power MOSFET's brought more nearly into balance.
Susceptibilities of power metal-oxide/semiconductor field-effect transistors (MOSFET's) to single-event gate ruptures analyzed by exposing devices to beams of energetic bromine ions while applying appropriate bias voltages to source, gate, and drain terminals and measuring current flowing into or out of each terminal.
Circuit measures total dose of ionizing radiation in terms of shift in threshold gate voltage of doped-channel metal oxide/semiconductor field-effect transistor (p-MOSFET). Drain current set at temperature-independent point to increase accuracy in determination of radiation dose.
A 3D 'atomistic' simulation technique to study random impurity induced threshold voltage lowering and fluctuations in sub 0. 1 micron MOSFETs is presented. It allows statistical analysis of random impurity effects down to the individual impurity level-Efficient algorithms based on a single solution of Poisson's equation, followed by the solution of a simplified current continuity equation are used in the simulations.
3D 'atomistic' simulations are used to study random dopant related threshold voltage fluctuations in 50 nm MOSFETs. Comparisons are made between conventionally doped transistors and transistors with thin epitaxial silicon layers on heavily doped silicon. Issues related to both the optimum threshold voltage control and the suppression of the threshold voltage dispersion are addressed.
In this paper for the first time we study the influence of the polysilicon gate on the random dopant induced threshold voltage fluctuations in sub 100 nm MOSFETs with tunnelling gate oxides. This is done by using an efficient 3D 'atomistic' simulation technique described elsewhere. Devices with uniform channel doping and with low doped epitaxial channels have been investigated. The simulations reveale that the polysilicon gate is responsible for a substantial fraction of the threshold voltage fluctuations in both devices when the gate oxide is scaled to tunnelling thickness in the range of 1 - 2 nm.