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At least 1,225 records · Page 68
All sourcesNASA NTRSDOE OSTI
NASA NTRS1982

Optimization of solar cells for air mass zero operation and a study of solar cells at high temperatures

The power to weight ratio of GaAs cells can be reduced by fabricating devices using thin GaAs films on low density substrate materials (silicon, glass, plastics). A graphoepitaxy technique was developed which uses fine geometric patterns in the substrate to affect growth. Initial substrates were processed by etching 25 microns deep grooves into 100 oriented wafers; fine-grained polycrystalline GaAs layers 25-50 microns thick were then deposited on these and recrystallization was performed, heating the substrates to above the GaAs melting point in ASH3 atmosphere, resulting in large grain regrowth oriented along the groove dimensions. Experiments with smaller groove depths and spacings were initially encouraging; single large GaAs grains would totally cover one and often two groove fields of 14 groove each spanning several hundred microns. Dielectric coatings on the grooved substrates were also used to modify the growth.

Hovel, H. J.↗
NASA NTRS1981

High efficiency thin-film GaAs solar cells

The paper demonstrates the feasibility of producing high-efficiency GaAs solar cells with high power-to-weight ratios by organic metallic chemical vapor deposition (OM-CVD) growth of thin epi-layers on suitable substrates. An AM1 conversion efficiency of 18% (14% AM0), or 17% (13% AM0) with a 5% grid coverage is achieved for a single-crystal GaAs n(+)/p cell grown by OM-CVD on a Ge wafer. Thin GaAs epi-layers OM-CVD grown can be fabricated with good crystallographic quality using a Si-substrate on which a thin Ge epi-interlayer is first deposited by CVD from GeH4 and processed for improved surface morphology

Zwerdling, S.↗
NASA NTRS1981

Soft X-ray imaging with a normal incidence mirror

By sputtering, it is possible to make multilayered structures (layered synthetic microstructures or LSMs) with individual layers as thin as a fraction of a nanometer. These techniques have been used to make a multilayered interference mirror to reflect carbon K X rays (at a wavelength of 4.48 nm) at normal incidence. The structure consists of 76 layers of tungsten of thickness 0.765 nm with layers of carbon (thickness 1.510 nm) interspersed, deposited on a 111 line type silicon wafer substrate. This LSM was formed into a concave mirror of radius approximately 1.1 m by bending the substrate, and used in an optical set-up to form images of grids illuminated by an X-ray source. The mirror was found to have a resolution of 5 lines/mm and an efficiency, integrated over the CK band, of between 4 and 8%.

Underwood, J. H.↗
NASA NTRS1981

Progress toward goals in silicon sheet development

One of the goals of the national photovoltaic program in the U.S. is the establishment of an industry producing photovoltaic material which can be sold at a price not exceeding $0.70/W by 1986. A key element concerning the achievement of this goal is the development and utilization of improved methods for producing silicon sheet. Specific technologies being investigated in this connection can be divided into two categories. Methods of one category are based on a utilization of sheet growth techniques including film-fed growth, dendritic web, and silicon-on-ceramic processes. The approaches used by methods of the second category involve ingot and wafering processes, including Czochralski growth, the heat exchanger method, multiblade procedures, and the use of a fixed abrasive multiwire. It is found that using $84/kg silicon, most sheet technologies would yield module prices in the $2.00/Wp to $3.00/Wp range.

Koliwad, K. M.↗
NASA NTRS1982

Flip-flop resolving time test circuit

Integrated circuit (IC) flip-flop resolving time parameters are measured by wafer probing, without need of dicing or bonding, throught the incorporation of test structures on an IC together with the flip-flop to be measured. Several delays that are fabricated as part of the test circuit, including a voltage-controlled delay with a resolution of a few picosecs, are calibrated as part of the test procedure by integrating them into, and out of, the delay path of a ring oscillator. Each of the delay values is calculated by subtracting the period of the ring oscillator with the delay omitted from the period with the delay included. The delay measurement technique is sufficiently general for other applications. The technique is illustrated for the case of the flip-flop parameters of a 5-micron feature size NMOS circuit.

Rosenberger, F.↗
NASA NTRS1982

The combined effects of Fe and H2 on the nitridation of silicon

In view of the support offered by previous work for the suggestion that Fe may affect alpha-Si3N4 formation and microstructural development, a two-part study was conducted to differentiate the effects of H2 and Fe in, first, the nitridation of pure and of Fe-containing powder in N2 and N2-4% H2, and then the nitridation of (1 1 1) Si single crystal wafers with and without Fe powder on the surface. The degree of nitridation is most strongly affected by H2 at 1200 C, but by Fe at 1375 C, where Fe-containing samples in either atmosphere were almost completely nitrided. While neither H2 nor Fe alone changed the ratio of alpha-Si3N4 to beta-Si3N4, the combination of H2 and Fe increased it at both temperatures.

Shaw, N. J.↗
NASA NTRS1981

Optimization of large area solar cells for low cost space application

The development of large-area solar cell manufacturing techniques for production of up to 10 kW/month of cells for use on the Shuttle Power Extension Package is detailed. Design goals for the cells were 14% efficiency at 135.3 mW/sq cm AM0 illumination for a 10 ohm-cm BSF/reflector cell, or 12.8% for a 2 ohm-cm BSR cell. Use of terrestrial cell technology to produce CVD SiO2 dielectric insulators for 3-in. ingot cells yielded satisfactory contact integrity. Fused silica coverings with thicknesses of 0.004 in. have allowed exploration of conventional and wraparound cell configurations due to inherent flexibilities of the frosted covers. One production run can now handle 108 3-in. wafers for the wraparound form or 216 in one-sided contact evaporations, with both processes taking 70 mins. Current contact grid designs for space use production permits average efficiencies of 12.8%.

Matthei, K. W.↗
NASA NTRS1981

Laser processing of silicon solar cells

Results of a study to utilize an Nd:glass laser for production line annealing of ion implantation induced damage in solar cells are reported. Czochralski-grown and sawn Si wafers 7.6 cm in diam, 0.35 mm thick, were implanted with phosphorus junctions and boron BSFs. Annealing with electron beam, laser, and firing of an Al paste to form the BSFs in different cells was compared. The laser was employed at 1.06 and 0.53 micron and in combination of both, with a 20-50 nsec pulsewidth, and energy densities of 1.2, 1.5, 1.9, and 2.1 J/sq cm. Best optical coupling was observed with the combined wavelengths and a 20 nsec pulse, using energy densities less than 1.5 J/sq cm. Although the Al sintered cells displayed the best characteristics, laser annealing is concluded to offer electrically active, defect-free, shallow junction Si substrates for high efficiency cells.

Katzeff, J. S.↗
NASA NTRS1981

Apparatus and technique for pulsed electron beam annealing for solar cell production

Many of the demands of high-throughput processing of solar cells can be satisfied by transient methods using pulsed electron beams. A prototype pulsed electron beam processor for solar cell production has been built, and is intended for automated annealing of solar cell junction ion implantation at a rate of 1200-1800 silicon wafers per hour. Other applications include solar cell junctions by pulse diffusion, annealing of ion-implanted back surface fields, and pulse sintering of cell metallization.

Landis, G. A.↗
NASA NTRS1981

Epitaxial thin film GaAs solar cells using OM-CVD techniques

A new approach has been initiated at JPL to fabricate thin-film, high efficiency GaAs solar cells on low-cost, single-crystal Si substrates having a thin CVD interlayer of Ge to minimize the lattice and thermal expansion mismatch. For initial experiments, n(+)/p GaAs cells were grown by OM-CVD on single-crystal GaAs and Ge wafers. Details of the growths and performance results will be presented. Subsequently, a combined epitaxial structure of OM-CVD GaAs on a strongly adherent Ge interlayer on (100) Si was grown. This is the first report of the successful growth of this composite structure. Low module costs projected by JPL SAMICS methodology calculations and the potential for 400-600W/kg space solar arrays will be discussed.

Stirn, R. J.↗
NASA NTRS1982

Lateral epitaxial overgowth of GaAs by organometallic chemical vapor deposition

Lateral epitaxial overgrowth of GaAs by organometallic chemical vapor deposition has been demonstrated. Pyrolytic decomposition of trimethylgallium and arsine, without the use of HCl, was used to deposit GaAs on substrates prepared by coating (110) GaAs wafers with SiO2, then using photolithography to open narrow stripes in the oxide. Lateral overgrowth was seeded by epitaxial deposits formed on the GaAs surfaces exposed by the stripe openings. The extent of lateral overgrowth was investigated as a function of stripe orientation and growth temperature. Ratios of lateral to vertical growth rates greater than five have been obtained. The lateral growth is due to surface-kinetic control for the two-dimensional growth geometry studied. A continuous epitaxial GaAs layer 3 microns thick has been grown over a patterned mask on a GaAs substrate and then cleaved from the substrate.

Gale, R. P.↗
NASA NTRS1983

Annealing Solar Cells With Lasers

Laser anneals silicon solar cells rapidly enough for use in production. Laser frequently doubled neoduyminum: yttrium-aluminum-garnet (Nd:YAG) device. 30-m-diameter spot formed by lasers covers enough area to process silicon wafers rapidly. Laser anealed cells have efficiencies greater than 15 percent.

Katzeff, J. S.↗
NASA NTRS1983

Fracture Strength of Silicon Solar Cells

Tests during processing show way to reduce breakage and increase yield. Silicon wafer twisted by four equally spaced dowel pins, two pushing up and two pushing down. Uniform shear stress found along line 45 degrees from axes of two load pairs. Test helping to develop reliable information on nature and source of flows causing cell fracture.

Chen, C. P.↗
NASA NTRS1984

Low-Cost GaAs Solar Cells

Single-crystal gallium arsenide (GaAs) solar cell produced at greatly reduced cost by replacing GaAs wafer substrate with silicon substrate.

Stirn, R. J.↗
NASA NTRS1984

Integrated Tactile Sensor for Robots

Proposed large-scale integrated (LSI) circuit gives robots, partshandling machines, and remote-control devices sense of touch. LSI circuits, placed on contact surfaces of manipulators combine functions of transduction, computing and communicating. Beneath layer of pressure sensitive rubber, resistivity of which changes with pressure, electrodes furnish pressuredependent signal to computation elements. Electrodes and computation elements contained in silicon integrated-circuit wafer.

Raibert, M. H.↗
NASA NTRS1982

Large-area silicon sheet task

A set of computer models was used to define a growth system configuration that was then built and used to grow web with lower thermally generated stress. Aspects of research in the edge-defined film-fed growth (EFG) method of making Si ribbon are reported. A technique was developed to determine base resistivity and carrier lifetime in semicrystalline wafers. Automated growth of 150 kg of 15 cm-dia ingot material per crucible is reviewed. Scanning transmisson electron microscopy (STEM) and microprobe investigations of processed EFG ribbon are reported. The chemical composition of the large precipitates was studied. The structural arrangement and the electrical activity of distentions or close to the central twin plane in processed material were studied. The electrical and structural properties of grain boundaries in silicon are discussed. Temperature-dependence measurements of zero-bias conductance, a photoconductivity technique, and deep-level transient spectroscopy (DLTS) were developed. A grooving and staining technique, secondary ion mass spectroscopy, and EBIC measurements in scanning electron microscopy were used to study enhanced diffusion of phosphorus at grain boundaries in polycrystaline silicon. The fundamental mechanisms of abrasion and wear and the deformation of Si by a diamond in various fluid environments are described. The efficiency of solar cells made from EFG ribbon and Semix Inc. material is reported.

Morrison, A. D.↗
NASA NTRS1982

Microhardness studies on thin carbon films grown on P-type, (100) silicon

A program to grow thin carbon films and investigate their physical and electrical properties is described. Characteristics of films grown by rf sputtering and vacuum arc deposition on p type, (100) silicon wafers are presented. Microhardness data were obtained from both the films and the silicon via the Vickers diamond indentation technique. These data show that the films are always harder than the silicon, even when the films are thin (of the order of 1000 A). Vacuum arc films were found to contain black carbon inclusions of the order of a few microns in size, and clusters of inclusions of the order of tens of microns. Transmission electron diffraction showed that the films being studied were amorphous in structure.

Kolecki, J. C.↗