Engineering Papers⌕ Search

SEARCH · Engineering Papers

Results for “microelectronics”

Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

Quote a phrase for an exact phrase match. Source license links do not imply unrestricted reuse.

At least 1,171 records · Page 65
All sourcesNASA NTRSDOE OSTI
DOE OSTI2022

Performance of novel VUV-sensitive Silicon Photo-Multipliers for nEXO

Liquid xenon time projection chambers are promising detectors to search for neutrinoless double beta decay (0νββ), due to their response uniformity, monolithic sensitive volume, scalability to large target masses, and suitability for extremely low background operations. The nEXO collaboration has designed a tonne-scale time projection chamber that aims to search for 0νββ of 136 Xe with projected half-life sensitivity of 1.35 x 10 28 yr. To reach this sensitivity, the design goal for nEXO is ≤1% energy resolution at the decay Q-value (2458.07 ± 0.31 keV). Reaching this resolution requires the efficient collection of both the ionization and scintillation produced in the detector. The nEXO design employs Silicon Photo-Multipliers (SiPMs) to detect the vacuum ultra-violet, 175 nm scintillation light of liquid xenon. This paper reports on the characterization of the newest vacuum ultra-violet sensitive Fondazione Bruno Kessler VUVHD3 SiPMs specifically designed for nEXO, as well as new measurements on new test samples of previously characterised Hamamatsu VUV4 Multi Pixel Photon Counters (MPPCs). Various SiPM and MPPC parameters, such as dark noise, gain, direct crosstalk, correlated avalanches and photon detection efficiency were measured as a function of the applied over voltage and wavelength at liquid xenon temperature (163 K). The results from this study are used to provide updated estimates of the achievable energy resolution at the decay Q-value for the nEXO design.

72 PHYSICS OF ELEMENTARY PARTICLES AND FIELDS↗
DOE OSTI2018

Bottom-Up Copper Filling of Large Scale Through Silicon Vias for MEMS Technology

An electrodeposition process for void-free bottom-up filling of sub-millimeter scale through silicon vias (TSVs) with Cu is detailed. The 600 μm deep and nominally 125 μm diameter metallized vias were filled with Cu in less than 7 hours under potentiostatic control. The electrolyte is made up of 1.25 mol/L CuSO 4 – 0.25 mol/L CH 3 SO 3 H with polyether and halide additions that selectively suppress metal deposition on the free surface and side walls. A brief qualitative discussion of the procedures used to identify and optimize the bottom-up void-free feature filling is presented.

42 ENGINEERING↗
DOE OSTI2017

Planar Ohmic Contacts to Al 0.45 Ga 0.55 N/Al 0.3 Ga 0.7 N High Electron Mobility Transistors

Here, we present a low resistance, straightforward planar ohmic contact for Al 0.45 Ga 0.55 N/Al 0.3 Ga 0.7 N high electron mobility transistors. Five metal stacks (a/Al/b/Au; a = Ti, Zr, V, Nb/Ti; b = Ni, Mo, V) were evaluated at three individual annealing temperatures (850, 900, and 950°C). The Ti/Al/Ni/Au achieved the lowest specific contact resistance at a 900°C anneal temperature. Transmission electron microscopy analysis revealed a metal-semiconductor interface of Ti-Al-Au for an ohmic (900°C anneal) and a Schottky (850°C anneal) Ti/Al/Ni/Au stack. HEMTs were fabricated using the optimized recipe with resulting contacts that had room-temperature specific contact resistances of ρ c = 2.5 × 10 -5 Ω cm², sheet resistances of R SH = 3.9 kΩ/$\blacksquare$, and maximum current densities of 75 mA/mm (at VGATE of 2 V). Electrical measurements from -50 to 200°C had decreasing specific contact resistance and increasing sheet resistance, with increasing temperature. These contacts enabled state-of-the-art performance of Al 0.45 Ga 0.55 N/Al 0.3 Ga 0.7 N HEMTs.

36 MATERIALS SCIENCE↗
DOE OSTI2018

Galvanostatic Plating with a Single Additive Electrolyte for Bottom-Up Filling of Copper in Mesoscale TSVs

A methanesulfonic acid (MSA) electrolyte with a single suppressor additive was used for potentiostatic bottom-up filling of copper in mesoscale through silicon vias (TSVs). Conversly, galvanostatic deposition is desirable for production level full wafer plating tools as they are typically not equipped with reference electrodes which are required for potentiostatic plating. Potentiostatic deposition was used to determine the over-potential required for bottom-up TSV filling and the resultant current was measured to establish a range of current densities to investigate for galvanostatic deposition. Galvanostatic plating conditions were then optimized to achieve void-free bottom-up filling in mesoscale TSVs for a range of sample sizes.

37 INORGANIC, ORGANIC, PHYSICAL, AND ANALYTICAL CH↗
DOE OSTI2023

Abisko: Deep codesign of an architecture for spiking neural networks using novel neuromorphic materials

The Abisko project aims to develop an energy-efficient spiking neural network (SNN) computing architecture and software system capable of autonomous learning and operation. The SNN architecture explores novel neuromorphic devices that are based on resistive-switching materials, such as memristors and electrochemical RAM. Equally important, Abisko uses a deep codesign approach to pursue this goal by engaging experts from across the entire range of disciplines: materials, devices and circuits, architectures and integration, software, and algorithms. Here, the key objectives of our Abisko project are threefold. First, we are designing an energy-optimized high-performance neuromorphic accelerator based on SNNs. This architecture is being designed as a chiplet that can be deployed in contemporary computer architectures and we are investigating novel neuromorphic materials to improve its design. Second, we are concurrently developing a productive software stack for the neuromorphic accelerator that will also be portable to other architectures, such as field-programmable gate arrays and GPUs. Third, we are creating a new deep codesign methodology and framework for developing clear interfaces, requirements, and metrics between each level of abstraction to enable the system design to be explored and implemented interchangeably with execution, measurement, a model, or simulation. As a motivating application for this codesign effort, we target the use of SNNs for an analog event detector for a high-energy physics sensor.

97 MATHEMATICS AND COMPUTING↗
DOE OSTI2025

Amorphous boron nitride: synthesis, properties and device application

Amorphous boron nitride (a-BN) exhibits remarkable electrical, optical, and chemical properties, alongside robust mechanical stability, making it a compelling material for advanced applications in nanoelectronics and photonics. This review comprehensively examines the unique characteristics of a-BN, emphasizing its electrical and optical attributes, state-of-the-art synthesis techniques, and device applications. Key advancements in low-temperature growth methods for a-BN are highlighted, offering insights into their potential for integration into scalable, CMOS-compatible platforms. Additionally, the review discusses the emerging role of a-BN as a dielectric material in electronic and photonic devices, serving as substrates, encapsulation layers, and gate insulators. Finally, perspectives on future challenges, including defect control, interface engineering, and scalability, are presented, providing a roadmap for realizing the full potential of a-BN in next-generation device technologies.

36 MATERIALS SCIENCE↗
DOE OSTI2025

PETSc/TAO Users Manual Revision 3.24

This manual describes the use of the Portable, Extensible Toolkit for Scientific Computation (PETSc) and the Toolkit for Advanced Optimization (TAO) for the numerical solution of partial differential equations (PDEs) and related problems on high-performance computers. PETSc/TAO is a suite of data structures and routines that provide the building blocks for implementing large-scale application codes on parallel (and serial) computers. PETSc uses the MPI standard for all distributed memory communication.

97 MATHEMATICS AND COMPUTING↗
NASA NTRS1966

Symposium on Technology Status and Trends

The objective of the National Aeronautics and Space Administration's Technology Utilization Program is to identify, document, and transfer to the national economy the technical advances resulting from our space and research programs. These innovations, when properly applied in industry and business, hold great promise for improving our everyday life and contributing to the prosperity of the nation. We believe that the knowledge, progress, and advances associated with aerospace technology contain major potential for industrial applications. The content and method of presenting symposium papers by Marshall and selected contractor personnel have been designed to transfer an awareness of at least some new technology to attendees in nonaerospace fields.

Conference↗
NASA NTRS1967

Space navigation.

Deep space navigation and guidance technology, emphasizing simplification of onboard navigation procedures

NAVIGATION AND GUIDANCE↗
NASA NTRS2003

Rad hard technology tutorial

Explore the source record for details and available documents.

radiation-hard radiation-tolerant microelectronics↗