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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 1,171 records · Page 65

Reliability Issues of COTS MEMS Packaging

During the last decade, research and development of microelectromechanical systems (MEMS) has shown a significant promise for a variety of commercial applications including automobile and medical purposes.

Microelectromechanical systems MEMS reliability IC↗

Thermal Management and Power Packaging for Spacecraft of the Next Millennium

Power Distribution; Cabling, fault protection and switches to turn power on/off to spacecraft loads; Isolate loads from bus noise and regulate power to load against disturbances from the load and the bus; Protect the power distribution system from load failures.

X2000 Thermal management Power Packaging Next Mill↗

CBGA/PBGA Package Planarity and Assembly Reliability

Jet Propulsion Laboratory (JPL) is currently assessing the use of Ball Grid Arrays (BGAs) for National Aeronautics and Space Administration (NASA) spaceflight applications. This work is being funded through NASA Headquarters, Code Q. The objectives are to demonstrate the robustness, quality and reliability of BGAs technology, and to assist in the development of the repidly growing infastructure for this technology.

BGAs ball grid arrays test vehicles plastic and ce↗

Advanced Packaging

Explore the source record for details and available documents.

X2000 Europa Orbiter Project Avionics Advanced Pac↗

Electronics packaging considerations for space applications

The functionality of spacecraft electronics must be maintained in the harsh environments found in space. The radiation environments can consist of either low-energy x-rays at the surface of the spacecraft or high-energy electrons, high-energy protons and high-energy photons withn the spacecraft.

electronics packaging↗

NASA Electronic Parts and Packaging (NEPP) Program

Recent Findings from Audits, New Technology Data Reviews a) Disabled Chip Burn-ins A recent audit for a QML device discovered that the chip was disabled during the static burn-in, thus it was not drawing any current. Recommendation: For new SMDs add a statement within the burn-in paragraphs stating that the parts shall be kept in their enabled state during the burn-in. b) Class Q 160-hr/125oC Burn-in This is being interpreted as a static burn-in (even for CMOS technology). Recommendation: Provide clarification in MIL-STD-883, Test Method 5004. c) At Frequency (Dynamic) Burn-ins Test equipment limitation is being cited for not doing burn-ins at the application frequency. Recommendation: The burn-in task group to discuss and provide guidance. When the SMD says that the part can be used at 200 MHz, then doing burn-in at 6 MHz (cited as burn-in equipment limitation frequency) is not going to be meaningful! d) Two Static Burn-ins Some manufacturers are doing electrical testing between the two static burn-ins, whereas others do electricals after completing both static burn-ins. Recommendation: Provide clarification in MIL-STD-883, Test Method 5004. e) Thermal Imaging For a device with hot spots, the thermal resistance, junction-to-case, would be much higher than the guidelines given in MIL-STD-1835. One of the suppliers used thermal imaging to find hot spots on the die. Recommendation: Assign a task group to evaluate the effectiveness of thermal imaging at the product development stage.

Class Y↗