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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 1,135 records · Page 63
All sourcesNASA NTRSDOE OSTI
NASA NTRS1976

Dip coating process: Silicon sheet growth development for the large-area silicon sheet task of the low-cost silicon solar array project

To date, an experimental dip-coating facility was constructed. Using this facility, relatively thin (1 mm) mullite and alumina substrates were successfully dip-coated with 2.5 - 3.0 ohm-cm, p-type silicon with areas of approximately 20 sq cm. The thickness and grain size of these coatings are influenced by the temperature of the melt and the rate at which the substrate is pulled from the melt. One mullite substrate had dendrite-like crystallites of the order of 1 mm wide and 1 to 2 cm long. Their axes were aligned along the direction of pulling. A large variety of substrate materials were purchased or developed enabling the program to commence a substrate definition evaluation. Due to the insulating nature of the substrate, the bottom layer of the p-n junction may have to be made via the top surface. The feasibility of accomplishing this was demonstrated using single crystal wafers.

Heaps, J. D.↗
NASA NTRS1976

Development and fabrication of improved power transistor switches

A new class of high-voltage power transistors has been achieved by adapting present interdigitated thyristor processing techniques to the fabrication of NPN Si transistors. Present devices are 2.3 cm in diameter. The electrical performance obtained is consistent with the predictions of an optimum design theory specifically developed for power switching transistors. The forward safe operating area of the experimental transistors shows a significant improvement over commercially available devices. The report describes device design, wafer processing, and various measurements which include dc characteristics, forward and reverse second breakdown limits, and switching times.

Hower, P. L.↗
NASA NTRS1974

A measurement technique of time-dependent dielectric breakdown in MOS capacitors

The statistical nature of time-dependent dielectric breakdown characteristics in MOS capacitors was evidenced by testing large numbers of capacitors fabricated on single wafers. A multipoint probe and automatic electronic visual display technique are introduced that will yield statistical results which are necessary for the investigation of temperature, electric field, thermal annealing, and radiation effects in the breakdown characteristics, and an interpretation of the physical mechanisms involved. It is shown that capacitors of area greater than 0.002 sq cm may yield worst-case results, and that a multipoint probe of capacitors of smaller sizes can be used to obtain a profile of nonuniformities in the SiO2 films.

Li, S. P.↗
NASA NTRS1975

Hardening of MJS77 spacecraft against the Jupiter radiation belts

Results of the device characterization program to identify components of the Mariner Jupiter/Saturn spacecraft in need of radiation hardening to meet a total dose requirement of 5 trillion e/sq cm are presented. The parts to be tested, including bipolar transistors, JFETs, SCRs, CMOS devices, linear integrated circuits, Zener diodes and other radiation-sensitive parts, were identified by a worst case circuit analysis of the 20 major subsystems. The test samples were exposed to several levels of irradiation from a Dynamitron electron accelerator capable of producing a steady stream of electrons at energies up to 2.5 eV. The electrical parameters of the devices were measured immediately following irradiation to prevent annealing. CMOS devices and linear devices showed the most severe degradation in a moderate radiation environment, and significant degradation was produced at low current in bipolar transistors. Three methods used for screening a number of devices determined by circuit and shielding analyses to be unacceptable radiation-sensitive are described: diffusion and metallization lot screening; wafer lot screening; and irradiation-anneal screening.

W E Price↗
NASA NTRS1977

Low-cost solar-cell fabrication

Processing steps are reduced by using technique of electroless plating. Metalization and one doping steps are combined, and only one heat treatment is required. Concept is modification to method of fabricating solar cells by diffusing different dopants into opposite sides of a silicon wafer.

Amick, J. A.↗
NASA NTRS1977

Solar photovoltaics - An aerospace technology

Specific problems affecting the development of low-cost silicon solar array power sources are discussed, taking into account the potential of realizing less than $0.50/per peak watt of silicon solar array technology. A utilization of less expensive processes for the manufacture of pure silicon and more economical procedures of silicon crystal and wafer production appear desirable. Attention is given to a sheet growth process example and a concept of pulsed processing for automated cell production.

Goldsmith, J. V.↗
NASA NTRS1977

Binary phase digital reflection holograms - Fabrication and potential applications

A novel technique for the fabrication of binary-phase computer-generated reflection holograms is described. By use of integrated circuit technology, the holographic pattern is etched into a silicon wafer and then aluminum coated to make a reflection hologram. Because these holograms reflect virtually all the incident radiation, they may find application in machining with high-power lasers. A number of possible modifications of the hologram fabrication procedure are discussed.

Gallagher, N. C., Jr.↗
NASA NTRS1976

Development of low-cost silicon crystal growth techniques for terrestrial photovoltaic solar energy conversion

Because of the growing need for new sources of electrical energy, photovoltaic solar energy conversion is being developed. Photovoltaic devices are now being produced mainly from silicon wafers obtained from the slicing and polishing of cylindrically shaped single crystal ingots. Inherently high-cost processes now being used must either be eliminated or modified to provide low-cost crystalline silicon. Basic to this pursuit is the development of new or modified methods of crystal growth and, if necessary, crystal cutting. If silicon could be grown in a form requiring no cutting, a significant cost saving would potentially be realized. Therefore, several techniques for growth in the form of ribbons or sheets are being explored. In addition, novel techniques for low-cost ingot growth and cutting are under investigation.

Zoutendyk, J. A.↗
NASA NTRS1979

Modulation improves electro-optic object detector

Device as part of integrated circuit protection line is used to detect presence or absence of silicon wafer at point along air track. System is insensitive to ambient light and electrical noise, requires no special components or adjustments, operates from single supply source, and is relatively inexpensive to build.

Currie, J. R.↗
NASA NTRS1977

Cameras for semiconductor process control

The application of X-ray topography to semiconductor process control is described, considering the novel features of the high speed camera and the difficulties associated with this technique. The most significant results on the effects of material defects on device performance are presented, including results obtained using wafers processed entirely within this institute. Defects were identified using the X-ray camera and correlations made with probe data. Also included are temperature dependent effects of material defects. Recent applications and improvements of X-ray topographs of silicon-on-sapphire and gallium arsenide are presented with a description of a real time TV system prototype and of the most recent vacuum chuck design. Discussion is included of our promotion of the use of the camera by various semiconductor manufacturers.

Porter, W. A.↗
NASA NTRS1977

High efficiency thin-film GaAs solar cells

Several oxidation techniques are discussed which have been found to increase the open circuit (V sub oc) of metal-GaAs Schottky barrier solar cells, the oxide chemistry, attempts to measure surface state parameters, the evolving characteristics of the solar cell as background contamination (has been decreased, but not eliminated), results of focused Nd/YAG laser beam recrystallization of Ge films evaporated onto tungsten, and studies of AMOS solar cells fabricated on sliced polycrystalline GaAs wafers. Also discussed are projected materials availability and costs for GaAs thin-film solar cells.

Stirn, R. J.↗
NASA NTRS1977

Developments in vertical-junction silicon solar cells

Non-reflective vertical junction silicon cells provide high conversion efficiency radiation-resistant solar cells. New techniques of oxidation growth and the use of photolithography enable the use of an orientation dependent etch producing grooves 5 to 10 microns wide over 100 microns deep. These silicon wafers are then processed into solar cells with all of the processes performed at temperatures compatible with producing high efficiency solar cells. Most of the photogenerated carriers are created in the walls where they are within a few microns of the collecting junction. Consequently, degradation of carrier diffusion length due to radiation has a considerably reduced effect on collection efficiency. These 2 cm x 2 cm vertical junction silicon solar cells have exceeded 13% AMO efficiency and have shown superior radiation resistance.

Lindmayer, J.↗
NASA NTRS1977

Large area Czochralski silicon

The overall cost effectiveness of the Czochralski process for producing large-area silicon was determined. The feasibility of growing several 12 cm diameter crystals sequentially at 12 cm/h during a furnace run and the subsequent slicing of the ingot using a multiblade slurry saw were investigated. The goal of the wafering process was a slice thickness of 0.25 mm with minimal kerf. A slice + kerf of 0.56 mm was achieved on 12 cm crystal using both 400 grit B4C and SiC abrasive slurries. Crystal growth experiments were performed at 12 cm diameter in a commercially available puller with both 10 and 12 kg melts. Several modifications to the puller hoz zone were required to achieve stable crystal growth over the entire crystal length and to prevent crystallinity loss a few centimeters down the crystal. The maximum practical growth rate for 12 cm crystal in this puller design was 10 cm/h, with 12 to 14 cm/h being the absolute maximum range at which melt freeze occurred.

Rea, S. N.↗
NASA NTRS1977

Apollo-Soyuz pamphlet no. 6: Cosmic ray dosage

The radiation hazard inside spacecraft is discussed with emphasis on its effects on the crew, biological specimens, and spacecraft instruments. The problem of light flash sensations in the eyes of astronauts is addressed and experiment MA-106 is described. In this experiment, light flashes seen by blindfolded astronauts were counted and high energy cosmic ray intensity in the command module cabin were measured. The damage caused by cosmic ray hits on small living organisms was investigated in the Biostack 3 experiment (MA-107). Individual cosmic rays were tracked through layers of bacterial spores, small seeds, and eggs interleaved with layers of AgCl-crystal wafers, special plastic, and special photographic film that registered each cosmic ray particle passed.

Page, L. W.↗
NASA NTRS1978

Hexagon solar power panel

A solar energy panel support is described upon which silicon cells are arrayed. The cells are wafer thin and of two geometrical types, both of the same area and electrical rating, namely hexagon cells and hourglass cells. The hourglass cells are composites of half hexagons. A near perfect nesting relationship of the cells achieves a high density packing whereby optimum energy production per panel area is achieved.

Rubin, I.↗
NASA NTRS1976

Single crystal and polycrystalline GaAs solar cells using AMOS technology

A description is given of current technology for fabricating single AMOS (antireflection-coated metal oxide semiconductor) solar cells, with attention given to thermal, plasma, and anodic oxidation, native oxide stripping, and X-ray photoelectron spectroscopy results. Some preliminary results are presented on the chemistry and electrical characterization of such cells, and the characteristics of cells fabricated on sliced polycrystalline GaAs wafers are examined. Consideration is also given to the recrystallization of evaporated Ge films for use as low-cost substrates for polycrystalline GaAs solar cells.

Stirn, R. J.↗
NASA NTRS1977

Integrated circuit process and design rule evaluation techniques

A technique is described for determining the applicability of a particular process for the fabrication of large-scale integrated (LSI) circuits. Test arrays were developed to isolate various critical processing steps in a fabrication sequence and a statistical evaluation of these steps was carried out that related yield or success in achieving a desired result to the number of times the results were attempted. It was found that, in general, yield is a sensitive function of physical dimensions as is the packing density of a particular array. It is, therefore, possible to generate an optimum set of physical dimensions or design rules that maximize the expected number of working circuits on a wafer.

Ipri, A. C.↗
NASA NTRS1978

Theory and applications for optimization of every part of a photovoltaic system

A general method is presented for quantitatively optimizing the design of every part and fabrication step of an entire photovoltaic system, based on the criterion of minimum cost/Watt for the system output power. It is shown that no element or process step can be optimized properly by considering only its own cost and performance. Moreover, a fractional performance loss at any fabrication step within the cell or array produces the same fractional increase in the cost/Watt of the entire array, but not of the full system. One general equation is found to be capable of optimizing all parts of a system, although the cell and array steps are basically different from the power-handling elements. Applications of this analysis are given to show (1) when Si wafers should be cut to increase their packing fraction; and (2) what the optimum dimensions for solar cell metallizations are. The optimum shadow fraction of the fine grid is shown to be independent of metal cost and resistivity as well as cell size. The optimum thicknesses of both the fine grid and the bus bar are substantially greater than the values in general use, and the total array cost has a major effect on these values. By analogy, this analysis is adaptable to other solar energy systems.

Redfield, D.↗