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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 109 records · Page 6
All sourcesNASA NTRSDOE OSTI
NASA NTRS1999

Die Attachment for -120 C to +20 C Thermal Cycling of Microelectronics for Future Mars Rovers: An Overview

Active thermal control for electronics on Mars Rovers imposes a serious penalty in weight, volume, power consumption, and reliability. Thus, we propose that thermal control be eliminated for future Rovers. From a functional standpoint there is no reason that the electronics could not operate over the entire temperature range of the Martian environment, which can vary from a low of approximately equal -90 C to a high of approximately equal +20 C during the Martian night and day. The upper end of this range is well within that for conventional electronics. Although the lower end is considerably below that for which conventional--even high-reliability electronics is designed or tested, it is well established that electronic devices can operate to such low temperatures. The primary concern is reliability of the overall electronic system, especially in regard to the numerous daily temperature cycles that it would experience over the duration of a mission on Mars. Accordingly, key reliability issues have been identified for elimination of thermal control on future Mars Rovers. One of these is attachment of semiconductor die onto substrates and into packages. Die attachment is critical since it forms a mechanical, thermal and electrical interface between the electronic device and the substrate or package. This paper summarizes our initial investigation of existing information related to this issue, in order to form an opinion whether die attachment techniques exist, or could be developed with reasonable effort, to withstand the Mars thermal environment for a mission duration of approximately I year. Our conclusion, from a review of literature and personal contacts. is that die attachment can be made sufficiently reliable to satisfy the requirements of future Mars Rovers. Moreover, it appears that there are several possible techniques from which to choose and that the requirements could be met by judicious selection from existing methods using hard solders, soft solders, or organic adhesives. Thus from the standpoint of die attachment. it appears feasible to eliminate thermal control for Rover electronics. We recommend that this be further investigated and verified for the specific hardware and thermal conditions appropriate to Mars Rovers.

Kirschman, Randall K.↗
NASA NTRS1994

Fluorine Implantation and Residual Stresses in Polysilicon Films

As microelectronic device dimensions are reduced below one micron, the hot carrier effect is a major barrier to continued scaling and VLSI reliability. Several reports have shown that fluorine diffusion into the device gate greatly enhances the resistance to hot carriers. There has been some disagreement as to the mechanism of influence; however, several reports have suggested that the polysilicon is physically modified by the fluorine implant and that the beneficial effects are at least in part due to stress relaxation in the polysilicon.

polysilicon fluorine microelectronic devices hot c↗
DOE OSTI2015

Hardness Assurance for Low-Energy Proton-Induced Single-Event Effects: Final report for LDRD Project 173134

This report briefly summarizes three publications that resulted from a two-year LDRD. The three publications address a recently emerging reliability issue: namely, that low-energy protons (LEPs) can cause single-event effects (SEEs) in highly scaled microelectronics. These publications span from low to high technology readiness levels. In the first, novel experiments were used to prove that proton direct ionization is the dominant mechanism for LEP-induced SEEs. In the second, a simple method was developed to calculate expected on-orbit error rates for LEP effects. This simplification was enabled by creating (and characterizing) an accelerated space-like LEP environment in the laboratory. In the third publication, this new method was applied to many memory circuits from the 20-90 nm technology nodes to study the general importance of LEP effects, in terms of their contribution to the total on-orbit SEE rate.

73 NUCLEAR PHYSICS AND RADIATION PHYSICS↗
NASA NTRS1990

Reliability and quality EEE parts issues

NASA policy and procedures are established which govern the selection, testing, and application of electrical, electronic, and electromechanical (EEE) parts. Recent advances in the state-of-the-art of electronic parts and associated technologies can significantly impact the electronic designs and reliability of NASA space transportation avionics. Significant issues that result from these advances are examined, including: recent advances in microelectronics technology (as applied to or considered for use in NASA projects); electron packaging technology advances (concurrent with, and as a result of, the development of the advanced microelectronic devices); availability of parts used in space avionics; and standardization and integration of parts activities between projects, centers, and contractors.

Barney, Dan↗
NASA NTRS2014

Aeroflex Technology as Class-Y Demonstrator

Modern space field programmable gate array (FPGA) devices with increased functional density and operational frequency, such as Xilinx Virtex 4 (V4) and S (V5), are packaged in non-hermetic ceramic flip chip forms. These next generation space parts were not qualified to the MIL-PRF-38535 Qualified Manufacturer Listing (QML) class-V when they were released because class-V was only intended for hermetic parts. In order to bring Xilinx V5 type packages into the QML system, it was suggested that class-Y be set up as a new category. From 2010 through 2014, a JEDEC G12 task group developed screening and qualification requirements for Class-Y products. The Document Standardization Division of the Defense Logistics Agency (DLA) has completed an engineering practice study. In parallel with the class-Y efforts, the NASA Electronic Parts and Packaging (NEPP) program has funded JPL to study potential reliability issues of the class-Y products. The major hurdle of this task was the absence of adequate research samples. Figure 1-1 shows schematic diagrams of typical structures of class-Y type products. Typically, class-Y products are either in ceramic flip chip column grid array (CGA) or land grid array (LGA) form. In class-Y packages, underfill and heat spread adhesive materials are directly exposed to the spacecraft environment due to their non-hermeticity. One of the concerns originally raised was that the underfill material could degrade due to the spacecraft environment and negatively impact the reliability of the package. In order to study such issues, it was necessary to use ceramic daisy chain flip chip package samples so that continuity of flip chip solder bumps could be monitored during the reliability tests. However, none of the commercially available class-Y daisy chain parts had electrical connections through flip chip solder bumps; only solder columns were daisy chained, which made it impossible to test continuity of flip chip solder bumps without using extremely costly functional parts. Among space parts manufacturers who were interested in producing class-Y products, Aeroflex Microelectronic Solutions-HiRel had been developing assembly processes using their internal R&D classy type samples. In early 2012, JPL and Aeroflex initiated a collaboration to study reliability of the Aeroflex technology as a class-Y demonstrator.

Suh, Jong-ook↗
DOE OSTI2022

Thermoelectric coolers for high-power-density 3D electronics heat management

Future advancements in three-dimensional (3D) electronics require robust thermal management methodology. Thermoelectric coolers (TECs) are reliable and solid-state heat pumping devices with high cooling capacity that can meet the requirements of emerging 3D microelectronic devices. In this work, we first provide the design of TECs for electronics cooling using a computational model and then experimentally validate the main predictions. Key device parameters such as device thickness, leg density, and contact resistance were studied to understand their influence on the performance of TECs. Our results show that it is possible to achieve high cooling power density through optimization of TE leg height and packing density. Scaling of TECs is shown to provide ultra-high cooling power density.

32 ENERGY CONSERVATION, CONSUMPTION, AND UTILIZATI↗
DOE OSTI2017

Corrosion Monitors for Embedded Evaluation

We have developed and characterized novel in-situ corrosion sensors to monitor and quantify the corrosive potential and history of localized environments. Embedded corrosion sensors can provide information to aid health assessments of internal electrical components including connectors, microelectronics, wires, and other susceptible parts. When combined with other data (e.g. temperature and humidity), theory, and computational simulation, the reliability of monitored systems can be predicted with higher fidelity.

47 OTHER INSTRUMENTATION↗
NASA NTRS2000

Laser Welding in Electronic Packaging

The laser has proven its worth in numerous high reliability electronic packaging applications ranging from medical to missile electronics. In particular, the pulsed YAG laser is an extremely flexible and versatile too] capable of hermetically sealing microelectronics packages containing sensitive components without damaging them. This paper presents an overview of details that must be considered for successful use of laser welding when addressing electronic package sealing. These include; metallurgical considerations such as alloy and plating selection, weld joint configuration, design of optics, use of protective gases and control of thermal distortions. The primary limitations on use of laser welding electronic for packaging applications are economic ones. The laser itself is a relatively costly device when compared to competing welding equipment. Further, the cost of consumables and repairs can be significant. These facts have relegated laser welding to use only where it presents a distinct quality or reliability advantages over other techniques of electronic package sealing. Because of the unique noncontact and low heat inputs characteristics of laser welding, it is an ideal candidate for sealing electronic packages containing MEMS devices (microelectromechanical systems). This paper addresses how the unique advantages of the pulsed YAG laser can be used to simplify MEMS packaging and deliver a product of improved quality.

Source record↗
DOE OSTI2024

Assessment of wafer scale MoS 2 atomic layers grown by metal–organic chemical vapor deposition using organo-metal, organo-sulfide, and H 2 S precursors

Transition Metal Dichalcogenides (TMDs) are a unique class of materials that exhibit attractive electrical and optical properties which have generated significant interest for applications in microelectronics, optoelectronics, energy storage, and sensing. Considering the potential of these materials to impact such applications, it is crucial to develop a reliable and scalable synthesis process that is compatible with modern industrial manufacturing methods. Metal–organic chemical vapor deposition (MOCVD) offers an ideal solution to produce TMDs, due to its compatibility with large-scale production, precise layer control, and high material purity. Optimization of MOCVD protocols is necessary for effective TMD synthesis and integration into mainstream technologies. Additionally, improvements in metrology are necessary to measure the quality of the fabricated samples more accurately. In this work, we study MOCVD of wafer-scale molybdenum disulfide (MoS 2 ) utilizing two common chalcogen precursors, H 2 S and DTBS. We then develop a metrology platform for wafer scale samples quality assessment. For this, the coalesced films were characterized using Raman spectroscopy, atomic force microscopy, transmission electron microscopy, X-ray photoelectron spectroscopy, and Kelvin probe force microscopy. We then correlate the structural analysis of these grown films with electrical performance by using aerosol jet printing to fabricate van der Pauw test structures and assess sheet resistance.

37 INORGANIC, ORGANIC, PHYSICAL, AND ANALYTICAL CH↗
NASA NTRS2000

Research Activities at Plasma Research Laboratory at NASA Ames Research Center

In order to meet NASA's requirements for the rapid development and validation of future generation electronic devices as well as associated materials and processes, enabling technologies are being developed at NASA-Ames Research Center using a multi-discipline approach. The first step is to understand the basic physics of the chemical reactions in the area of plasma reactors and processes. Low pressure glow discharges are indispensable in the fabrication of microelectronic circuits. These plasmas are used to deposit materials and also etch fine features in device fabrication. However, many plasma-based processes suffer from stability and reliability problems leading to a compromise in performance and a potentially increased cost for the semiconductor manufacturing industry. Although a great deal of laboratory-scale research has been performed on many of these processing plasmas, little is known about the gas-phase and surface chemical reactions that are critical in many etch and deposition processes, and how these reactions are influenced by the variation in operating conditions. Such a lack of understanding has hindered the development of process models that can aid in the scaling and improvement of plasma etch and deposition systems. Our present research involves the study of such plasmas. An inductively-coupled plasma (ICP) source in place of the standard upper electrode assembly of the Gaseous Electronics Conference (GEC) radio-frequency (RF) Reference Cell is used to investigate the discharge characteristics. This ICP source generates plasmas with higher electron densities and lower operating pressures than obtainable with the original parallel-plate version of the GEC Cell. This expanded operating regime is more relevant to new generations of industrial plasma systems being used by the microelectronics industry. The research goal is to develop an understanding of the physical phenomena involved in plasma processing and to measure much needed fundamental parameters, such as gas phase and surface reaction rates, species concentration, temperature, ion energy distribution, and electron number density.

Sharma, S. P.↗
NASA NTRS1976

Device/packaging reliability problems of solid-state devices for space applications

This paper presents data that has been generated within NASA, especially the Marshall Space Flight Center, concerning several failure mechanisms that have occurred with microelectronic packages. The types of packages that will be discussed are primarily flat packs with 14-24 exit leads that are composed of Kovar electro-deposited nickel and finally gold plated.

Villella, F.↗
DOE OSTI2015

Effect of gamma radiation on micromechanical hardness of lead-free solder joint

Lead-free solders are important material in nano and microelectronic surface mounting technology for various applications in bio medicine, environmental monitoring, spacecraft and satellite instrumentation. Nevertheless solder joint in radiation environment needs higher reliability and resistance to any damage caused by ionizing radiations. In this study a lead-free 99.0Sn0.3Ag0.7Cu wt.% (SAC) solder joint was developed and subjected to various doses of gamma radiation to investigate the effects of the ionizing radiation to micromechanical hardness of the solder. Averaged hardness of the SAC joint was obtained from nanoindentation test. The results show a relationship between hardness values of indentations and the increment of radiation dose. Highest mean hardness, 0.2290 ± 0.0270 GPa was calculated on solder joint which was exposed to 5 Gray dose of gamma radiation. This value indicates possible radiation hardening effect on irradiated solder. The hardness gradually decreased to 0.1933 ± 0.0210 GPa and 0.1631 ± 0.0173 GPa when exposed to doses 50 and 500 gray respectively. These values are also lower than the hardness of non irradiated sample which was calculated as 0.2084 ± 0.0.3633 GPa indicating possible radiation damage and needs further related atomic dislocation study.

36 MATERIALS SCIENCE↗
NASA NTRS1976

Evaluation of advanced microelectronic fluxless solder-bump contacts for hybrid microcircuits

Technology for interconnecting monolithic integrated circuit chips with other components is investigated. The advantages and disadvantages of the current flip-chip approach as compared to other interconnection methods are outlined. A fluxless solder-bump contact technology is evaluated. Multiple solder-bump contacts were formed on silicon integrated circuit chips. The solder-bumps, comprised of a rigid nickel under layer and a compliant solder overlayer, were electroformed onto gold device pads with the aid of thick dry film photomasks. Different solder alloys and the use of conductive epoxy for bonding were explored. Fluxless solder-bump bond quality and reliability were evaluated by measuring the effects of centrifuge, thermal cycling, and high temperature storage on bond visual characteristics, bond electrical continuity, and bond shear tests. The applicability and suitability of this technology for hybrid microelectronic packaging is discussed.

Mandal, R. P.↗
NASA NTRS2004

Pb-free microelectronics assembly in aerospace applications

In this paper we provide a snapshot of the commericial industry trends and how they may impact electronics in the aerospace environment. Impacts will be felt in the areas of: reliability, assembly methods, cost drivers, supply chain selection and alternate materials selection.

Schoenung, Julie M.↗
DOE OSTI2023

Contact-Less Integrity Verification of Microelectronics Using Near-Field EM Analysis

Modern microelectronics life-cycle and supply chain ecosystem bring multiple untrusted entities, which can compromise their integrity. A major integrity issue of microelectronics stems from piracy of intellectual properties (IP) and counterfeiting, which causes significant revenue loss to the semiconductor manufacturers. Further, these components often lead to compromised functionality, reliability, security, and safety of an electronic system. This paper presents secure information transmission and probing methods for verifying the integrity of digital integrated circuit (ICs) based on their electromagnetic (EM) near-field emissions and thereby protecting systems against counterfeit components. The proposed method has been tested on both high-level instructions executed by microprocessors or Systems-on-Chip (serving as examples of software), and also logic circuits within FPGA fabrics and ASICs (serving as examples of hardware). The authentication information required by each digital system is generated using a pseudo-random number generator circuit and securely transmitted via near-field magnetic emissions. The authorized party can probe these emissions using a near-field probe, process the acquired signals to improve the signal-to-noise ratio (SNR), and then recover the secure information through matched filtering. Experimental results from commercial SoCs are used to demonstrate the proposed technique. Methods for reducing EM interference during integrity verification of both FPGAs and ASICs are also described.

47 OTHER INSTRUMENTATION↗
DOE OSTI2022

5G Enabled Transformative Co-design and Co-simulation Framework for Grid Decarbonization and Modernization

5G is a breakthrough technology to enable a fully mobile and connected society, and a 5G-enabled digital continuum will be one of the critical foundations for clean energy economy and grid modernization. The clean energy transformation not only requires innovative manufacturing, algorithm, application, and cross-domain co-simulation, but also a systematic evaluation and comprehensive support on the microelectronic and architectural computing customization to enable and maximize the high renewable penetration in the future power grid. The co-design of decarbonized grid, reliable yet efficient communication, and affordable yet ubiquitous computing will unlock the potential of almost any available tools for the undergoing clean energy transformation. 5G is also an opportunity to rethink the paradigm of infrastructure planning, as computing will be one of the core services for society alongside electricity and communication services.

5G↗