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Circuit card designed to act as interface between K-bus remote terminal. Enables digital communication between electronic instrumentation designed to communicate with other equipment via K-bus and control and telemetry-monitoring computer designed to communicate with other equipment via MIL-STD-1553B (or MIL-STD-1773) bus. Provides K-bus interface for as many as four instrumentation circuit cards.
Many operational and diagnostic features integrated into circuit chip. GaAs-based integrated circuit designed to serve as optoelectronic interface in phased-array antenna. Intended function to receive digital control signals transmitted on optical fiber and to convert signals to electronic control signals, which then applied to monolithic microwave integrated circuit (MMIC). Also used in reception of high-rate optical digital communications within computers, between computers, and in signal-distribution systems in aircraft, automobiles, and ships. Interface circuit represents significant improvement over preexisting interface circuits in that its clock-signal-recovery subcircuit requires little or no preamble for immediate synchronization.
The design concept and characteristics of a self-contained microprocessor-based Global Positioning System time transfer receiver is described. A prototype of this unit is currently in the test phase. It employs two-bit digital baseband correlation rather than analog IF correlation of the signals with the reference code. The correlator, numerically controlled oscillators and code generator are implemented in a special-purpose digital signal processor. The time is recovered in the digital code tracking loop, and final corrections are applied in the control processor. Other features of this design are: (1) drift-free digital mechanization; (2) high reliability of digital circuits; (3) flexible control capability of the microprocessor; and (4) potential for a high degree of digital VLSI chip development leading to compact, low-cost units.
Optical/electronic system senses rotation and emits pulses at angular increments. System provides linear scale factor across wide range of rotation rates with no lockup at null. Design needs analog-to-digital converters with elaborate signal-processing circuits. Light from laser diode split evenly into two beams propagating in opposite directions around rotation-sensing coil of optical-fiber waveguide. Beams acquire phase difference proportional to rotation rate as they pass through coil. After emerging from coil, beams recombine in beam splitter, and coherent sum led to photodiode.
Various papers on fiber optic and laser sensors are presented. Individual topics addressed include: fiber optic photoelastic pressure sensor for high-temperature gases, fiber optic gyroscope using an eight-component LiNbO3 integrated optic circuit, design and performance of a fiber optic gyroscope using integrated optics, digital angular position sensor using wavelength division multiplexing, simple repeatable fiber optic intensity sensor for temperature measurement, compensation for effects of ambient temperature on rare-earth-doped fiber optic thermometer.
Frequency dividers constitute essential elements in designing phase-locked loop circuits and microwave systems. In addition, they are used in providing required clocking signals to microprocessors and can be utilized as digital counters. In some applications, particularly space missions, electronics are often exposed to extreme temperature conditions. Therefore, it is required that circuits designed for such applications incorporate electronic parts and devices that can tolerate and operate efficiently in harsh temperature environments. While present electronic circuits employ COTS (commercial-off- the-shelf) parts that necessitate and are supported with some form of thermal control systems to maintain adequate temperature for proper operation, it is highly desirable and beneficial if the thermal conditioning elements are eliminated. Amongst these benefits are: simpler system design, reduced weight and size, improved reliability, simpler maintenance, and reduced cost. Devices based on silicon-on-insulator (SOI) technology, which utilizes the addition of an insulation layer in the device structure to reduce leakage currents and to minimize parasitic junctions, are well suited for high temperatures due to reduced internal heating as compared to the conventional silicon devices, and less power consumption. In addition, SOI electronic integrated circuits display good tolerance to radiation by virtue of introducing barriers or lengthening the path for penetrating particles and/or providing a region for trapping incident ionization. The benefits of these parts make them suitable for use in deep space and planetary exploration missions where extreme temperatures and radiation are encountered. Although designed for high temperatures, very little data exist on the operation of SOI devices and circuits at cryogenic temperatures. In this work, the performance of a divide-by-two frequency divider circuit built using COTS SOI logic gates was evaluated over a wide temperature range and thermal cycling to determine suitability for use in space exploration missions and terrestrial fields under extreme temperature conditions.
This work updates recent progress made by NASA Glenn Research Center on further advancement of its uniquely durable silicon carbide junction field effect transistor and resistor (SiC JFET-R) integrated circuit (IC) technology since HiTEC 2021. Key fabrication process improvements compared to earlier NASA Glenn IC prototype runs have been ascertained via extensive “back end of line” (BEOL) processing experiments conducted on practice wafers over the past two years. The resulting changes to the BEOL process flow employed in the fabrication of “Generation 12” SiC JFET-R wafers are described. The NASA Glenn SiC JFET-R IC prototype “Generation 12” chipset design realizes significantly higher complexity digital and analog integrated ICs aimed at flexibly implementing a broad variety of mission-enabling extreme-environment electronics demonstrations. SPICE simulations have verified circuit designs ranging from simple amplification of analog sensor signals up through long-duration Venus lander operations and microprocessor-based of electric motor drive.
This work updates recent progress made by NASA Glenn Research Center on further advancement of its uniquely durable silicon carbide junction field effect transistor and resistor (SiC JFET-R) integrated circuit (IC) technology since HiTEC 2021. Key fabrication process improvements compared to earlier NASA Glenn IC prototype runs have been ascertained via extensive “back end of line” (BEOL) processing experiments conducted on practice wafers over the past two years. The resulting changes to the BEOL process flow employed in the fabrication of “Generation 12” SiC JFET-R wafers are described. The NASA Glenn SiC JFET-R IC prototype “Generation 12” chipset design realizes significantly higher complexity digital and analog integrated ICs aimed at flexibly implementing a broad variety of mission-enabling extreme-environment electronics demonstrations. SPICE simulations have verified circuit designs ranging from simple amplification of analog sensor signals up through long-duration Venus lander operations and microprocessor-based of electric motor drive.
This work updates recent progress made by NASA Glenn Research Center on further advancement of its uniquely durable silicon carbide junction field effect transistor and resistor (SiC JFET-R) integrated circuit (IC) technology since HiTEC 2021. Key fabrication process improvements compared to earlier NASA Glenn IC prototype runs have been ascertained via extensive “back end of line” (BEOL) processing experiments conducted on practice wafers over the past two years. The resulting changes to the BEOL process flow employed in the fabrication of “Generation 12” SiC JFET-R wafers are described. The NASA Glenn SiC JFET-R IC prototype “Generation 12” chipset design realizes significantly higher complexity digital and analog integrated ICs aimed at flexibly implementing a broad variety of mission-enabling extreme-environment electronics demonstrations. SPICE simulations have verified circuit designs ranging from simple amplification of analog sensor signals up through long-duration Venus lander operations and microprocessor-based of electric motor drive.
The design, fabrication and performance of a TTL compatible 4-bit GaAs integrated digital-to-analog convertor with an output voltage between -2.8 V and +2.8 V are reported. This circuit has been especially designed to control the gain of power dual-gate FETs by applying a voltage on the capacitively terminated second gate.
Computer program analyzes the designs of critical systems that will either prove the design is free of single-point failures or detect each member of the population of single-point failures inherent in a system design. This program should find application in the checkout of redundant circuits and digital systems.
Standard Transistor Array (STAR) design system is semicustom approach to generating random-logic integrated MOS digital circuits. Primary program in STAR system is CAPSTAR, STAR Cell Arrangement Program. CAPSTAR is augmented by automatic routining program, Display program and library of logic cells.
A knowledge-based expert system is described that provides an approach to solve a problem requiring an expert with considerable domain expertise and facts about available digital hardware building blocks. To design digital hardware systems from their high level VHDL (Very High Speed Integrated Circuit Hardware Description Language) representation to their finished form, a special data representation is required. This data representation as well as the functioning of the overall system is described.
Lightweight, low-power circuit provides noncontact measurement of alternating or direct current of many ampheres in main conductor. Advantages of circuit over other nulling Hall-effect current-measuring circuits is stability and accuracy increased by putting both analog-to-digital and digital-to-analog converters in nulling feedback loop. Converters and rest of circuit designed for operation at sampling rate of 100 kHz, but rate changed to alter time or frequency response of circuit.
A digitally programmable current-mode analog fuzzy membership function circuit (MFC) has been designed, simulated and fabricated in a 0.5 micro-m CMOS technology.
In order to meet ever-increasing data return requirements, more satellites are using the near-Earth Ka-band (25.5 – 27.0 GHz) to achieve higher downlink rates. The paper discusses the Universal Space Transponder - Ka-band Modulator (UST-KaM) developed at the NASA Jet Propulsion Laboratory for the NASA-ISRO SAR (NISAR) mission, which is capable of transmitting up to 1.74 Gbps with 7/8 LDPC encoding. The UST-KaM utilizes OQPSK with both baseband and RF filtering to contain the 1 Gsps transmission spectrum within the 1.5 GHz Ka-band, even with the use of an external, saturated amplifier. Due to the high data rates involved, several technical hurdles were overcome in both the digital and RF designs. The UST-KaM is a software defined radio with two digital circuit board assemblies: a low speed housekeeper board for commanding and telemetry, and a high-rate signal processing board known as the Signal Processing Module (SPM). The SPM receives data from the spacecraft via a SERDES interface at up to 2 Gbps, processes and encodes the data using a Xilinx Virtex-5 FPGA, and produces 1 Gsps OQPSK I and Q waveforms via synchronized, multiplexed DACs. The RF Electronics in the UST-KaM employ a heterodyne architecture in which the I/Q digital waveforms are filtered and then up-converted using a sub-harmonic IQ mixer. The LO of the converter, which is included in the exciter assembly, is at 13.125GHz, and the RF output is a 26.25GHz carrier which is modulated with the OQPSK waveforms. The output of the mixer is then filtered using low loss quartz thinfilm edge coupled Chebyshev filters and amplified through a series of low gain Ka-Band amplifiers. The exciter assembly also has a 2GHz, low-phase-noise, PLL synthesizer to supply the clock to the DACs for the high rate digital waveforms.
The operation of electronic systems at cryogenic temperatures is anticipated for many NASA spacecraft, such as planetary explorers and deep space probes. For example, an unheated interplanetary probe launched to explore the rings of Saturn would experience an average temperature near Saturn of about 183 C. Electronics capable of low-temperature operation in the harsh deep space environment also would help improve circuit performance, increase system efficiency, and reduce payload development and launch costs. An ongoing research and development program on low-temperature electronics at the NASA Glenn Research Center at Lewis Field is focusing on the design of efficient power systems that can survive and exploit the advantages of low-temperature environments. The targeted systems, which are mission driven, include converters, inverters, controls, digital circuits, and special-purpose circuits. Initial development efforts successfully demonstrated the low-temperature operation and cold-restart of several direct-current/direct-current (dc/dc) converters based on different types of circuit design, some with superconducting inductors. The table lists some of these dc/dc converters with their properties, and the photograph shows a high-voltage, high-power dc/dc converter designed for an ion propulsion system for low-temperature operation. The development efforts of advanced electronic systems and the supporting technologies for low-temperature operation are being carried out in-house and through collaboration with other Government agencies, industry, and academia. The Low Temperature Electronics Program supports missions and development programs at NASA s Jet Propulsion Laboratory and Goddard Space Flight Center. The developed technologies will be transferred to commercial end users for applications such as satellite infrared sensors and medical diagnostic equipment.
Currently, there is a research effort in Evolvable Hardware being driven towards two purposes: the synthesis of circuits of medium to high complexity; and the design of reconfigurable architectures that facilitate the system evolvability and on-chip implementation of the evolved circuits. This work addresses these issues by describing the evolution of Digital to Analog Converters (DACs).