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NASA NTRS · 19820012638

Design approach for a microprocessor-based GPS time transfer receiver

Abstract

The design concept and characteristics of a self-contained microprocessor-based Global Positioning System time transfer receiver is described. A prototype of this unit is currently in the test phase. It employs two-bit digital baseband correlation rather than analog IF correlation of the signals with the reference code. The correlator, numerically controlled oscillators and code generator are implemented in a special-purpose digital signal processor. The time is recovered in the digital code tracking loop, and final corrections are applied in the control processor. Other features of this design are: (1) drift-free digital mechanization; (2) high reliability of digital circuits; (3) flexible control capability of the microprocessor; and (4) potential for a high degree of digital VLSI chip development leading to compact, low-cost units.

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BibTeXRIS

Ould, P. C., Vanwechel, R. J.. 1982-03-01. Design approach for a microprocessor-based GPS time transfer receiver. https://ntrs.nasa.gov/citations/19820012638

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