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At least 109 records · Page 6

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NASA NTRS1978

Adaptation of ion beam technology to microfabrication of solid state devices and transducers

A number of areas were investigated to determine the potential uses of ion beam techniques in the construction of solid state devices and transducers and the packaging of implantable electronics for biomedical applications. The five areas investigated during the past year were: (1) diode-like devices fabricated on textured silicon; (2) a photolithographic technique for patterning ion beam sputtered PVC (polyvinyl chloride); (3) use of sputtered Teflon as a protective coating for implantable pressure sensors; (4) the sputtering of Macor to seal implantable hybrid circuits; and (5) the use of sputtered Teflon to immobilize enzymes.

Topich, J. A.↗

NASA NTRS1969

Method for the preparation of inorganic single crystal and polycrystalline electronic materials

Large area, semiconductor crystals selected from group 3-5 compounds and alloys are provided for semiconductor device fabrication by the use of a selective etching operation which completely removes the substrate on which the desired crystal was deposited. The substrate, selected from the same group as the single crystal, has a higher solution rate than the epitaxial single crystal which is essentially unaffected by the etching solution. The preparation of gallium phosphide single crystals using a gallium arsenide substrate and a concentrated nitric acid etching solution is described.

Groves, W. O.↗

NASA NTRS1980

CCD data processor for maximum likelihood feature classification

The paper describes an advanced technology development which utilizes a high speed analog/binary CCD correlator to perform the matrix multiplications necessary to implement onboard feature classification. The matrix manipulation module uses the maximum likelihood classification algorithm assuming a Gaussian probability density function. The module will process 16 element multispectral vectors at rates in excess of 500 thousand multispectral vector elements per second. System design considerations for the optimum use of this module are discussed, test results from initial device fabrication runs are presented, and the performance in typical processing applications is described

Benz, H. F.↗

NASA NTRS1980

Development of processes for the production of low cost silicon dendritic web for solar cells

High area output rates and continuous, automated growth are two key technical requirements for the growth of low-cost silicon ribbons for solar cells. By means of computer-aided furnace design, silicon dendritic web output rates as high as 27 sq cm/min have been achieved, a value in excess of that projected to meet a $0.50 per peak watt solar array manufacturing cost. The feasibility of simultaneous web growth while the melt is replenished with pelletized silicon has also been demonstrated. This step is an important precursor to the development of an automated growth system. Solar cells made on the replenished material were just as efficient as devices fabricated on typical webs grown without replenishment. Moreover, web cells made on a less-refined, pelletized polycrystalline silicon synthesized by the Battelle process yielded efficiencies up to 13% (AM1).

Duncan, C. S.↗

NASA NTRS1981

Chemical composition of the SiO2/InSb interface as determined by X-ray photoelectron spectroscopy

In connection with the relatively poor insulating characteristics of the native oxides of most III-V compound semiconductors, there has been interest in the development of deposited dielectric layers for surface passivation and MOS device fabrication on III-V compound semiconductor substrates. The chemical system of SiO2 deposited on single-crystal InSb substrates has been proposed for the fabrication of IR CCD. The considered investigation is concerned with a detailed examination of the chemical nature of the interactions between deposited and native oxides using X-ray photoelectron spectroscopy (XPS) in conjunction with a chemical-etching technique for depth profiling. The compositional structure of the interfaces obtained in the SiO2/native oxide/InSb system is derived on the basis of an intensity analysis of XPS spectra. Thermal oxidation of the InSb substrate is found to result in an In-rich native oxide and excess elemental Sb at the native oxide/substrate interface.

Vasquez, R. P.↗

NASA NTRS1981

Industry needs for silicon crystals and standards

The trend of the device fabrication industry requirement for larger crystals is reviewed. The ranges of properties and uniformities measurement standards needed for resistivity (four-point probe and spreading resistance) and for the chemical composition of oxygen and carbon impurities are presented.

Benson, K. E.↗

NASA NTRS1982

Optimization of solar cells for air mass zero operation and a study of solar cells at high temperatures

The power to weight ratio of GaAs cells can be reduced by fabricating devices using thin GaAs films on low density substrate materials (silicon, glass, plastics). A graphoepitaxy technique was developed which uses fine geometric patterns in the substrate to affect growth. Initial substrates were processed by etching 25 microns deep grooves into 100 oriented wafers; fine-grained polycrystalline GaAs layers 25-50 microns thick were then deposited on these and recrystallization was performed, heating the substrates to above the GaAs melting point in ASH3 atmosphere, resulting in large grain regrowth oriented along the groove dimensions. Experiments with smaller groove depths and spacings were initially encouraging; single large GaAs grains would totally cover one and often two groove fields of 14 groove each spanning several hundred microns. Dielectric coatings on the grooved substrates were also used to modify the growth.

Hovel, H. J.↗

NASA NTRS1982

Computer-aided prediction of high-frequency performance limits in silicon bipolar integrated circuits

A circuit model for an existing silicon integrated bipolar junction transistor (IBJT) is used to evaluate presently achievable high frequency circuit performance. The relationship between circuit model and processing parameters are semi-quantitatively explored to make predictions on the frequency response, which can be achieved through realistic device fabrication modifications. A new figure of merit is introduced, which is defined as the signal frequency at which an integrated bipolar junction transistor can deliver a power gain of G. The most sensitive parameter influencing attainable high frequency IBJT performance is base resistance.

Burns, J. L.↗

NASA NTRS1981

Fabrication of multijunction high voltage concentrator solar cells by integrated circuit technology

Standard integrated circuit technology has been developed for the design and fabrication of planar multijunction (PMJ) solar cell chips. Each 1 cm x 1 cm solar chip consisted of six n(+)/p, back contacted, internally series interconnected unit cells. These high open circuit voltage solar cells were fabricated on 2 ohm-cm, p-type 75 microns thick, silicon substrates. A five photomask level process employing contact photolithography was used to pattern for boron diffusions, phorphorus diffusions, and contact metallization. Fabricated devices demonstrated an open circuit voltage of 3.6 volts and a short circuit current of 90 mA at 80 AMl suns. An equivalent circuit model of the planar multi-junction solar cell was developed.

Valco, G. J.↗

NASA NTRS1982

Microdistribution of oxygen in silicon and its effects on electronic properties

The effects of interstitial oxygen on the electrical characteristics of Czochralski-grown silicon crystals were investigated for the first time on a microscale. It was found that the generation of thermal donors is not a direct function of the oxygen concentration. It was further found that the minority carrier life-time decreases with increasing oxygen concentration, on a microscale in as-grown crystals. It was thus shown, again for the first time, that oxygen in as grown crystals is not electronically inert as generally believed. Preannealing at 1200 C commonly employed in device fabrication, was found to suppress the donor generation at 450 C and to decrease the deep level concentrations.

Gatos, H. C.↗

NASA NTRS1982

Investigation of semiconductor clad optical waveguides

Glass waveguides are studied because of the ease and economy of fabricating devices in glass. All calculations are based on the assumption of a glass guide and substrate, but the effects being studied will occur on other materials if the proper refractive indices are used in the calculations.

Batchman, T. E.↗

NASA NTRS1986

Single-Event-Upset Studies: A Compilation

Document summarizes 15 studies of single-event upsets covering 60 different types of semiconductor devices. Studies discussed in document include verification of basic reactions induced by heavy ions and protons and surveys of latchup and bit-flip susceptibility of several types of devices and device-fabrication technologies.

Nichols, D. K.↗

NASA NTRS1984

Lifetimes in Si CVD-epitaxial and other layers determined by spectral LBIC

In an effort to evaluate the minority carrier lifetimes in CVD-epitaxially grown layers in their dependence on the CVD process variables, the absolute spectral LBIC method was found to be the only available method capable of yielding both lifetime and surface recombination velocity in layers, independent of the resistivity of this layer or that of the substrate, as long as they are separated by a pn-junction. With this method, it was not only possible to determine the minority carrier lifetimes in as-grown epi-layers, but to observe their changes through the device fabrication processes. In addition, it was possible for the first time to determine the lifetimes in the alloy-regrowth p(+) layers of base high/low junction structures.

Wolf, M.↗

NASA NTRS1985

Waveguide PIN junction electrooptic phase modulators Theoretical analysis and design criteria

Basic design equations for waveguide PIN heterojunction electrooptic phase modulators utilizing the linear electrooptic effect are derived, and criteria for optimum operation (in terms of obtainable phase shifts) are discussed. Although the numerical examples pertain to devices fabricated of the AlGaAs system on (100) substrates, the same method can be directly applied to modulators fabricated of other materials.

Marshall, W. K.↗

NASA NTRS1986

Tailorable Infrared Sensing Devices

Alternating layers of GexSi1.x and Si deposited by molecular beam epitaxy. When electric field applied across stack, acts as detector for infrared photons. Device fabricated on silicon substrate together with sophisticated very-large-scale integrated circuitry. Useful for wide range of applications related to robotics, space exploration, and terrestrial surveillance.

Cheng, L. J.↗

NASA NTRS1985

Oxygen and carbon in silicon

The properties of the early transistors were determined by the minority-carrier lifetime, as is the silicon photovoltaic solar cell. Most of the devices on the modern integrated circuits are majority carrier devices, in part to avoid this lifetime dependence. The micro-electronics industry typically starts with wafers with a minority-carrier lifetime of 1000 micro-seconds, but during device fabrication this lifetime is reduced to beflow 1 micro-second, in spite of extraordinary cleanliness and precautions. Process-induced defects (PID) include point defects, defect complexes, line defects, and bulk precipitates. One of the aspects that needs to be better understood is the nature of minority carrier recombination at line defects and at precipitates. Some of the PIDs are known to be related to the fast-diffusers of the iron-series transition elements. One of the common techniques of dealing with these elements is intrinsic gettering by the oxygen precipitates. But even in the gettered state, there may be a residual effect on the lifetime. Oxygen is an almost ubiquitous impurity in silicon and plays an important role in both integrated circuits and solar cells. The isolated oxygen interstitial is electrically inactive, but in its various aggregated forms it has a variety of electrical activities. The agglomeration and precipitation of oxygen, including impurity gettering and the complicating role of carbon, is discussed.

Corbett, J. W.↗

NASA NTRS1985

Defects and device performance

The necessity for a low-cost crystalline silicon sheet material for photovoltaics has generated a number of alternative crystal growth techniques that would replace Czochralski (Cz) and float-zone (FZ) technologies. Efficiencies of devices fabricated from low resistivity FZ silicon are approaching 20%, and it is highly likely that this value will be superseded in the near future. However, FZ silicon is expensive, and is unlikely ever to be used for photovoltaics. Cz silicon has many of the desirable qualities of FZ except that minority-carrier lifetimes at lower resistivities are significantly less than those of FZ silicon. Even with Cz silicon, it is unlikely that cost goals can be met because of the poor-material yield that results from sawing and other aspects of the crystal rowth. Although other silicon sheet technologies have been investigated, almost all have characteristics that limit efficiency to approx. 16%. In summary, 20% efficient solar cells can likely be fabricated from both FZ and Cz silicon, but costs are likely to be ultimately unacceptable. Alternate silicon technologies are not likely to achieve this goal, but cost per watt figures may be eventually better than either of the single crystal technologies and may rival any thin-film technology.

Storti, G.↗

NASA NTRS1985

JMOSFET: A MOSFET parameter extractor with geometry-dependent terms

The parameters from metal-oxide-silicon field-effect transistors (MOSFETs) that are included on the Combined Release and Radiation Effects Satellite (CRRES) test chips need to be extracted to have a simple but comprehensive method that can be used in wafer acceptance, and to have a method that is sufficiently accurate that it can be used in integrated circuits. A set of MOSFET parameter extraction procedures that are directly linked to the MOSFET model equations and that facilitate the use of simple, direct curve-fitting techniques are developed. In addition, the major physical effects that affect MOSFET operation in the linear and saturation regions of operation for devices fabricated in 1.2 to 3.0 mm CMOS technology are included. The fitting procedures were designed to establish single values for such parameters as threshold voltage and transconductance and to provide for slope matching between the linear and saturation regions of the MOSFET output current-voltage curves. Four different sizes of transistors that cover a rectangular-shaped region of the channel length-width plane are analyzed.

Buehler, M. G.↗