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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 955 records · Page 53
All sourcesNASA NTRSDOE OSTI
NASA NTRS1977

Binary phase digital reflection holograms - Fabrication and potential applications

A novel technique for the fabrication of binary-phase computer-generated reflection holograms is described. By use of integrated circuit technology, the holographic pattern is etched into a silicon wafer and then aluminum coated to make a reflection hologram. Because these holograms reflect virtually all the incident radiation, they may find application in machining with high-power lasers. A number of possible modifications of the hologram fabrication procedure are discussed.

Gallagher, N. C., Jr.↗
NASA NTRS1977

Magnetic bearing momentum wheels with magnetic gimballing capability for 3-axis active attitude control and energy storage

A 3-axis active attitude control system with only one rotating part was developed using a momentum wheel with magnetic gimballing capability as a torque actuator for all three body axes. A brief description of magnetic bearing technology is given. It is concluded that based on this technology an integrated energy storage/attitude control system with one air of counterrotating rings could reduce the complexity and weight of conventional systems.

Sindlinger, R. S.↗
NASA NTRS1978

Aircraft developments that hold promise for increased compatability with an advanced ATC system

In terms of an advanced air traffic control environment, consideration is given to a wake vortex advisory system and V/STOL aircraft. The terminal configured vehicle program is described. Procedures for all-weather operations are reviewed and the search and rescue satellite system is described. Predictions are made concerning an advanced national aviation system, digital communications, integrated control technology, and cockpit avionics. Human factors in both general and civil aviation are discussed.

Hodge, K. E.↗
NASA NTRS1980

Technique for mounting pyroelectric detector arrays

Technique is developed at Langley Research Center for mounting pyroelectric detector arrays on silicon integrated circuits. Procedure incorporates normal silicon integrated-circuit technology to form quasi-free mounts for detector arrays. Advantages of technique include lower cost, better image registration, and improved reliability.

Breckenridge, R. A.↗
NASA NTRS1979

Standard Transistor Array (STAR). Volume 1: Placement technique

A large scale integration (LSI) technology, the standard transistor array uses a prefabricated understructure of transistors and a comprehensive library of digital logic cells to allow efficient fabrication of semicustom digital LSI circuits. The cell placement technique for this technology involves formation of a one dimensional cell layout and "folding" of the one dimensional placement onto the chip. It was found that, by use of various folding methods, high quality chip layouts can be achieved. Methods developed to measure of the "goodness" of the generated placements include efficient means for estimating channel usage requirements and for via counting. The placement and rating techniques were incorporated into a placement program (CAPSTAR). By means of repetitive use of the folding methods and simple placement improvement strategies, this program provides near optimum placements in a reasonable amount of time. The program was tested on several typical LSI circuits to provide performance comparisons both with respect to input parameters and with respect to the performance of other placement techniques. The results of this testing indicate that near optimum placements can be achieved by use of the procedures incurring severe time penalties.

Cox, G. W.↗
NASA NTRS1981

Multijunction high voltage concentrator solar cells

The standard integrated circuit technology has been developed to design and fabricate new innovative planar multi-junction solar cell chips for concentrated sunlight applications. This 1 cm x 1 cm cell consisted of several voltage generating regions called unit cells which were internally connected in series within a single chip resulting in high open circuit voltages. Typical open-circuit voltages of 3.6 V and short-circuit currents of 90 ma were obtained at 80 AM1 suns. A dramatic increase in both short circuit current and open circuit voltage with increased light levels was observed.

Valco, G. J.↗
NASA NTRS1982

Interim review of the Energy Efficient Engine /E3/ Program

The NASA-sponsored Energy Efficient Engine (E3) Program, which is now in its fourth year, is assessed from the viewpoint of one of its research contractors. Attention is given to the development status of the shroudless fan, segmented combustor and exhaust mixer components which are encompassed by the program. The shroudless fan blades are two-thirds hollow for lightness, and are fabricated by means of plies and cores subjected to hot isostatic pressing diffusion bonding. The combustor's segmented liner is cast from turbine blade materials. Exhaust mixer flow visualization tests are described. Consideration is given to the effects of integrating the technology described with the low and high pressure advanced turbines whose development is also part of the E3 program.

Gardner, W. B.↗
NASA NTRS1984

Chip level modeling of LSI devices

The advent of Very Large Scale Integration (VLSI) technology has rendered the gate level model impractical for many simulation activities critical to the design automation process. As an alternative, an approach to the modeling of VLSI devices at the chip level is described, including the specification of modeling language constructs important to the modeling process. A model structure is presented in which models of the LSI devices are constructed as single entities. The modeling structure is two layered. The functional layer in this structure is used to model the input/output response of the LSI chip. A second layer, the fault mapping layer, is added, if fault simulations are required, in order to map the effects of hardware faults onto the functional layer. Modeling examples for each layer are presented. Fault modeling at the chip level is described. Approaches to realistic functional fault selection and defining fault coverage for functional faults are given. Application of the modeling techniques to single chip and bit slice microprocessors is discussed.

Armstrong, J. R.↗
NASA NTRS1984

Operational requirements - system concepts

Nine research areas that are most critical to the issue of cockpits for the single pilot are discussed. Helicopter are addressed in this report. They are as follows: (1) automation priority issues; (2) increased complexity of systems; (3) cockpit workload highest in navigation; (4) auto hover and flight trim controls; (5) voice technology in integrated form; (6) systems must have visual and auditory declutter modes; (7) cockpit should be designed to be NBC resistant; and (8) considerations for spillover to civilian public service.

Voorhees, J. W.↗
NASA NTRS1985

Passive and Active Control of Space Structures (PACOSS)

Passive and Active Control of Space Structures (PACOSS) is a five-year program designed to investigate highly damped structures in conjunction with active control systems, and in particular to develop technology that integrates passive damping and active control to achieve precise pointing control. Major areas of research include metal matrix composites; viscoelastic materials; damping devices; dynamic test article design, fabrication and testing; and active damping.

Morosow, G.↗
NASA NTRS1985

High-voltage solar-cell chip

Integrated circuit technology has been successfully applied to the design and fabrication of 0.5 x 0.5-cm planar multijunction solar-cell chips. Each of these solar cells consisted of six voltage-generating unit cells monolithically connected in series and fabricated on a 75-micron-thick, p-type, single crystal, silicon substrate. A contact photolithic process employing five photomask levels together with a standard microelectronics batch-processing technique were used to construct the solar-cell chip. The open-circuit voltage increased rapidly with increasing illumination up to 5 AM1 suns where it began to saturate at the sum of the individual unit-cell voltages at a maximum of 3.0 V. A short-circuit current density per unit cell of 240 mA/sq cm was observed at 10 AM1 suns.

Kapoor, V. J.↗
NASA NTRS1986

Liquid-Hydrogen Polygeneration System

Polygeneration system uses existing technology in integrated process to produce liquid hydrogen space-vehicle propellant and secondary products as gaseous nitrogen, electrical energy, and thermal energy. Makes commercial launch services economical. Lowers expected cost of liquid hydrogen by utilizing relatively cheap coal feedstocks and by reducing electrical costs associated with producing liquid hydrogen.

Minderman, P.↗
NASA NTRS1985

Summary of process research analysis efforts

A summary of solar-cell process research analysis efforts was presented. Process design and cell design are interactive efforts where technology from integrated circuit processes and other processes are blended. The primary factors that control cell efficiency are: (1) the bulk parameters of the available sheet material, (2) the retention and enhancement of these bulk parameters, and (3) the cell design and the cost to produce versus the finished cells performance. The process sequences need to be tailored to be compatible with the sheet form, the cell shape form, and the processing equipment. New process options that require further evaluation and utilization are lasers, robotics, thermal pulse techniques, and new materials. There are numerous process control techniques that can be adapted and used that will improve product uniformity and reduced costs. Two factors that can lead to longer life modules are the use of solar cell diffusion barriers and improved encapsulation.

Burger, D. R.↗
NASA NTRS1989

Integrated-Circuit Broadband Infrared Sources

Microscopic devices consume less power, run hotter, and are more reliable. Simple, compact, lightweight, rapidly-responding reference sources of broadband infrared radiation made available by integrated-circuit technology. Intended primarily for use in calibration of remote-sensing infrared instruments, devices eventually replace conventional infrared sources. New devices also replace present generation of miniature infrared sources. Self-passivating nature of poly-crystalline silicon adds to reliability of devices. Maximum operating temperature is 1,000 K, and power dissipation is only one-fourth that of prior devices.

Lamb, G.↗
NASA NTRS1989

Submicron nickel-oxide-gold tunnel diode detectors for rectennas

The characteristics of a metal-oxide-metal (MOM) tunnel diode made of nickel, nickel-oxide, and gold, designed and fabricated by standard integrated circuit technology for use in FIR rectennas, are presented. The MOM tunnel diode was formed by overlapping a 0.8-micron-wide layer of 1000-A of nickel, which was oxidized to form a thin layer of nickel oxide, with a 1500 A-thick layer of gold. The dc current-voltage characteristics of the MOM diode showed that the current dependence on voltage was linear about zero bias up to a bias of about 70 mV. The maximum detection of a low-level signal (10-mV ac) was determined to be at a dc voltage of 70 mV across the MOM diode. The rectified output signal due to a chopped 10.6-micron CO2 laser incident upon the rectenna device was found to increase with dc bias, with a maximum value of 1000 nV for a junction bias of 100 mV at room temperature.

Hoofring, A. B.↗
NASA NTRS1990

Satellite image analysis using neural networks

The tremendous backlog of unanalyzed satellite data necessitates the development of improved methods for data cataloging and analysis. Ford Aerospace has developed an image analysis system, SIANN (Satellite Image Analysis using Neural Networks) that integrates the technologies necessary to satisfy NASA's science data analysis requirements for the next generation of satellites. SIANN will enable scientists to train a neural network to recognize image data containing scenes of interest and then rapidly search data archives for all such images. The approach combines conventional image processing technology with recent advances in neural networks to provide improved classification capabilities. SIANN allows users to proceed through a four step process of image classification: filtering and enhancement, creation of neural network training data via application of feature extraction algorithms, configuring and training a neural network model, and classification of images by application of the trained neural network. A prototype experimentation testbed was completed and applied to climatological data.

Sheldon, Roger A.↗