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At least 91 records · Page 5

Effects of space radiation on electronic microcircuits

The single event effects or phenomena (SEP), which so far have been observed as events falling on one or another of the SE classes: Single Event Upset (SEU), Single Event Latchup (SEL) and Single Event Burnout (SEB), are examined. Single event upset is defined as a lasting, reversible change in the state of a multistable (usually bistable) electronic circuit such as a flip-flop or latch. In a computer memory, SEUs manifest themselves as unexplained bit flips. Since latchup is in general caused by a single event of short duration, the single event part of the SEL term is superfluous. Nevertheless, it is used customarily to differentiate latchup due to a single heavy charged particle striking a sensitive cell from more ordinary kinds of latchup. Single event burnout (SEB) refers usually to total instantaneous failure of a power FET when struck by a single particle, with the device shorting out the power supply. An unforeseen failure of these kinds can be catastrophic to a space mission, and the possibilities are discussed.

Kolasinski, W. A.↗

Intrinsic (Trap‐Free) Transistors Based on Epitaxial Single‐Crystal Perovskites

Abstract The first experimental realization of the intrinsic (not dominated by defects) charge conduction regime in lead‐halide perovskite field‐effect transistors (FETs) is reported. The advance is enabled by: i) a new vapor‐phase epitaxy technique that results in large‐area single‐crystalline cesium lead bromide (CsPbBr 3 ) films with excellent structural and surface properties, including atomically flat surface morphology, essentially free from defects and traps at the level relevant to device operation; ii) an extensive materials analysis of these films using a variety of thin‐film and surface probes certifying the chemical and structural quality of the material; and iii) the fabrication of nearly ideal (trap‐free) FETs with characteristics superior to any reported to date. These devices allow the investigation of the intrinsic FET and (gated) Hall‐effect carrier mobilities as functions of temperature. The intrinsic mobility is found to increase on cooling from ≈30 cm 2 V −1 s −1 at room temperature to ≈250 cm 2 V −1 s −1 at 50 K, revealing a band transport limited by phonon scattering. Establishing the intrinsic (phonon‐limited) mobility provides a solid test for theoretical descriptions of carrier transport in perovskites, reveals basic limits to the technology, and points to a path for future high‐performance perovskite electronic devices.

36 MATERIALS SCIENCE↗

Gate control of electron correlations towards Mott field effect transistors (MottFET)

The modulation of channel conductance in field-effect transistors (FETs) via metal-insulator-semiconductor structures has revolutionized information processing and storage. However, the limitations of silicon-based FETs in electrical switching have driven the search for new materials capable of overcoming these constraints. Electrostatic gating of competing electronic phases in a Mott material near its metal-to-insulator transition (MIT) offers the prospects of substantial modulation of the conducting electrons and electrical resistivity through small changes in band filling. While electrostatic control of the MIT has been previously reported, the advancement of Mott materials toward novel Mott-based transistors, MottFETs requires the realization of their unique physical properties in a solid-state device. In this study, we present gate control of electron correlation using a solid-state device utilizing the oxide Mott system La 1-x Sr x VO 3 as a correlated FET channel. We report on a gate resistance response that cannot be explained in a purely electrostatic framework. This behavior suggests an enhancement in effective mass and a reduction in effective carrier density as the system approaches its insulating state, consistent with theoretical predictions for Mott systems, suggesting at least 100× charge gain originating from the correlated behavior. These preliminary results pave the way toward the development of highly efficient, low-power electronic devices that could surpass the performance bottlenecks of conventional FETs by leveraging the electronic phase transitions of correlated electron systems.

75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND↗

Prediction of Alpha-Particle-Immune Gate-All-Around Field-Effect Transistors (GAA-FET) Based SRAM Design

Alpha particles are known to be a major source of particles creating soft errors in semiconductor devices, such as content flipping in Static Random-Access Memory (SRAM). Recent advancements in transistor nodes have led to the introduction of Gate-All-Around Field Effect Transistors (GAA-FETs), which have better gate control, thus better electrostatics. Moreover, the introduction of bottom dielectric isolation (BDI) eliminates substrate leakage and thus is expected to enhance its radiation hardness. It is thus important to explore if one can design an SRAM that is completely radiation-hard to alpha particles. In this paper, using 3D Technology Computer-Aided-Design (TCAD) simulations, we show that it is possible to design an SRAM using GAA-FET technology so that it is immune to single alpha particle radiation error. In other words, with the design, there will be no single-event upset (SEU) due to alpha particles. We first use ab initio calculations in PHITS to show that there is a maximum linear energy transfer (LET), LET max , for the alpha particle in Si and Si x Ge 1-x . Based on that, by de signing a sub-7nm GAA-FET-based SRAM with BDI, we show that the SRAM does not flip even if the particle strike is in the worst-case scenario for LET > LET max .

42 ENGINEERING↗

FET Junction Temperature Monitoring Using Novel On-Chip Solution

A novel junction temperature monitoring sensor is proposed and experimentally demonstrated for application in MOS-gate power devices. The sensor is created using the polycide gate electrode layer of the devices to create a temperature-sensitive resistor without any additional fabrication steps. The resistor is located on the field oxide with one end grounded at the device reference terminal to isolate it from the device current and voltage transients. It allows in-situ monitoring of the device junction temperature during active circuit operation. The technology has been implemented to monitor the junction temperature of Silicon Carbide Junction Barrier Schottky Field Effect Transistors (SiC JBSFETs) with the bi-directional FET (BiDFET).

Bidirectional switches, SiC bidirectional FET, BiD↗

K-band FET amplifier for satellite downlink

State-of-the-art performance is demonstrated with solid-state amplifiers in K-band. The amplifier provides 8.2 watts of power with 39 dB gain over a frequency band of 1.4 GHz. Nonlinearity analyses of solid-state amplifiers suggest that system performance can be improved significantly by using an FET amplifier. Preliminary investigations reveal that the solid-state amplifiers can be space-qualified and can be expected to replace the TWTA in many communication links in the near future. It is pointed out that with improvements in device technology, the power, bandwidth and efficiency of solid-state amplifiers using FETs can be further improved. With FETs operating at a junction temperature of less than 125 C, solid-state amplifiers are inherently reliable, indicating a ten-year mean time to failure.

Goel, J.↗

Tunnel-FET Switching Is Governed by Non-Lorentzian Spectral Line Shape

In tunnel field-effect transistors (tFETs), the preferred mechanism for switching occurs by alignment (on) or misalignment (off) of two energy levels or band edges. Unfortunately, energy levels are never perfectly sharp. When a quantum dot interacts with a wire, its energy is broadened. Its actual spectral shape controls the current/voltage response of such transistor switches, from on (aligned) to off (misaligned). The most common model of spectral line shape is the Lorentzian, which falls off as reciprocal energy offset squared. Unfortunately, this is too slow a turnoff, algebraically, to be useful as a transistor switch. Electronic switches generally demand an on/off ratio of at least a million. Steep exponentially falling spectral tails would be needed for rapid off-state switching. This requires a new electronic feature, not previously recognized: narrowband, heavy-effective mass, quantum wire electrical contacts, to the tunneling quantum states. These are a necessity for spectrally sharp switching.

42 ENGINEERING↗

Electrostatically suspended and sensed micro-mechanical rate gyroscope

The goal of this work is development of fully electrostatically suspended and rebalancing angular rate sensing micro-gyroscope fabricated according to standard VLSI techniques. Fabrication of test structures is proceeding. Off chip electronics for the electrostatic sensing and driving circuits has been tested. The prototype device will be assembled in a hybrid construction including the FET input stages of the sensors.

Torti, R.↗

The four-gate transistor

The four-gate transistor or G4-FET combines MOSFET and JFET principles in a single SOI device. Experimental results reveal that each gate can modulate the drain current. Numerical simulations are presented to clarify the mechanisms of operation. The new device shows enhanced functionality, due to the combinatorial action of the four gates, and opens rather revolutionary applications.

neuro-prosthetic devices cortical signals↗

Solid State Ephemeral Electric Potential and Electric Field Sensor

Systems, methods, and devices of the various embodiments provide a field effect transistor (FET) that controls equilibrium by reversing the effects of leakage currents affecting the gate response of the FET by using an equilibrium pump electrode. The equilibrium reversing gate FETs (ergFETs) of the various embodiments, may include an equilibrium pump electrode located within a non-conducting gap. The ergFETs of the various embodiments may provide solid state ephemeral electric potential and electric field sensor systems and methods for measuring ephemeral electric potentials and electric fields.

Generazio, Edward R.↗

Dielectrophoresis assisted rapid, selective and single cell detection of antibiotic resistant bacteria with G-FETs

Time-consuming, expensive and low sensitivity diagnostic methods used for monitoring bacterial infections lead to unnecessary or delays in prescription of the right antibiotic treatment. Determining an optimal clinical treatment requires rapid detection and identification of pathogenic bacteria and their sensitivity to specific antimicrobials. However, diagnostic devices that meet all of these criteria have proven elusive thus far. Graphene field effect transistors (G-FET) are a promising solution, since they are highly sensitive to chemical/biological modification, can have fast detection times and can be placed on different substrates. Here, by integrating specific peptide probes over G-FETs, we present a proof-of-concept study for species and strain specific label-free detection of clinical strains of pathogenic bacteria with high specificity and sensitivity. We found that pyrene-conjugated peptides immobilized on G-FETs were capable of detecting pathogenic Staphylococcus aureus at the single-cell level and discriminate against other gram-positive and gram-negative bacterial pathogens. A similar device was able to discriminate between antibiotic resistant and sensitive strains of Acinetobacter baumannii , suggesting that these devices can also be used for detecting antibiotic resistive pathogens. Furthermore, a new means of enhancing attachment, electric-field assisted binding, reduced the detection limit to 104 cells/ml and the detection time to below 5 minutes. Here, the combination of single step attachment, inexpensive production, rapid, selective and sensitive detection suggest G-FETs plus pyrene-conjugated peptides are a new platform for solving major challenges faced in point of care diagnostics to fight infectious diseases and antimicrobial resistance.

77 NANOSCIENCE AND NANOTECHNOLOGY↗

Atomically Precise Graphene Nanoribbon Transistors with Long-Term Stability and Reliability

Atomically precise graphene nanoribbons (GNRs) synthesized from the bottom-up exhibit promising electronic properties for high-performance field-effect transistors (FETs). The feasibility of fabricating FETs with GNRs (GNRFETs) has been demonstrated, with ongoing efforts aimed at further improving their performance. However, their long-term stability and reliability remain unexplored, which is as important as their performance for practical applications. In this work, we fabricated short-channel FETs with nine-atom-wide armchair GNRs (9-AGNRFETs). We revealed that the on-state (/ ON ) current performance of the 9-AGNRFETs deteriorates significantly over consecutive full transistor on and off logic cycles, which has neither been demonstrated nor previously considered. To address this issue, we deposited a thin ~10 nm thick atomic layer deposition (ALD) layer of aluminum oxide (Al 2 O 3 ) directly on these devices. The integrity, compatibility, electrical performance, stability, and reliability, of the GNRFETs before and/or after Al 2 O 3 deposition were comprehensively studied. The results indicate that the observed decline in electrical device performance is most likely due to the degradation of contact resistance over multiple measurement cycles. We successfully demonstrated that the devices with the Al 2 O 3 layer operate well up to several thousand continuous full cycles without any degradation. Our study offers valuable insights into the stability and reliability of GNR transistors, which could facilitate their large-scale integration into practical applications.

36 MATERIALS SCIENCE↗

Fabrication of field-effect transistors with transfer-free nanostructured carbon as semiconducting channel material

Carbon nanostructures as active channel material in field effect transistors (FETs) are appealing in microelectronics for their improved performance such as high speed and low energy dissipation. However, these devices require the incorporation of nanostructure transfer steps in the fabrication process flow, which makes difficult its application in large scale integration circuits. Here we present a novel method for the fabrication of FETs with nanostructured carbon in the channel with p-type semiconducting properties and intermediate drain-source current (IDS) on/off ratio. The method is based on the use of Ni nanoparticles in the source-drain gap region as seed material for the formation of carbon nanostructures in the FET channel. FETs without Ni nanoparticles in the channel showed no modulation of IDS as a function of gate voltage. The device fabrication process does not require any carbon nanostructure transfer steps since it directly forms carbon nanostructures electrically connected to the device's source and drain electrodes via electron-beam evaporation of carbon and conventional lithographic processes. Since all device fabrication steps are compatible with Si technology processes, they are capable of being further optimized following process development protocols practiced by the semiconductor industry.

77 NANOSCIENCE AND NANOTECHNOLOGY↗

Gas adsorption and light interaction mechanism in phosphorene-based field-effect transistors

Phosphorene-based field effect transistor (FET) structures were fabricated to study the gas- and photo-detection properties of phosphorene. The interplay between device performance and environmental conditions was probed and analyzed using in situ transport measurements. The device structures were exposed to different chemical and light environments to understand how they perform under different external stimuli. For the gas/molecule detection studies, inert (Ar), as well as, oxidizing (N 2 O), and reducing (H 2 and also N 2 H 4 ) agents were selected. The FET structure was exposed to these different gases, and the effect of each gas on the device resistance was measured. The study showed varying response towards different molecules. Specifically, no significant resistance change was observed upon exposure to Ar, while H 2 and N 2 H 4 were found to decrease the resistance and N 2 O had the opposite effect resulting in an increase in resistance. This work is the first demonstration for the detection of N 2 H 2 and N 2 O using a phosphorene-based system. These phosphorene-based FET structures were also found to be sensitive to light exposure. When such structure was irradiated with light, the current modulation was lost. The observed resistance changes can be explained as a result of the modulation of the Schottky barrier at the phosphorene-electrical contact interface due to the adsorbed molecules and charge transfer, and/or photo-induced carrier generation. Furthermore, the results were consistent with the transfer characteristics of V ds v s . V g .

37 INORGANIC, ORGANIC, PHYSICAL, AND ANALYTICAL CH↗

Using G4FETs as a Data Router for In-Plane Crossing of Signal Paths

Theoretical analysis and some experiments have demonstrated that siliconon- insulator (SOI) 4-gate transistors the type known as G(exp 4)FETs could be efficiently used for in-plane crossing of signal paths. Much of the effort of designing very-large-scale integrated (VLSI) circuits is focused on area-efficient routing of signals. The main source of difficulty in VLSI signal routing is the requirement to prevent crossing, in the same plane, of wires that are meant to be kept electrically insulated from each other. Consequently, it often becomes necessary to design and build VLSI circuits in multiple layers with vias (connections between conductors in different layers at selected locations). Suitable devices that would prevent, or at least sufficiently suppress, undesired electrical coupling (cross-talk) between wires crossing in the same plane would enable compact, simpler implementation complex interconnection networks with in-plane crossings that, heretofore, have not been possible in VLSI circuitry. The use of G4FETs as in-plane signal-crossing devices or routers, in combination with the use of G(exp 4)FETs as universal programmable logic gates, would create opportunities for reducing complexity in VLSI design.

Fijany, Amir↗

Hydrogen Effects on GaAs, Status and Progress

It has been observed that GaAs devices in hermetically sealed packages when exposed to temperatures as low as 125oC can exhibit unacceptable degradation in both RF and DC characteristics. The source of the problem was found to be hydrogen that has been absorbed in the package's metals (Kovar, plating, etc.) and converted into atomic hydrogen within the Pt metallization of the gate structure. Subsequently, atomic hydrogen diffuses into the channel region of the FET structure and neutralizes the Si donors, resulting in a degradation of the device characteristics. Most of the data indicates the onslaught of the problem to occur after 500 hours at 125oC. This onslaught has been observed to be dependent on the thickness and processing conditions of the passivation layer, the sealing environment, and the amount of Pt or Pd in the gate structure of the device.

Hydrogen GaAs↗

Modeling of Gate Bias Modulation in Carbon Nanotube Field-Effect-Transistor

The threshold voltages of a carbon-nanotube (CNT) field-effect transistor (FET) are studied. The CNT channel is so thin that there is no voltage drop perpendicular to the gate electrode plane, and this makes the device characteristics quite unique. The relation between the voltage and the electrochemical potentials, and the mass action law for electrons and holes are examined in the context of CNTs, and inversion and accumulation threshold voltages (V(sub Ti), and V(sub Ta)) are derived. V(sub Ti) of the CNTFETs has a much stronger doping dependence than that of the metal-oxide- semiconductor FETs, while V(sub Ta) of both devices depends weakly on doping with the same functional form.

Toshishige, Yamada↗

Temperature Tolerant Evolvable Systems Utilizing FPGA Boards and Bias-Controlled Amplifiers

Space missions often require radiation and extreme-temperature hardened electronics to survive the harsh environments beyond Earth's atmosphere. Traditional approaches to preserve electronics incorporate shielding, insulation and redundancy at the expense of power and weight. However, a novel way of bypassing these problems is the concept of evolutionary hardware. A reconfigurable device, consisting of several switches interconnected with analog/digital parts, is controlled by an evolutionary processor (EP). When the EP detects degradation in the circuit it sends signals to reconfigure the switches, thus forming a new circuit with the desired output. This concept has been developed since the mid-l990s, but one problem remains-the EP cannot degrade substantially. For this reason, extensive testing at extreme temperatures (-180 to 120 C) has been done on devices found on FPGA boards (taking the role of the EP), such as the Analog to Digital and the Digital to Analog Converter. The EP is used in conjunction with a bias-controlled amplifier and a new prototype relay board, which is interconnected with 6 G4-FETs, a tri-input transistor-like element developed at JPL. The greatest improvements to be made lie in the reconfigurable device, so future design and testing of the G4-FET chip is required.

Kumar, Nikhil R.↗