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NASA NTRS · 20060029993

The four-gate transistor

Abstract

The four-gate transistor or G4-FET combines MOSFET and JFET principles in a single SOI device. Experimental results reveal that each gate can modulate the drain current. Numerical simulations are presented to clarify the mechanisms of operation. The new device shows enhanced functionality, due to the combinatorial action of the four gates, and opens rather revolutionary applications.

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BibTeXRIS

Mojarradi, M. M., Cristoveanu, S., Allibert, F., France, G., Blalock, B., Durfrene, B.. 2002-09-23. The four-gate transistor. https://ntrs.nasa.gov/citations/20060029993

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