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At least 739 records · Page 41

A robot arm simulation with a shared memory multiprocessor machine

A parallel processing scheme for a single chain robot arm is presented for high speed computation on a shared memory multiprocessor. A recursive formulation that is derived from a virtual work form of the d'Alembert equations of motion is utilized for robot arm dynamics. A joint drive system that consists of a motor rotor and gears is included in the arm dynamics model, in order to take into account gyroscopic effects due to the spinning of the rotor. The fine grain parallelism of mechanical and control subsystem models is exploited, based on independent computation associated with bodies, joint drive systems, and controllers. Efficiency and effectiveness of the parallel scheme are demonstrated through simulations of a telerobotic manipulator arm. Two different mechanical subsystem models, i.e., with and without gyroscopic effects, are compared, to show the trade-off between efficiency and accuracy.

Kim, Sung-Soo↗

Capacity for patterns and sequences in Kanerva's SDM as compared to other associative memory models

The information capacity of Kanerva's Sparse Distributed Memory (SDM) and Hopfield-type neural networks is investigated. Under the approximations used, it is shown that the total information stored in these systems is proportional to the number connections in the network. The proportionality constant is the same for the SDM and Hopfield-type models independent of the particular model, or the order of the model. The approximations are checked numerically. This same analysis can be used to show that the SDM can store sequences of spatiotemporal patterns, and the addition of time-delayed connections allows the retrieval of context dependent temporal patterns. A minor modification of the SDM can be used to store correlated patterns.

Keeler, James D.↗

Design knowledge capture for a corporate memory facility

Currently, much of the information regarding decision alternatives and trade-offs made in the course of a major program development effort is not represented or retained in a way that permits computer-based reasoning over the life cycle of the program. The loss of this information results in problems in tracing design alternatives to requirements, in assessing the impact of change in requirements, and in configuration management. To address these problems, the problem was studied of building an intelligent, active corporate memory facility which would provide for the capture of the requirements and standards of a program, analyze the design alternatives and trade-offs made over the program's lifetime, and examine relationships between requirements and design trade-offs. Early phases of the work have concentrated on design knowledge capture for the Space Station Freedom. Tools are demonstrated and extended which helps automate and document engineering trade studies, and another tool is being developed to help designers interactively explore design alternatives and constraints.

Boose, John H.↗

Video-task assessment of learning and memory in Macaques (Macaca mulatta) - Effects of stimulus movement on performance

Effects of stimulus movement on learning, transfer, matching, and short-term memory performance were assessed with 2 monkeys using a video-task paradigm in which the animals responded to computer-generated images by manipulating a joystick. Performance on tests of learning set, transfer index, matching to sample, and delayed matching to sample in the video-task paradigm was comparable to that obtained in previous investigations using the Wisconsin General Testing Apparatus. Additionally, learning, transfer, and matching were reliably and significantly better when the stimuli or discriminanda moved than when the stimuli were stationary. External manipulations such as stimulus movement may increase attention to the demands of a task, which in turn should increase the efficiency of learning. These findings have implications for the investigation of learning in other populations, as well as for the application of the video-task paradigm to comparative study.

Washburn, David A.↗

Cache-based error recovery for shared memory multiprocessor systems

A multiprocessor cache-based checkpointing and recovery scheme for of recovering from transient processor errors in a shared-memory multiprocessor with private caches is presented. New implementation techniques that use checkpoint identifiers and recovery stacks to reduce performance degradation in processor utilization during normal execution are examined. This cache-based checkpointing technique prevents rollback propagation, provides for rapid recovery, and can be integrated into standard cache coherence protocols. An analytical model is used to estimate the relative performance of the scheme during normal execution. Extensions that take error latency into account are presented.

Wu, Kun-Lung↗

Error recovery in shared memory multiprocessors using private caches

The problem of recovering from processor transient faults in shared memory multiprocesses systems is examined. A user-transparent checkpointing and recovery scheme using private caches is presented. Processes can recover from errors due to faulty processors by restarting from the checkpointed computation state. Implementation techniques using checkpoint identifiers and recovery stacks are examined as a means of reducing performance degradation in processor utilization during normal execution. This cache-based checkpointing technique prevents rollback propagation, provides rapid recovery, and can be integrated into standard cache coherence protocols. An analytical model is used to estimate the relative performance of the scheme during normal execution. Extensions to take error latency into account are presented.

Wu, Kun-Lung↗

Differential memory in the trilinear model magnetotail

The previously proposed concept of 'differential memory' is quantitatively demonstrated using an idealized analytical model of particle dynamics in the magnetotail geometry. In this model (the 'trilinear' tail model) the magnetotail is divided into three regions. The particle orbits are solved exactly in each region, thus reducing the orbit integration to an analytical mapping. It is shown that the trilinear model reproduces the essential phase space features of the earlier model (Chen and Palmadesso, 1986), possessing well-defined entry and exit regions, and stochastic, integrable (regular), and transient orbits, occupying disjoint phase space regions. Different regions have widely separated characteristic time scales corresponding to different types of particle motion. Using the analytical model, the evolution of single-particle distribution functions is calculated.

Chen, James↗

Distributed memory compiler design for sparse problems

A compiler and runtime support mechanism is described and demonstrated. The methods presented are capable of solving a wide range of sparse and unstructured problems in scientific computing. The compiler takes as input a FORTRAN 77 program enhanced with specifications for distributing data, and the compiler outputs a message passing program that runs on a distributed memory computer. The runtime support for this compiler is a library of primitives designed to efficiently support irregular patterns of distributed array accesses and irregular distributed array partitions. A variety of Intel iPSC/860 performance results obtained through the use of this compiler are presented.

Wu, Janet↗

Fuzzy associative memories

Mappings between fuzzy cubes are discussed. This level of abstraction provides a surprising and fruitful alternative to the propositional and predicate-calculas reasoning techniques used in expert systems. It allows one to reason with sets instead of propositions. Discussed here are fuzzy and neural function estimators, neural vs. fuzzy representation of structured knowledge, fuzzy vector-matrix multiplication, and fuzzy associative memory (FAM) system architecture.

Kosko, Bart↗

The Cortex Transform as an image preprocessor for sparse distributed memory: An initial study

An experiment is described which was designed to evaluate the use of the Cortex Transform as an image processor for Sparse Distributed Memory (SDM). In the experiment, a set of images were injected with Gaussian noise, preprocessed with the Cortex Transform, and then encoded into bit patterns. The various spatial frequency bands of the Cortex Transform were encoded separately so that they could be evaluated based on their ability to properly cluster patterns belonging to the same class. The results of this study indicate that by simply encoding the low pass band of the Cortex Transform, a very suitable input representation for the SDM can be achieved.

Olshausen, Bruno↗

Implementation of two projection methods on a shared memory multiprocessor - DEC VAX 6240

The relative performance of two iterative schemes, based on projection techniques, is compared on a shared memory multiprocessor - VAX 6240. The CG accelerated Block-SSOR method and the CG accelerated Symmetric-Kaczmarz method are considered for the solution of large sparse nonsymmetric systems of linear equations. It is shown that the regular structure of many matrices can be exploited by the CG-accelerated Block-SSOR method to provide good speedup in a multiprocessing environment. However, the CG accelerated Symmetric-Kaczmarz method, while being a viable alternative on a scalar machine, is unable to benefit from multiprocessing.

Kamath, C.↗

Explicit time integration of finite element models on a vectorized, concurrent computer with shared memory

The implementation of a nonlinear explicit program on a vectorized, concurrent computer with shared memory is described and studied. The conflict between vectorization and concurrency is described and some guidelines are given for optimal block sizes. Several example problems are summarized to illustrate the types of speed-ups which can be achieved by reprogramming as compared to compiler optimization.

Gilbertsen, Noreen D.↗

An area model for on-chip memories and its application

An area model suitable for comparing data buffers of different organizations and arbitrary sizes is described. The area model considers the supplied bandwidth of a memory cell and includes such buffer overhead as control logic, driver logic, and tag storage. The model gave less than 10 percent error when verified against real caches and register files. It is shown that, comparing caches and register files in terms of area for the same storage capacity, caches generally occupy more area per bit than register files for small caches because the overhead dominates the cache area at these sizes. For larger caches, the smaller storage cells in the cache provide a smaller total cache area per bit than the register set. Studying cache performance (traffic ratio) as a function of area, it is shown that, for small caches, direct-mapped caches perform significantly better than four-way set-associative caches and, for caches of medium areas, both direct-mapped and set-associative caches perform better than fully associative caches.

Mulder, Johannes M.↗

Ray tracing on distributed memory parallel systems

Among the many techniques in computer graphics, ray tracing is prized because it can render realistic images, albeit at great computational expense. In this note, the performance of several approaches to ray tracing on a distributed memory parallel system is evaluated. A set of performance instrumentation tools and their associated visualization software are used to identify the underlying causes of performance differences.

Jensen, David W.↗

Studies of electron collisions with polyatomic molecules using distributed-memory parallel computers

Elastic electron scattering cross sections from 5-30 eV are reported for the molecules C2H4, C2H6, C3H8, Si2H6, and GeH4, obtained using an implementation of the Schwinger multichannel method for distributed-memory parallel computer architectures. These results, obtained within the static-exchange approximation, are in generally good agreement with the available experimental data. These calculations demonstrate the potential of highly parallel computation in the study of collisions between low-energy electrons and polyatomic gases. The computational methodology discussed is also directly applicable to the calculation of elastic cross sections at higher levels of approximation (target polarization) and of electronic excitation cross sections.

Winstead, C.↗

Stripe stabilization in vertical Bloch line memory

Long, partial rectangular grooves have been made to reside below the stripe-confinement groove on a garnet surface, in order to stabilize minor loop stripes in a vertical Bloch-line memory. The test chip contained, in addition to either 10 or 20 minor-loop grooves, 10 read/write gate grooves and a major line groove; both 10 and 20 micron groove periods were tested. As the bias field was gradually decreased, bubbles began to stripe out. These stripes were stable at bias fields in the 70-80 Oe range. When stripes escaped from the groove, the even occurred from the end which does not face a read/write gate groove.

Wu, J. C.↗

Major line operation in vertical Bloch line memory

An experimental and numerical study is conducted of the operation of a major line in a vertical Bloch-line memory that employs a partial garnet-grooving architecture and contains (1) a bubble generator; (2) a bubble-propagation track; (3) a bubble-expander for detection; and (4) a bubble annihilator. The bubble expander is a modification of the propagation track; the meandering conductor and groove width were gradually increased to stretch the bubble into a stripe. The numerical model employed encompasses the garnet-grooving effect. Agreement is obtained between exparimental and simulation results.

Wu, J. C.↗

Memory implications of the spin-value effect in soft multilayers

New multilayer permalloy materials with thin separation layers that have significantly increased M-R coefficients at room temperature have the potential for substantially increasing both the speed and density of M-R memories. An analysis in the following discussion shows that the bit density at a given performance level is related to the product of M-R response and sheet resistivity when operating at the current-density limit. With a doubling of both sheet resistivity and M-R response over existing materials, the bit area can be reduced by about a factor of 4. Alternatively, if the bit area is kept the same, signal output is increased by a factor of 4 and circuit time constants can be reduced by a factor of 16.

Pohm, A. V.↗