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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 73 records · Page 4
All sourcesNASA NTRSDOE OSTI
NASA NTRS1976

Integrated structure vacuum tube

High efficiency, multi-dimensional thin film vacuum tubes suitable for use in high temperature, high radiation environments are described. The tubes are fabricated by placing thin film electrode members in selected arrays on facing interior wall surfaces of an alumina substrate envelope. Cathode members are formed using thin films of triple carbonate. The photoresist used in photolithography aids in activation of the cathodes by carbonizing and reacting with the reduced carbonates when heated in vacuum during forming. The finely powdered triple carbonate is mixed with the photoresist used to delineate the cathode locations in the conventional solid state photolithographic manner. Anode and grid members are formed using thin films of refractory metal. Electron flow in the tubes is between grid elements from cathode to anode as in a conventional three-dimensional tube.

Dimeff, J.↗
NASA NTRS1977

Developments in vertical-junction silicon solar cells

Non-reflective vertical junction silicon cells provide high conversion efficiency radiation-resistant solar cells. New techniques of oxidation growth and the use of photolithography enable the use of an orientation dependent etch producing grooves 5 to 10 microns wide over 100 microns deep. These silicon wafers are then processed into solar cells with all of the processes performed at temperatures compatible with producing high efficiency solar cells. Most of the photogenerated carriers are created in the walls where they are within a few microns of the collecting junction. Consequently, degradation of carrier diffusion length due to radiation has a considerably reduced effect on collection efficiency. These 2 cm x 2 cm vertical junction silicon solar cells have exceeded 13% AMO efficiency and have shown superior radiation resistance.

Lindmayer, J.↗
NASA NTRS1978

Pilot line report: Development of a high efficiency thin silicon solar cell

Experimental technology advances were implemented to increase the conversion efficiency of ultrathin 2cm x 2cm cells, to demonstrate a capability for fabricating such cells at a rate of 10,000 per month, and to fabricate 200 large-area ultrathin cells to determine their feasibility of manufacture. A production rate of 10,000 50 micron m cells per month with lot average AM0 efficiencies of 11.5% was demonstrated, with peak efficiencies of 13.5% obtained. Losses in most stages of the processing were minimized, the remaining exceptions being in the photolithography and metallization steps for front contact generation and breakage handling. The 5cm x 5cm cells were fabricated with a peak yield in excess of 40% for over 10% AM0 efficiency. Greater fabrication volume is needed to fully evaluate the expected yield and efficiency levels for large cells.

Source record↗
NASA NTRS1979

Method of construction of a multi-cell solar array

The method of constructing a high voltage, low power, multicell solar array is described. A solar cell base region is formed in a substrate such as but not limited to silicon or sapphire. A protective coating is applied on the base and a patterned etching of the coating and base forms discrete base regions. A semiconductive junction and upper active region are formed in each base region, and defined by photolithography. Thus, discrete cells which are interconnected by metallic electrodes are formed.

Routh, D. E.↗
NASA NTRS1979

Multilayer self-structured bubble memories

Research work on multilayer self-structured bubble memories is at an early stage. The coupling of bubbles to stripes is investigated theoretically and experimentally and shown to be adequate for propagation. Propagation of stripes is demonstrated both by current access and field access techniques. These propagation techniques are of prime interest because they can eliminate most photographic features from the storage area. Multilayer films offer great promise for higher-capacity higher-density memories in which most of the photolithography has been eliminated and the minimum feature size of much of the remaining has been increased. Furthermore, stripe propagation can be carried out with current access, providing a significant reduction in packaging cost and power consumption over field access devices.

Kamin, M.↗
NASA NTRS1980

Progress in MOSFET double-layer metalization

Report describes one-year research effort in VLSL fabrication. Four activities are described: theoretical study of two-dimensional diffusion in SOS (silicon-on-sapphire); setup of sputtering system, furnaces, and photolithography equipment; experiments on double layer metal; and investigation of two-dimensional modeling of MOSFET's (metal-oxide-semiconductor field-effect transistors).

Gassaway, J. D.↗
NASA NTRS1979

A gas chromatographic air analyzer fabricated on a silicon wafer

A miniature gas analysis system has been built based on the principles of gas chromatography (GC). The major components are fabricated in silicon using photolithography and chemical etching techniques, which allows size reductions of nearly three orders of magnitude compared to conventional laboratory instruments. The chromatography system consists of a sample injection valve and a 1.5-m-long separating capillary column, which are fabricated on a substrate silicon wafer. The output thermal conductivity detector is separately batch fabricated and integrably mounted on the substrate wafer. The theory of gas chromatography has been used to optimize the performance of the sensor so that separations of gaseous hydrocarbon mixtures are performed in less than 10 s. The system is expected to find application in the areas of portable ambient air quality monitors, implanted biological experiments, and planetary probes.

Terry, S. C.↗
NASA NTRS1980

Grid polarizers for infrared Fourier spectrometers

Infrared grid polarizers consisting of copper lines with a 3.6-micron grid constant on a 4-micron-thick Mylar polyester substrate have been prepared by the techniques of photolithography and sputter-etching. Their polarization properties have been measured and found to be suitable for use at infrared frequencies below 700/cm. The polarizers have been used to extend the useful frequency range of a Martin-Puplett polarizing interferometer designed for Fourier transform spectroscopy. The efficiency of the interferometer has been measured over a frequency range from 50 to 700/cm and compared to that of a conventional Michelson interferometer. The results are shown to be consistent with the measured properties of the polarizers. Methods are suggested for improving the efficiency of a Martin-Puplett interferometer which employs these polarizers.

Challener, W. A.↗
NASA NTRS1978

A study of trends and techniques for space base electronics

Furnaces and photolithography related equipment were applied to experiments on double layer metal. The double layer metal activity emphasized wet chemistry techniques. By incorporating the following techniques: (1) ultrasonic etching of the vias; (2) premetal clean using a modified buffered hydrogen fluoride; (3) phosphorus doped vapor; and (4) extended sintering, yields of 98 percent were obtained using the standard test pattern. The two dimensional modeling problems have stemmed from, alternately, instability and too much computation time to achieve convergence.

Trotter, J. D.↗
NASA NTRS1979

Trends and Techniques for Space Base Electronics

Simulations of various phosphorus and boron diffusions in SOS were completed and a sputtering system, furnaces, and photolithography related equipment were set up. Double layer metal experiments initially utilized wet chemistry techniques. By incorporating ultrasonic etching of the vias, premetal cleaning a modified buffered HF, phosphorus doped vapox, and extended sintering, yields of 98% were obtained using the standard test pattern. A two dimensional modeling program was written for simulating short channel MOSFETs with nonuniform substrate doping. A key simplifying assumption used is that the majority carriers can be represented by a sheet charge at the silicon dioxide silicon interface. Although the program is incomplete, the two dimensional Poisson equation for the potential distribution was achieved. The status of other Z-D MOSFET simulation programs is summarized.

Trotter, J. D.↗
NASA NTRS1983

RF Sputtering of Gold Contacts On Niobium

Reliable gold contacts are deposited on niobium by combination of RF sputtering and photolithography. Process results in structures having gold only where desired for electrical contact. Contacts are stable under repeated cycling from room temperature to 4.2 K and show room-temperature contact resistance as much as 40 percent below indium contacts made by thermalcompression bonding.

Barr, D. W.↗
NASA NTRS1982

Self-heated thermocouples for far-infrared detection

A novel self-heated Bi-Sb thermocouple for far-infrared detection has been developed. The detector is suitable for integration with monolithic antennas and imaging arrays. The device is fabricated in a single photolithography masking step using a photoresist-bridge technique. This bridge technique has also been used to make microbolometers with lower 1/f noise than those made by two conventional masking steps. The thermocouples have a noise equivalent power of 7 x 10 to the -10th W/sq rt of Hz and a 3-dB frequency response of 150 kHz.

Neikirk, D. P.↗
NASA NTRS1981

Fabrication of multijunction high voltage concentrator solar cells by integrated circuit technology

Standard integrated circuit technology has been developed for the design and fabrication of planar multijunction (PMJ) solar cell chips. Each 1 cm x 1 cm solar chip consisted of six n(+)/p, back contacted, internally series interconnected unit cells. These high open circuit voltage solar cells were fabricated on 2 ohm-cm, p-type 75 microns thick, silicon substrates. A five photomask level process employing contact photolithography was used to pattern for boron diffusions, phorphorus diffusions, and contact metallization. Fabricated devices demonstrated an open circuit voltage of 3.6 volts and a short circuit current of 90 mA at 80 AMl suns. An equivalent circuit model of the planar multi-junction solar cell was developed.

Valco, G. J.↗
NASA NTRS1982

Lateral epitaxial overgowth of GaAs by organometallic chemical vapor deposition

Lateral epitaxial overgrowth of GaAs by organometallic chemical vapor deposition has been demonstrated. Pyrolytic decomposition of trimethylgallium and arsine, without the use of HCl, was used to deposit GaAs on substrates prepared by coating (110) GaAs wafers with SiO2, then using photolithography to open narrow stripes in the oxide. Lateral overgrowth was seeded by epitaxial deposits formed on the GaAs surfaces exposed by the stripe openings. The extent of lateral overgrowth was investigated as a function of stripe orientation and growth temperature. Ratios of lateral to vertical growth rates greater than five have been obtained. The lateral growth is due to surface-kinetic control for the two-dimensional growth geometry studied. A continuous epitaxial GaAs layer 3 microns thick has been grown over a patterned mask on a GaAs substrate and then cleaved from the substrate.

Gale, R. P.↗
NASA NTRS1984

IC Fabrication Methods Improve Laser Diodes

Family of high-performance, tunable diode lasers developed for use as local oscillators in passive laser heterodyne spectrometer. Diodes fabricated using standard IC processes include photolithography, selective etching and vacuum deposition of metals and insulators. Packaging refinements improved thermal-cycling characteristics of diodes and increased room-temperature shelf life.

Miller, M.↗
NASA NTRS1982

Planar multijunction high voltage solar cell chip

A new innovative planar multijunction solar cell chip for concentrated sunlight applications is proposed. The chip consists of many voltage-generating regions, called unit cells, which are connected in series within a single silicon wafer, thereby providing a high open-circuit voltage at multiple sun illumination levels. The unit cells are fabricated on 75 micron thick p-type single crystal silicon substrate. Each chip consists of 1.42 x 9.63 mm n(+)/p collecting junctions on the back of the wafer, while the illuminated front surface area is divided into 0.3 micron deep n(+) regions. The fabrication sequence includes standard degreasing and cleaning procedures, double-sided alignment photomasking, introduction of boron and phosphorus impurities, and photolithography. The open circuit voltage of the chip increased rapidly with illumination up to about 4 AM1 suns, and then began to saturate at the sum of the individual unit cell voltages of 3.5 above 4 AM1 suns. A short circuit density per unit cell of 300 mA/sq cm at 20 AM1 suns was observed.

Valco, G. J.↗
NASA NTRS1982

High density circuit technology, part 3

Dry processing - both etching and deposition - and present/future trends in semiconductor technology are discussed. In addition to a description of the basic apparatus, terminology, advantages, glow discharge phenomena, gas-surface chemistries, and key operational parameters for both dry etching and plasma deposition processes, a comprehensive survey of dry processing equipment (via vendor listing) is also included. The following topics are also discussed: fine-line photolithography, low-temperature processing, packaging for dense VLSI die, the role of integrated optics, and VLSI and technology innovations.

Wade, T. E.↗
NASA NTRS1985

New high-efficiency silicon solar cells

A design for silicon solar cells was investigated as an approach to increasing the cell open-circuit voltage and efficiency for flat-plate terrestrial photovoltaic applications. This deviates from past designs, where either the entire front surface of the cell is covered by a planar junction or the surface is textured before junction formation, which results in an even greater (up to 70%) junction area. The heavily doped front region and the junction space charge region are potential areas of high recombination for generated and injected minority carriers. The design presented reduces junction area by spreading equidiameter dot junctions across the surface of the cell, spaced about a diffusion length or less from each other. Various dot diameters and spacings allowed variations in total junction area. A simplified analysis was done to obtain a first-order design optimization. Efficiencies of up to 19% can be obtained. Cell fabrication involved extra masking steps for selective junction diffusion, and made surface passivation a key element in obtaining good collection. It also involved photolithography, with line widths down to microns. A method is demonstrated for achieving potentially high open-circuit voltages and solar-cell efficiencies.

Daud, T.↗