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A vertical heterojunction barrier Schottky diode was fabricated by combining a p-type SnO film array with a β-Ga 2 O 3 substrate, yielding a lower reverse leakage current and an improved breakdown voltage than its Schottky barrier diode counterpart.
Herzenbergite α-SnS is a promising p-type semiconductor for photovoltaic and solar fuel applications, but current devices are plagued by substantial photovoltage losses. Here we use vibrating Kelvin probe surface photovoltage for the first time to study the recombination losses in microcrystalline SnS photoelectrodes. α-SnS films of varied crystal orientation, size, and shape are obtained by electrochemical growth from aqueous tin( II ) chloride and sodium thiosulfate solutions near room temperature. After application of a CdS passivation layer, the films function as photocathodes for the methylviologen reduction reaction. Photoelectrochemical and surface photovoltage measurements reveal that the performance of these devices is sensitively controlled by mainly the SnS crystal orientation and to a lesser extent by the grain size. For example, the highest charge recombination rates of 8.97 × 10 14 s −1 cm −2 and lowest photocurrent (0.73 mA cm −2 ) and lowest photovoltage (0.12 V) occur for SnS films containing 500 nm crystals with irregular shapes and SnS lattices tilted away from the (001) orientation. On the other hand, the best performance (1.62 mA cm −2 , 0.16 V, 3.32 × 10 12 s −1 cm −2 ) is seen for 1100 nm fully (001) oriented SnS nanoplates. Furthermore, these findings agree with improved charge carrier mobility in the 001 direction and they also show that charge recombination in SnS films occurs mainly at dangling Sn–S bonds at buried (002) facets. Such buried interfaces need to be suppressed for optimized solar energy conversion with SnS.
The current quest for new pathways into sustainable, efficient and durable energy conversion technologies makes the used for a fundamental understanding of the atomic-scale phenomena underlying catalytic processes ever more pressing. In this context, characterizing catalyst particles in situ provides valuable information about the evolution of their composition, structure, oxidation state and charge state during an ongoing process. To disentangle the influence of individual parameters – temperature, pressure, gas composition, cluster size, as well as support acidity, redox state and defect density – it is crucial to control them precisely and separately in experiments. At the example of size-selected Pt n clusters – i.e. sub-nm particles defined to the exact number of atoms – on flat oxide supports, we follow their rich evolution phenomena via (synchrotron-based) X-ray photoelectron spectroscopy (XPS) and scanning tunnelling microscopy (STM) during temperature ramps and in various gas environments. Here, we present our experience with these highly defined, yet complicated-to-create samples in ultra-high vacuum (UHV) and at mbar pressures. We discuss their stability during transport to synchrotrons and under reaction conditions on three prototypical oxide supports and show the various phenomena that can be disentangled. Ptn clusters on the non-reducible silicon dioxide, SiO 2 , remain size-selected and show remarkable stability. Doping strongly influences the size-dependent binding energy shifts and changes the Pt response to oxidative and reaction conditions, which we attribute to different cluster geometries: p-type doping leads to wetting, enhanced sinter resistance and a diminished response to oxidative environments, compared to clusters on n-type doped samples. We compare the system with our previous findings of a similar change in dimensionality for Pt 20 clusters on the reducible ceria, CeO 2 (111), support, induced by modulation of its O vacancy density. The Pt n /CeO 2 system is particularly interesting for strategies to stabilize and redisperse Pt clusters dynamically. Finally, we study the evolution of Pt n clusters on another reducible oxide support, magnetite, Fe 3 O 4 (001), in 0.1 mbar alternating redox conditions at RT and elevated temperature. In analogy to findings previously reported for Pt/TiO 2 (110), the clusters either become encapsulated by a thin oxide film via strong metal–support interaction (SMSI) or deeply buried in the magnetite. Overall, our approach of following the evolution of size-selected clusters on oxide supports leads to fundamental atomic-scale insights on nano-scale catalyst materials, on our path to sustainable, dynamic and self-repairing catalysts.
Tellurium (Te) has recently emerged as a promising p-type semiconductor that can be processed at low temperatures, compatible with back end of line CMOS integration. Characterization of tellurium–dielectric interfaces is essential for further device advancements. Here, the interface quality of Te with ZrO2 gate dielectric is studied in a metal-oxide semiconductor capacitor structure. The interface trap density (Dit) is measured as a function of atomic layer deposition (ALD) temperature, without the use of a seed layer. Given the low thermal budget of Te, the ALD temperature is shown to be particularly important. The lowest Dit of 5 × 1012 states/cm2 eV is obtained at a low ALD process temperature of 120 °C. To further assess the impact of Dit on device performance, field-effect transistors (FETs) were fabricated. The subthreshold swing and effective hole mobility of the FETs were analyzed in relation to Dit, emphasizing the importance of a defect-minimized interface for enhancing Te transistor performance.
We demonstrate the epitaxial growth of tetragonal platinum monoxide (PtO) on MgO, TiO 2 , and β-Ga 2 O 3 single-crystalline substrates by ozone molecular-beam epitaxy. We provide synthesis routes and derive a growth diagram under which PtO films can be synthesized by physical vapor deposition. A combination of electrical transport and photoemission spectroscopy measurements, in conjunction with density functional theory calculations, reveal PtO to be a degenerately doped p-type semiconductor with a bandgap of E g ≈ 1.6 eV. Spectroscopic ellipsometry measurements are used to extract the complex dielectric function spectra, indicating a transition from free-carrier absorption to higher photon energy transitions at E ≈ 1.6 eV. Using tetragonal PtO as an anode contact, we fabricate prototype Schottky diodes on n-type Sn-doped β-Ga 2 O 3 substrates and extract Schottky barrier heights of ϕ B > 2.2 eV.
Four doping conditions were explored for CdTe-based solar cells: p-type As and P, n-type Al, and no intentional doping. In each case, the CdTe absorber was alloyed with Se, but only near the normal front-side, light entry for the cells, while the dopants were added from the back. Cells with p-dopants showed efficiencies up to 20% with front-side illumination, but the n-doped and undoped ones were close to zero. With back-side illumination, this was reversed with undoped up to 8% and p-doped ones only about 2%. These results are explained by Kelvin-probe measurements of electric-field profiles, which showed that the diode field was near the front for the higher-efficiency p-doping, but near the back for undoped and n-doped.
The electrical characterization of materials, particularly superconductors, semiconductors, and those undergoing metal-insulator transitions (MITs), relies significantly on resistivity and Hall measurements as a function of temperature. The van der Pauw four-point probe method is commonly used for such measurements, which involves resistance measurements for different circuit configurations connected to sample contacts. However, repeating these measurements at different temperatures is challenging and time consuming. Here, this study introduces a novel approach utilizing a switching circuit controlled by an Arduino device and a LabVIEW program to automate resistance measurements for different electrical configurations. The effectiveness of this setup was demonstrated by testing V 2 O 3 thin film samples deposited on Al 2 O 3 (001) substrates using DC magnetron sputtering. The MIT temperature of the sample was 115 K during heating and 100 K during cooling. The sample exhibited p-type charge carriers with a Hall coefficient of 1.3 ± 0.1 x 10 -4 cm 3 /C and Hall mobility of 1.7 x 10 -1 cm 2 /V∙s, which is consistent with findings from other studies employing commercial equipment.
Power generation in space is currently dominated by expensive III-V multi-junction photovoltaic (PV) devices and cheap crystalline silicon (c-Si) PV devices. Both of these technologies degrade rapidly in proton-radiation-rich space environments, such as the Van Allen belt. The present study of cadmium selenide telluride- (CdSeTe-) based PV devices exposed to 150-to-1500 keV proton irradiation with fluences up to 9 x 1013 cm-2 reveal a more radiation-hard alternative to III-V and c-Si PV technologies. We report on measurement and analysis of current density vs voltage (JV), external quantum efficiency (EQE), external radiative efficiency, and capacitance vs voltage (CV) characteristics. JV characteristics of As-doped CdSeTe devices show 80% remaining power conversion efficiency (PCE) relative to unexposed controls when exposed to 650 keV protons at a fluence of 1012 cm-2. Under these same irradiation conditions, Cu-doped CdSeTe devices demonstrate an even better 95% PCE retention compared with unirradiated control devices. Evidence of radiation-induced absorber p-type doping compensation is observed in the glass-side EQE at 0 V and CV characteristics of most of the irradiated CdSeTe:As devices, but clear compensation is evident only for the most heavily irradiated CdSeTe:Cu devices. Elevated blue-green photocurrent in the film-side 0 V EQE suggests a buried junction in the most heavily irradiated CdSeTe:As devices. Although CdSeTe:Cu devices are the more resilient of the CdSeTe structures, both CdSeTe-based technologies are radiation-hard when compared to c-Si and III-V multi-junction PV.
Here, we report simple and potentially low-cost techniques for creating high-quality n-type gallium arsenide (GaAs) and GaAs p/n junctions and fabricate GaAs p/n junction solar cells. Detailed-balance modeling suggests that 20% AM1.5G efficiency p/n homojunction devices may be possible if the surface doping concentration can be limited to values less than ∼ 5 × 10 19 cm −3 . Our process exploits an open-tube, vapor-phase, deposition-free, zinc diffusion technique for forming p-type layers in melt-grown n-GaAs substrates that results in sheet resistances less than 1 kΩ/$\square$. In addition, we have improved the minority carrier diffusion lengths of melt-grown GaAs from less than one micron to over five microns using an open-tube, vacuum-free, annealing process which reduces the density of EL2 midgap defects. Finally, we have combined these advances to fabricate epitaxy-free, GaAs solar cells with a validated AM1.5G efficiency of 15.3%.
Here, this article presents a comparative analysis of total ionizing dose (TID) response in GlobalFoundries’ (GF) 12 low-power (LP) and 12LP+12-nm bulk fin field effect transistor (FinFET) technologies using 10-keV X-rays. Our findings show that 12LP+ n-type transistors demonstrate higher sensitivity to TID degradation of the off-state leakage drain current compared to 12LP. Data indicate that for both 12LP and 12LP+, transistors with higher threshold voltages (VTs) exhibit lower off-state drain-source leakage postirradiation compared to transistors with lower VTs. Data consistently show that transistors with fewer fins per transistor show superior TID tolerance, in both 12LP and 12LP+ technologies. Lower VT transistors in both technologies display similar preirradiation leakage currents. On the other hand, higher VT transistors in 12LP+ show lower preirradiation leakage currents than those in 12LP, highlighting that the front-end-of-line of 12LP+ technology has been modified compared to 12LP. p-type devices in 12LP+ presented negligible degradation. Larger TID sensitivity in 12LP+ might be attributed to the implementation of dual-metal gate work functions, reduced halo doping, deeper source/drain (S/D) doping profiles, and/or 12LP+ having narrower fins compared to 12LP.
Huge phages are widespread in the biosphere, yet their prevalence and ecology in the human gut remain poorly characterized. Here, we report Jug (jumbo gut) phages with genomes of 360 to 402 kilobase pairs that comprise ~1.1% of the reads in human gut metagenomes, and are predicted to infect Bacteroides and/or Phocaeicola. Although three of the four major groups of Jug phages shared >90% genome-wide sequence identity, their large terminase subunits exhibited only 38 to 57% identity, suggesting horizontal acquisition from other phages. Over 1500 genomes of Jug phages were recovered from human and animal gut metagenomes, revealing their broad distribution, with largely shared gene content suggestive of frequent cross-animal-host transmission. Jug phages displayed high gene transcription activities, including the gene for a calcium-translocating P-type ATPase not detected previously in phages. These findings broaden our understanding of huge phages and highlight Jug phages as potential major players in gut microbiome ecology.
Metal halide perovskite (MHP) multiple quantum wells which consist of multilayers of alternate organic and inorganic layers exhibit large exciton binding energies due to the dielectric confinement between the inorganic and organic layers. These naturally formed multiple quantum wells have strong spin-orbit coupling (SOC) due to the presence of heavy elements in their crystal structures. Although the fundamental properties of 2D MHPs are far from being entirely understood, it is widely accepted that their band edge absorption coefficient results from strong exciton interactions. However, studies demonstrating how different exciton interactions and doping effects influence electronic traps and disorder on the band edge absorption coefficient of 2D MHPs have not been demonstrated. Understanding these interactions in MHPs will allow us to access low energy optical transitions for the fabrication of solution processable short-to-mid-wavelength IR photodetectors (1 – 8 μm). Moreover, upon doping, it is possible to move the Fermi energy into the conduction band (CB) to favorably promote the transport of charges in a working device. Herein, we study the development of 2D MHPs having strong SOC, high carrier mobility, and tunable quantum well structures. Our studies shed light on the design and modulation of fundamental physical phenomena by carefully elucidating the role of dopants (n-type and p-type), exciton heterogeneity, orientation, structure, and bias stress effects on the performance of MHPs as potential IR photodetectors.
This collaborative project was initiated with the goal of developing Scalable, Manufacturable, and Robust Technology for SiC Power Integrated Circuits (SMART SiC Power ICs). In pursuit of this objective, innovative designs and fabrication processes were implemented, enabling the development of large-scale (>1 cm²) SiC Complementary Metal-Oxide-Semiconductor (CMOS) integrated circuits and high-voltage (400–600 V) lateral power MOSFETs (HV-LDMOS) on 150 mm 4H-SiC substrates. The resulting SMART SiC Power ICs are tailored to support a wide range of applications requiring diverse voltage and power levels, including automotive systems, industrial equipment, electronic data processing, energy harvesting, and power conditioning. To achieve the proposed ‘SMART’ technology for SiC ICs, the team focused on 1) the Development of highly scalable CMOS (with high channel mobilities for n-type and p-type MOSFETs), LDMOS (~600V, 10A rated), and IC technologies, 2) Establishment of a manufacturable process baseline in a production-grade-, 150mm, SiC fabrication facility, and 3) Demonstration of SMART SiC ICs. The project initially comprised of fabricating 5 lots. In lot 1 monolithic integration using a single process was achieved. Here, we were able to successfully accomplish Integrated HV NMOSFET with LV CMOS on N-epi/N+ Substrate. The HV NMOS demonstrated a Breakdown Voltage (BV) more than 600V. Circuit demonstration of CMOS was also another achievement from this lot. In lot 2, priority was in place for isolation and integration. Here we addressed the isolation concerns and integrated the HV NMOS and LV CMOS using the N-epi/P-epi/N+ substrate. Similar to the lot 1, we were able to achieve a BV of 600 V for HV NMOS. Optimized gate oxide process with high channel mobilities, better gate oxide reliability, development of SPICE models, successful ohmic process development, novel wafer area saving design layouts, P+ isolation schemes with channeling implantations and high temperature operational circuits demonstrations are some of the key highlights from lot 1 and lot2. In lot 3, discrete device performances of HV NMOS with a BV ~700V and reliable LV CMOS performances were achieved. Also, novel architectural solutions were successfully implemented to suppress the electric field crowding at the gate oxide for reliable operations. In lot 4, half bridge power driver ICs with a conversion efficiency of (target 90% to 95%) in the 1-5MHz switching frequency range for output power between 25 W to 3 kW have been included in. However, due to the unfortunate events of sudden foundry shutdown (SiCamore Semi) the processing of lot 4 wafers came to a complete stop (January 2024). Arrangements have recently been made to shift the fabrication to another foundry, General Electric Aerospace. The fabrication process now on course (as of December 2024). Characterizations are delayed due to this unfortunate circumstance. The proposed trench architectural-based devices and ICs (lot 5) underwent modifications from the original project proposal. This change was necessitated by limitations in the availability of trench-based processes at commercial production-grade fabrication facilities in the US. Apart from above achievements, a Process Development Kit (PDK) was successfully developed for planar type SiC CMOS/LDMOS.
This project will develop a high efficiency solar cell using high-resistivity, high-lifetime multi-crystalline p-type kerfless Direct Wafer (DW) Product developed by CubicPV. NREL developed technology for passivating contacts will be utilized under this CRADA.
An electromotive force (emf) can be generated along a temperature gradient between the cold end and hot end of a thermoelectric material, termed the Seebeck effect. Based on the Seebeck effect, metallic alloys have been extensively employed to detect temperatures for centuries, named thermocouples. However, commercially available thermocouple alloys suffer from limitations, such as oxidation, chemical degradation, and poor long-term stability under high-temperature harsh environments. This DOE-funded project aimed to develop high-temperature, chemically tolerant thermocouples suitable for operation in extreme environments relevant to semiconducting thermoelectric materials. The research focused on boride-based semiconducting thermoelectric compounds as candidates for next-generation thermocouples with enhanced oxidation resistance, chemical stability, and thermal robustness under conditions representative of charcoal-fired electricity facilities. During the funded years, boride materials were synthesized using an arc-plasma technique under ambient air and argon atmospheres, enabling scalable and cost-effective production compared with conventional boride fabrication methods. The synthesized borides were processed into nanostructured powders, followed by consolidation into dense bulk materials using a spark plasma sintering (SPS) bottom-up approach. Comprehensive characterization was performed, including microstructural analysis, electrical transport measurements, and optical and thermal property evaluation. Both p-type and n-type boride electric legs were fabricated and integrated into boride-based thermocouples. The thermal and irradiation stabilities of the boride nanomaterials and bulk thermoelectric materials were systematically evaluated to assess suitability for long-term operation in harsh environments. Additionally, 12 students were broadly hands-on trained spanning the full research workflow, including word processing and technical editing (e.g., LATEX for manuscript and poster preparation), data collection and analysis (using Python and related libraries and hardware interfaces), sample preparation (including arc-plasma synthesis and spark plasma sintering), and advanced characterization techniques (such as X-ray diffraction, UV–vis spectroscopy, electron microscopy, differential thermal analysis (DTA), and Seebeck coefficient measurements, etc). Overall, this project demonstrated the feasibility of boride-based thermoelectric materials as durable high-temperature thermocouples, providing a promising pathway toward robust temperature sensing technologies aligned with DOE energy infrastructure and extreme-environment monitoring needs.
Beta-Ga2O3 has emerged as a leading candidate for next-generation power electronics, radio frequency (RF) switches, and extreme environment electronics due to a wide band gap (4.6 - 4.9 eV), high dopability (approximately 40 meV activation energy for an isolated silicon donor), and melt growth characteristics resulting in commercially available 4-inch substrates and commercial demonstrations of 6-inch substrates by multiple techniques. The (100) surface of Ga2O3 is highly desirable from a device and epitaxy standpoint - bulk growth of (100) material is more scalable than (010), the surface is nearly lattice-matched to p-type partner NiO, and Al2O3 incorporates at higher concentrations without phase separation. However, the epitaxial growth rate on (100) surfaces is less than 10% of other faces due to weak bonding and favorable desorption. Recent demonstrations have shown growth rate improvements from 0.4 nm/min to 1.5 nm/min by growing on (100) wafers that are offcut 6 degrees in the -c direction.1 These films show step-flow growth from (-201) step-edges and high electron mobility. Despite these exciting results, offcuts greater than 6 degrees have not been explored due to the waste associated with grinding and polishing large offcuts. In this talk we will discuss the molecular beam epitaxy (MBE) growth and properties of Beta-Ga2O3 grown on (100) substrates offcut in the -c direction up to 13.4 degrees. These large offcuts are enabled by edge-fed film-defined growth (EFG) where the offcut is grown into the surface by pulling the crystal through the EFG die with the seed crystal rotated by the desired offcut angle. We will demonstrate that 13.4 degrees offcut substrates still exhibit a terraced (100) surface, and that a >10x increase (4.8 nm/min) in growth rate is achieved. As previously reported on lower offcuts, we observe 100% reversal of substrate twin domains around the (001) direction at the substrate-epilayer interface. We will discuss electrical properties including record-low (by MBE) unintentional doping densities of < 5E15 cm-3.
Ga 2 O 3 and In 2 O 3 are vital semiconductors with current and future electronic device applications. Here, we study the alloying of In 2 O 3 and Ga 2 O 3 (IGO) and the associated changes in structure, morphology, band gap, and electrical transport properties. Undoped films of IGO were deposited on sapphire substrates with varying indium (In) percentage from zero to 100% by metal-organic chemical vapor deposition (MOCVD). Some films were annealed in H 2 to induce electrical conductivity. The measurements showed the optical band gap decreased by adding In; this was confirmed by density functional (DFT) calculations, which revealed that the nature of the valence band maximum and conduction band minimum strongly relate to the chemistry and that the band gap drops by adding In. The as-grown films were highly resistive except for pure In 2 O 3 , which possesses p-type conductivity, likely arising from In vacancy-related acceptor states. N-type conductivity was induced in all films after H-anneal. DFT calculations revealed that the presence of In decreases the electron effective mass, which is consistent with the electrical transport measurements that showed higher electron mobility for higher In percentage. The work revealed the successful band gap engineering of IGO and the modification of its band structure while maintaining high-quality films by MOCVD.
Beta-Ga2O3 has emerged as a leading candidate for next-generation power electronics, radio frequency (RF) switches, and extreme environment electronics due to a wide band gap (4.6 - 4.9 eV), high dopability (approximately 40 meV activation energy for an isolated silicon donor), and melt growth characteristics resulting in commercially available 4-inch substrates and commercial demonstrations of 6-inch substrates by multiple techniques. The (100) surface of Ga2O3 is highly desirable from a device and epitaxy standpoint - bulk growth of (100) material is more scalable than (010), the surface is nearly lattice-matched to p-type partner NiO, and Al2O3 incorporates at higher concentrations without phase separation. More importantly, the impact ionization coefficients along the [100] direction are low, leading to the highest possible critical fields. This is advantageous compared to the current state of the art, (001), due to reduced surface defects and increased possible breakdown voltage. However, the epitaxial growth rate on (100) surfaces is less than 10% of other faces due to weak bonding and favorable desorption, and on-axis (100) growth easily forms twin domains. Recent demonstrations have shown growth rate improvements from 0.4 nm/min to 1.5 nm/min by growing on (100) wafers that are offcut 6 degrees in the -c direction. These films show step-flow growth from (20-1) step-edges and high electron mobility due to suppressed twins. Despite these exciting results, offcuts greater than 6 degrees have not been explored due to the waste associated with grinding and polishing large offcuts. In this talk we will discuss the molecular beam epitaxy (MBE) growth and properties of Beta-Ga2O3 grown on (100) substrates offcut in the -c direction up to 13.4 degrees. These large offcuts are enabled by edge-fed film-defined growth (EFG) where the offcut is grown into the surface by pulling the crystal through the EFG die with the seed crystal rotated by the desired offcut angle. We will demonstrate that 13.4 degrees offcut substrates still exhibit a terraced (100) surface, and that a >10x increase (>5 nm/min) in growth rate is achieved. As previously reported on lower offcuts, we observe reversal of substrate twin domains around the (001) direction at the substrate-epilayer interface. We will discuss electrical properties including record-low (by MBE) unintentional doping densities of < 5E15 cm-3 and critical breakdown field in Schottky barrier diodes comparable with state-of-the-art (001) Ga2O3 without edge termination.