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An overview of the 2020 single event effects FPGA effort performed by the NASA Electronic Parts and Packaging Group is presented. Information includes Heavy-ion data for the following FPGA devices: Xilinx Kintex-UltraScale and Microsemi PolarFire. Future work is presented.
Capabilities for controlled formation of sophisticated 3D micro/nanostructures in advanced materials have foundational implications across a broad range of fields. Recently developed methods use stress release in prestrained elastomeric substrates as a driving force for assembling 3D structures and functional microdevices from 2D precursors. A limitation of this approach is that releasing these structures from their substrate returns them to their original 2D layouts due to the elastic recovery of the constituent materials. Here, a concept in which shape memory polymers serve as a means to achieve freestanding 3D architectures from the same basic approach is introduced, with demonstrated ability to realize lateral dimensions, characteristic feature sizes, and thicknesses as small as ≈500, 10, and 5 µm simultaneously, and the potential to scale to much larger or smaller dimensions. Wireless electronic devices illustrate the capacity to integrate other materials and functional components into these 3D frameworks. Quantitative mechanics modeling and experimental measurements illustrate not only shape fixation but also capabilities that allow for structure recovery and shape programmability, as a form of 4D structural control. These ideas provide opportunities in fields ranging from micro-electromechanical systems and microrobotics, to smart intravascular stents, tissue scaffolds, and others.
Space applications are complex systems that require intricate trade analyses for optimum implementations. We focus on a subset of the trade process, using classical reliability theory and SEU data, to illustrate appropriate TMR scheme selection.
A solid-state variable resistance device (10) whose resistance can be repeatedly altered by a control signal over a wide range, and which will remain stable after the signal is removed, is formed on an insulated layer (14), supported on a substrate (12) and comprises a set of electrodes (16a, 16b) connected by a layer (18) of material, which changes from an insulator to a conductor upon the injection of ions, covered by a layer (22) of material with insulating properties which permit the passage of ions, overlaid by an ion donor material (20). The ion donor material is overlaid by an insulating layer (24) upon which is deposited a control gate (26) located above the contacts. In a preferred embodiment, the variable resistance material comprises WO.sub.3, the ion donor layer comprises Cr.sub.2 O.sub.3, and the layers sandwiching the ion donor layer comprise silicon monoxide. When a voltage is applied to the gate, the resistance between the electrode contacts changes, decreasing with positive voltage and increasing with negative voltage.
A self-contained power controller having a power driver switch, programmable controller, communication port, and environmental parameter measuring device coupled to a controllable device. The self-contained power controller needs only a single voltage source to power discrete devices, analog devices, and the controlled device. The programmable controller has a run mode which, when selected, upon the occurrence of a trigger event changes the state of a power driver switch and wherein the power driver switch is maintained by the programmable controller at the same state until the occurrence of a second event.
Motivation for this work is: (1) Accurately characterize digital signal processor (DSP) core single-event effect (SEE) behavior (2) Test DSP cores across a large frequency range and across various input conditions (3) Isolate SEE analysis to DSP cores alone (4) Interpret SEE analysis in terms of single-event upsets (SEUs) and single-event transients (SETs) (5) Provide flight missions with accurate estimate of DSP core error rates and error signatures.
An overview of the 2020 single event effects FPGA effort performed by the NASA Electronic Parts and Packaging Group is presented. Information includes Heavy-ion data for the following FPGA devices: Xilinx Kintex-UltraScale and Microsemi PolarFire. Future work is presented.
This column will be provided each quarter as a source for reliability, radiation results, NASA capabilities, and other information on programmable logic devices and related applications. This quarter will continue a series of notes concentrating on analysis techniques with this issue's section discussing: Digital Timing Analysis Tools and Techniques. Articles in this issue include: SX and SX-A Series Devices Power Sequencing; JTAG and SXISX-AISX-S Series Devices; Analysis Techniques (i.e., notes on digital timing analysis tools and techniques); Status of the Radiation Hard reconfigurable Field Programmable Gate Array Program, Input Transition Times; Apollo Guidance Computer Logic Study; RT54SX32S Prototype Data Sets; A54SX32A - 0.22 micron/UMC Test Results; Ramtron FM1608 FRAM; and Analysis of VHDL Code and Synthesizer Output.
We propose an ultra-compact multimode interference (MMI) power splitter based on nonlinear effects from simulations using nonlinear modal propagation analysis (NMPA) cooperation with finite difference Method (FDM) to access free choice of splitting ratio. Conventional multimode interference power splitter could only obtain a few discrete ratios. The power splitting ratio may be adjusted continuously while the input set power is varying by a tunable laser. In fact, using an ultra- compact MMI with a simple structure that is launched by a tunable nonlinear input fulfills the problem of arbitrary-ratio in integrated photonics circuits. Silicon on insulator (SOI) is used as the offered material due to the high contrast refractive index and Centro symmetric properties. The high-resolution images at the end of the multimode waveguide in the simulated power splitter have a high power balance, whereas access to a free choice of splitting ratio is not possible under the linear regime in the proposed length range except changes in the dimension for any ratio. The compact dimensions and ideal performance of the device are established according to optimized parameters. The proposed regime can be extended to the design of M×N arbitrary power splitters ratio for programmable logic devices in all optical digital signal processing. The results of this study indicate that nonlinear modal propagation analysis solves the miniaturization problem for all-optical devices based on MMI couplers to achieve multiple functions in a compact planar integrated circuit and also overcomes the limitations of previously proposed methods for nonlinear MMI.
The main objective of this project is to invent the necessary enabling technologies for high throughput atomically precise manufacturing (APM). APM is an emerging technology that refers to any manufacturing capability that enables fabrication of atomically precise structures, components, and devices under programmable control. APM will require positional assembly at the atomic and/or molecular scale, as well as at the nano and microscales using hierarchical assembly to create products ranging from nanoscale and quantum devices to macroscale systems and materials. This project builds on the expectation that commercial viability of APM will depend on a high level of parallelism to achieve the required throughput, a capability that currently does not exist. This project is the first attempt to address this key technological bottleneck.
HPC systems now exploit GPUs within their compute nodes to accelerate program performance. As a result, high-end application development has become extremely complex at the node level. In addition to restructuring the node code to exploit the cores and specialized devices, the programmer may need to choose a programming model such as OpenMP or CPU threads in conjunction with an accelerator programming model to share and manage the different node resources. This comes at a time when programmer productivity and the ability to produce portable code has been recognized as a major concern. In order to offset the high development cost of creating CUDA or OpenCL kernels, directives have been proposed for programming accelerator devices, but their implications are not well known. In this paper, we evaluate the state of the art accelerator directives to program several applications kernels, explore transformations to achieve good performance, and examine the expressivity and performance penalty of using high-level directives versus CUDA. We also compare our results to OpenMP implementations to understand the benefits of running the kernels in the accelerator versus CPU cores.
HPC systems now exploit GPUs within their compute nodes to accelerate program performance. As a result, high-end application development has become extremely complex at the node level. In addition to restructuring the node code to exploit the cores and specialized devices, the programmer may need to choose a programming model such as OpenMP or CPU threads in conjunction with an accelerator programming model to share and manage the difference node resources. This comes at a time when programmer productivity and the ability to produce portable code has been recognized as a major concern. In order to offset the high development cost of creating CUDA or OpenCL kernels, directives have been proposed for programming accelerator devices, but their implications are not well known. In this paper, we evaluate the state of the art accelerator directives to program several applications kernels, explore transformations to achieve good performance, and examine the expressiveness and performance penalty of using high-level directives versus CUDA. We also compare our results to OpenMP implementations to understand the benefits of running the kernels in the accelerator versus CPU cores.
Integration of phase change material (PCM) with photonic integrated circuits can transform large-scale photonic systems by providing non-volatile control over phase and amplitude. The next generation of commercial silicon photonic processes can benefit from the addition of PCM to enable ultra-low power, highly reconfigurable, and compact photonic integrated circuits for large-scale applications. Despite all the advantages of PCM-based photonics, today’s commercial foundries do not provide them in their silicon photonic processes yet. We demonstrate the first-ever electrically programmable PCM device that is monolithically post-processed in a commercial foundry silicon photonics process using a few fabrication steps and coarse-resolution photolithography. These devices achieved 1.4 dB/μm of amplitude switching contrast using a thin layer of 12.5 nm GeSbTe in this work. We have also characterized the reconfiguration speed as well as repeatability of these devices over 20,000 switching cycles. Our solution enables non-volatile photonic VLSI systems that can be fabricated at low cost and high reliability in a commercial foundry process, paving the way for the development of non-volatile programmable photonic integrated circuits for a variety of emerging applications.
A computer-controlled binocular vision testing device has been developed as one part of a system designed for NASA to test the vision of astronauts during spaceflight. The device, called the Mark III Haploscope, utilizes semi-automated psychophysical test procedures to measure visual acuity, stereopsis, phorias, fixation disparity and accommodation/convergence relationships. All tests are self-administered, yield quantitative data and may be used repeatedly without subject memorization. Future applications of this programmable, compact device include its use as a clinical instrument to perform routine eye examinations or vision screening, and as a research tool to examine the effects of environment or work-cycle upon visual function.
A prototype Output Data Formatter (ODF) for the ESTAR (Electronically Scanned Thinned Array Radiometer) instrument has been designed and tested. It employs programmable logic devices to format and tag correlator data for transmission to Earth. After accepting 170 bits or correlator and error data in parallel, it appends an identification word and then serially passes the data to the Small Explorer Data System (SEDS) for transmission at a maximum rate of greater than 15 Mb/sec. Implemented with two reprogrammable field programmable gate arrays (FPGA's), each contained in a 132-pin plastic pin grid array (PGA) package, the design is cascadeable, fully testable, and low-power.
Hybridizing superconductivity with topology and magnetism attracts growing interest in condensed matter physics. Here, we present our findings on the measurement of supercurrent induced in an intrinsic antiferromagnetic topological insulator MnBi 2 Te 4 . By constructing a MnBi 2 Te 4 proximity Josephson junction, we observed an anomalously large period of the Fraunhofer patterns, indicating a strong Josephson coupling state. As the MnBi 2 Te 4 thickness is reduced, a distinct asymmetric edge supercurrent emerges, aligning consistently with the observed oscillatory junction magnetoresistance. Leveraging this large asymmetric edge supercurrent, we have realized a nonvolatile Josephson diode device with programmable polarity, achieved through training with an out-of-plane magnetic field. Theoretical calculations substantiate that these behaviors are attributed to the interference between the highly asymmetric topological edge channel–mediated supercurrent induced in MnBi 2 Te 4 . Our study establishes this system as a promising avenue for investigating topological superconductivity, chiral Majorana edge modes, and advanced functionality device applications.
A wide-frequency range (50–300 kHz) power system has been implemented for use with a new RF antenna – the “Shoelace” antenna – built to drive coherent plasma fluctuations in the edge of the Alcator C-Mod tokamak. A custom, dynamically tunable matching network allows two commercial 1 kW, 50-Ω RF amplifiers to drive the low-impedance, inductive load presented by the antenna. This is accomplished by a discretely variable L-match network, with 81 independently selected steps available for each of the series and parallel legs of the matching configuration. A compact programmable logic device provides a control system that measures the frequency with better than 1 kHz accuracy and transitions to the correct tuning state in less than 1 ms. At least 85% of source power is dissipated in the antenna across the operational frequency range, with a minimum frequency slew rate of 1 MHz/s; the best performance is achieved in the narrower band from 80 to 150 kHz which is of interest in typical experiments. The RF frequency can be run with open-loop control, following a pre-programmed analog waveform, or phase-locked to track a plasma fluctuation diagnostic signal in real time with programmable phase delay; the amplitude control is always open-loop. The control waveforms and phase delay are programmed remotely. These tools have enabled first-of-a-kind measurements of the tokamak edge plasma system response in the frequency range and at the wave number at which coherent fluctuations regulate heat and particle transport through the plasma boundary.
The Bouligand structure, renowned for its helicoidal arrangement and enhanced mechanical properties, has attracted significant research interest for its ability to impart enhanced strength to intrinsically soft materials. Biomimetic approaches have centered on fibrous structures in bulk materials, but translating this architecture into thin-film regime for miniaturized-wearable devices with programmable functions remains challenging. Here, we direct the self-assembly of cholesteric liquid crystals (CLCs) into hierarchical helical structures using chemically patterned surfaces. Alternating surface anchoring regions align uniform lying-down helices at the nanoscale, guiding a secondary microscale helical structure exhibiting both left- and right-handed twists. This mimetic Bouligand structure in CLCs enables optical modulation under applied field and strain with enhanced mechanical response. Simulations reveal the structural evolution from initial Bouligand configuration in LC layers to alternating twist helices. This research provides a basis for designing and manufacturing miniaturized or wearable devices with nanometer-scale precision in regulating electro-optical and mechanical properties. Bouligand structures, which offer strength in natural materials, are of interest but difficult to obtain. Here, the authors report the development of such structures by directed self-assembly of cholesteric single crystals into hierarchical helical structures, with the secondary structure having right and left-handed twists.