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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.
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The market share of silicon heterojunction (SHJ) modules are expected to increase in the following years. The presentation discusses field performance of SHJ and compares it to other high-efficiency modules. In-depth materials characterization is used to understand the origins of degradation in these type of modules.
This case study investigates mono-crystalline silicon modules from underperforming portions of a utility-scale photovoltaic power plant. Field-collected I-V curves and electroluminescence imaging suggested that increased series resistance was a primary factor driving module degradation. Selected modules were removed from the field for further analysis, including incremental damp heat accelerated testing, which confirmed a progression in series resistance degradation. Two distinct cell degradation behaviors became apparent during the investigation. Cross-sectional scanning electron microscopy (with elemental analysis) and scanning spreading resistance microscopy identified key differences between the two degradation mechanisms, primarily grid finger width and contact resistance. Additionally, the study highlights the reliability implications of retest requirements in International Electrotechnical Commission 61215 for material changes and how they may have mitigated the degradation observed at this site.
Reducing silicon usage by adopting thinner wafers can significantly reduce capital expenditure (capex) and cost, and thus accelerate the growth of manufacturing capacity and deployment. In this work, we evaluated potential benefits of thin Si wafers for current and future PV modules. We apply a technoeconomic framework that couples bottom-up cost model, and a cash-flow growth model to analyze PV modules with thin wafers. First, we show that, comparing the current PERC with 160 um thick wafers to the high-efficiency concept with 50 um thin wafers, the capex is reduced from 0.39 to 0.2 $/(W/year) while the cost is from 0.32 to 0.2 $/W. Second, the potential of accelerated deployment is analyzed for the highefficiency thin wafer concept. We found the significant advantages of higher growth rate (~20% relative) and higher deployment plateau (~3 times) than the current PERC modules. modules with thin wafers. First, we show that, comparing the current PERC with 160 um thick wafers to the high-efficiency concept with 50 um thin wafers, the capex is reduced from 0.39 to 0.2 $/(W/year) while the cost is from 0.32 to 0.2 $/W. Second, the potential of accelerated deployment is analyzed for the highefficiency thin wafer concept. We found the significant advantages of higher growth rate (~20% relative) and higher deployment plateau (~3 times) than the current PERC modules.
We report on the bulk properties of of n- and p- type Czochralski silicon (Cz-Si) after a high-temperature annealing process known as Tabula Rasa (TR), which is primarily used to annihilate oxygen precipitates. We find significant differences in n- and p-type substrates as well as a strong dependence on the ambient in the resulting process induced degradation. We attribute this ambient dependence to either injection of interstitials or vacancies into the bulk during TR. Finally, we show that subsequent gettering is enhanced due to the annihilation of oxygen precipitates.
In this contribution, we report on the charge-collection characteristics of silicon photovoltaic devices using passivated contacts based on the c-Si/SiO x /poly-Si structure. Using electron-beam induced current (EBIC) imaging in plan-view and cross-section orientations, we find that charge collection in a device with a 1.5-nm-thick SiO x layer is fairly uniform in the p-n junction region and does not appear to be influenced by pyramidal surface texture. In contrast, a device with a 2.2-nm-thick oxide layer shows significant spatial variation in the charge-collection signal. The apexes of the pyramids exhibit reduced EBIC signal whereas the valleys between adjacent pyramids show the strongest collection. Our results indicate that charge collection in c-Si/SiO x /poly-Si structures can be influenced by both the properties of the SiO x layer and surface texture.
This paper examines the impacts of design, operational, and end-of-life (EOL) waste pathways’ parameters on material circularity in silicon solar photovoltaic (PV) modules. Dynamic material flow analysis (DMFA) quantifies time-series material flows through systems’ life cycle stages to identify hotspots of waste generation, estimate resource needs in the future, and guide sustainable material management. We introduce a DMFA framework based on U.S. electricity demand for the period 2000-2100 to assess stocks and flows of bulk PV materials (i.e., solar glass and aluminum frames). We apply the model to a range of scenarios to understand how material demands depend on selected PV-related parameters, different material circularity strategies, and recent module design trends (e.g., bifacials, large-format-high power modules). Our results enable advanced planning for future materials needs and provide insight into potential opportunities to minimize material waste.
We present a physics-based simulation environment for the prediction of potential-induced-degradation (PID) failure time in silicon solar modules. Our model is based on experimental sodium migration kinetics obtained from our recently developed trap-corrected bias-stress-temperature method and from secondary ion mass spectrometry measurements. Furthermore, we model sodium migration to stacking faults and subsequent formation of conductive pathways through the p-n junction, which causes a decrease of the shunt resistance and loss of efficiency.
Epitaxial growth on silicon remains the most promising method to reduce the cost of optoelectronic-quality III-V semiconductors. Several approaches exist to epitaxially grow III-V material from the vapor phase, but control of 3-D structures remains difficult with these methods. In this work, we present a novel epitaxial growth technique in which photolithography and wet etching are used to establish the geometry of group-III metal, which is then converted to III-V semiconductor by annealing with exposure group-V precursor. The resulting material has been shown to align to the substrate lattice and is optically active, making it a promising approach for III-V PV technologies.
The open-circuit voltage of Silicon Heterojunction (HJ) cells can be improved by using extrinsic hydrogen plasma treatment (HPT) to reduce the trap states (NT) which we have verified using Deep Level Transient Spectroscopy (DLTS). However, hydrogen has been associated with long-term degradation. We have investigated the stability of HJ cells with and without HPT using accelerated degradation (1-sun illumination, 90 degrees C temperature, argon ambient for 1000 hours). The stability has been studied using DLTS, current-voltage, and Suns-Voc. Our results show HPT cells are stable and maintain their higher Voc and lower NT after accelerated degradation.
In this work, we examine the use of high-order tensor decompositions to analyze degradation pathways emerging from accelerated stress testing of silicon photovoltaic (PV) modules. Matrix-based decompositions are powerful tools for studying two-dimensional data arrays and form the foundation of a host of classical data analysis techniques. Tensors are high-order extrapolations of matrices that are able to account for more parameter dimensions, and a variety of tensor decomposition methods have been developed that similarly seek to extend insights from matrix decompositions to higher dimensions. Applying and interpreting tensor decomposition methods to sequences of PV module image data, we seek to uncover and isolate different degradation modes occurring from accelerated stress testing procedures. Further, we consider the contributions of different modes to PV module performance degradations.
Silicon carbide (SiC) MOSFET has many superior characteristics in high power applications. Paralleling the SiC devices is an effective approach to increase the current capacity of the system, which also leads to current sharing issues. In this article, both transient and steady-state current sharing issues are studied for the high-power grid-tied inverters with paralleled SiC modules with an effective current balancing strategy proposed to address both issues simultaneously. The steady-state imbalance current due to the parameter mismatch is suppressed by the self-inductance of power cables used for paralleling connection. With the elimination of steady-state imbalance current, the transient imbalance current sensing is much simplified and can be realized by using low-cost current sensors. With the sensed imbalance current, a closed-loop control approach is proposed to adjust the modulation reference signal for each module to mitigate the remaining transient imbalance current. Furthermore, the proposed method is straightforward to implement with enhanced compatibility and flexibility compared to existing methods. Experimental studies are performed using inverters with 2 and 4 power modules paralleled in each phase to demonstrate the effectiveness of the proposed method.
Heavy ion, focused x-ray, and pulsed laser single event transient experiments are performed on a silicon epitaxial diode. Collected charge, transient rise times, and transient fall times are calculated and compared between the different sources. It is observed that these transient shape characteristics depend on the source (ion, x-ray, or laser), even when similar amounts of charge are generated. Finally, the observed differences are examined and explained in terms of basic charge collection mechanisms.
We present the first results of a custom low-noise silicon photodiode detector designed for use with X-ray capillary optics. This system is intended to perform as a smaller, lighter, and low-powered alternative to currently existing X-ray telescope technologies. The detector has an active area with a diameter of 100 μm, and its small size leads to a low capacitance of well under 1 pF and a leakage current of 1 pA or less at the depletion voltage. We tested the detector with both a discrete preamp and an ultralow-noise front-end application-specific integrated circuit (ASIC). The front-end ASIC, developed at Brookhaven National Laboratory, was designed for low-capacitance detectors but had not been previously tested with a detector. Here, we discuss the detector design, the experimental setup, and the resulting detector performance. Using radioactive laboratory sources, we measure a full-width at half-maximum (FWHM) of 211 ± 8 eV at 5.9 keV with the ASIC and are able to set the threshold as low as 0.6 keV.
Here, integrated silicon microwave pin diodes are exposed to 10-keV X-rays up to a dose of 2 Mrad(SiO 2 ) and 14-MeV fast neutrons up to a fluence of 2.2×10 13 cm -2 . Changes in both DC leakage current and small-signal circuit components are examined. Degradation in performance due to total-ionizing dose is shown to be suppressed by non-quasi-static effects during RF operation. Tolerance to displacement damage from fast neutrons is also observed, which is explained using TCAD simulations. Overall, the characterized pin diodes are tolerant to cumulative radiation at levels consistent with space applications such as geosynchronous weather satellites.
A majority of the silicon photomultipliers (SiPMs) are sensitive to blue and near-ultraviolet (NUV) photons that are not optimized for scintillators with the emission maximum at wavelengths longer than 500 nm. The red–green–blue (RGB) SiPM is developed for the maximum photon detection efficiency (PDE) at 550 nm, which is a good match for some high-light-yield scintillators, such as CsI:Tl (CsI) and Gd 1.5 Y 1.5 Ga 2 Al 3 O 12 :Ce (GYGAG). Comparisons are made for the performance of these scintillators coupled to the RGB SiPM and a blue-sensitive SiPM. Because it takes tens of nanoseconds for the microcells to recharge after registering a photon hit, the linearity of these scintillation detectors was studied for high-energy gammas where numerous scintillation photons are generated. In addition, the energy resolution of the 662-keV gamma emitted by 137 Cs was measured for temperatures between –20 °C and 50 °C. The nonlinearity was observed above 1 MeV for all measurements, and however, it can be corrected by energy calibration using a third-degree polynomial. For CsI, the energy resolution is better with the blue-sensitive SiPM because of the lower dark count rate (DCR). In contrast, GYGAG coupled to the RGB SiPM has a better energy resolution for temperatures below 30 °C because of the well-matched emission spectrum and PDE distribution. Nevertheless, the advantage disappears for temperatures above 30 °C due to the higher DCR. It would be useful to further develop the RGB SiPM with a lower DCR and higher operating temperatures.
In this work, spatially resolved characterization methods are used to identify loss mechanisms for common p -type silicon solar cell architectures, including multicrystalline aluminum back surface field (Al-BSF), monocrystalline Al-BSF, monocrystalline passivated emitter and rear cells (PERC), and bifacial monocrystalline PERC. The characterization methods used in this work include suns-V OC , photoluminescence imaging, and spatially resolved external quantum efficiency and reflectance measurements. The optical and recombination losses are driven by the material properties, cell processing conditions, and device architecture. These losses are quantified and categorized in terms of underlying mechanisms (e.g., front reflectance, escape reflectance, front recombination, and parasitic optical absorption and recombination in the bulk and rear). The ability to create images of these loss parameters can be used to gain more insight into the materials and manufacturing processes used to produce solar cells, and examples are given in this work to illustrate how these images can help reveal the origin of defects.
The objective of this study is to complete a life cycle assessment (LCA) of a novel technology that separates the crystalline silicon (c-Si) photovoltaic (PV) module front glass from the backsheet using hot knife technology. This is known to be the most challenging step in module recycling, where the choice of delamination approach can determine the process selection for the next steps of the recycling process, the economic value of the recovered materials, and environmental performance. The life cycle inventory (LCI) reported here is based on primary data from the technology manufacturer. Different LCIs are established following the cut-off approach and the end-of-life (EOL) approach. The environmental impacts of the hot knife delamination process are analysed based on six indicators, and the main contributors to delamination efforts are identified. For the EOL approach, the potential environmental benefits from the recovered materials are compared to the environmental impacts caused by the delamination process. The functional unit of this analysis is the delamination of 1 kg of used framed c-Si PV modules at the place of installation.
This aims of this project were to develop low-cost screen-printable Ag|Cu metallization, as alternative to Ag paste, for contacting PERC solar cells with transparent emitter for high performance and reliability. The intended goal was to achieve 81% fill factor with a screen-printable Ag|Cu paste alternative. This was attempted through a three strand approach including Ag|Cu formulation by SVMT, production using cavitation technology by ACI and contact formation through the understanding of (i) the liquid phase sintering of the nano/macro particles of Ag|Cu to achieve bulk metal with very low series resistance, (ii) optimization of contact firing to avoid penetration of Cu into the silicon bulk, and finally (iii) proper analysis to quantify the contributions of each resistance component and keep the total series resistance at 0.2 Ω-cm2, which would result in high fill factor of 81% by UNC Charlotte. The objectives also involved i) the implementation of glass frit with Cu metal that will etch through the ARC for low contact resistance and adhesion, ii) development of Ag|Cu pastes with the optimized glass frit, iii) investigation of the impact of Cu particle size, morphology and loading on the gridline resistance, iv) narrow gridline screen designs along with narrow gridline prints, v) development of fast belt speeds of up to 375 inches per minute (ipm) sintering, and vi) stability study on Ag|Cu contact to high performance and reliability.