Engineering Papers⌕ Search

SEARCH · Engineering Papers

Results for “Memory systems”

Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

Quote a phrase for an exact phrase match. Source license links do not imply unrestricted reuse.

At least 631 records · Page 35
All sourcesNASA NTRSDOE OSTI
NASA NTRS2011

Nanoscale Deformable Optics

Several missions and instruments in the conceptual design phase rely on the technique of interferometry to create detectable fringe patterns. The intimate emplacement of reflective material upon electron device cells based upon chalcogenide material technology permits high-speed, predictable deformation of the reflective surface to a subnanometer or finer resolution with a very high degree of accuracy. In this innovation, a layer of reflective material is deposited upon a wafer containing (perhaps in the millions) chalcogenic memory cells with the reflective material becoming the front surface of a mirror and the chalcogenic material becoming a means of selectively deforming the mirror by the application of heat to the chalcogenic material. By doing so, the mirror surface can deform anywhere from nil to nanometers in spots the size of a modern day memory cell, thereby permitting realtime tuning of mirror focus and reflectivity to mitigate aberrations caused elsewhere in the optical system. Modern foundry methods permit the design and manufacture of individual memory cells having an area of or equal to the Feature (F) size of the design (assume 65 nm). Fabrication rules and restraints generally require the instantiation of one memory cell to another no closer than 1.5 F, or, for this innovation, 90 nm from its neighbor in any direction. Chalcogenide is a semiconducting glass compound consisting of a combination of chalcogen ions, the ratios of which vary according to properties desired. It has been shown that the application of heat to cells of chalcogenic material cause a large alteration in resistance to the range of 4 orders of magnitude. It is this effect upon which chalcogenidebased commercial memories rely. Upon removal of the heat source, the chalcogenide rapidly cools and remains frozen in the excited state. It has also been shown that the chalcogenide expands in volume because of the applied heat, meaning that the coefficient of expansion of chalcogenic materials is larger than 1. In this innovation, chalcogenidebased cells are addressed (as though they are a memory), and heated and cooled according to well-established criteria. In doing so, the exact size of chalcogenide cell deformation is known and predictable; therefore, the deformation of the reflective surface is, likewise, known and predictable. Control electronics can also be implemented so that a closed-loop feedback can be maintained. Changing the contents of the chalcogenide memory cells can compensate for any change in environmental effects that might cause a change in optical path. This real-time control provides significant control and stability in use conditions.

Strauss, Karl F.↗
NASA NTRS2006

Implementing Access to Data Distributed on Many Processors

A reference architecture is defined for an object-oriented implementation of domains, arrays, and distributions written in the programming language Chapel. This technology primarily addresses domains that contain arrays that have regular index sets with the low-level implementation details being beyond the scope of this discussion. What is defined is a complete set of object-oriented operators that allows one to perform data distributions for domain arrays involving regular arithmetic index sets. What is unique is that these operators allow for the arbitrary regions of the arrays to be fragmented and distributed across multiple processors with a single point of access giving the programmer the illusion that all the elements are collocated on a single processor. Today's massively parallel High Productivity Computing Systems (HPCS) are characterized by a modular structure, with a large number of processing and memory units connected by a high-speed network. Locality of access as well as load balancing are primary concerns in these systems that are typically used for high-performance scientific computation. Data distributions address these issues by providing a range of methods for spreading large data sets across the components of a system. Over the past two decades, many languages, systems, tools, and libraries have been developed for the support of distributions. Since the performance of data parallel applications is directly influenced by the distribution strategy, users often resort to low-level programming models that allow fine-tuning of the distribution aspects affecting performance, but, at the same time, are tedious and error-prone. This technology presents a reusable design of a data-distribution framework for data parallel high-performance applications. Distributions are a means to express locality in systems composed of large numbers of processor and memory components connected by a network. Since distributions have a great effect on the performance of applications, it is important that the distribution strategy is flexible, so its behavior can change depending on the needs of the application. At the same time, high productivity concerns require that the user be shielded from error-prone, tedious details such as communication and synchronization.

James, Mark↗
NASA NTRS1970

Research on variable threshold transistor storage systems

A fully integrated, electrically alterable, nonvolatile, nondestructive readout control memory was developed, using as storage elements metal-nitride-silicon variable threshold transistors. An optimum approach to such a memory was developed in which a three dimensional selection technique was used, both for read and write operations. Electrical isolation of writing and memory circuits was obtained by means of separate memory and write circuit chips. This method provided protection from voltage breakdowns, increased circuit flexibility, and greater ease of testing of interim and final circuit elements.

Wegener, H. A. R.↗
NASA NTRS1969

ELAS: A general-purpose computer program for the equilibrium problems of linear structures. Volume 2: Documentation of the program

A general purpose digital computer program for the in-core solution of linear equilibrium problems of structural mechanics is documented. The program requires minimum input for the description of the problem. The solution is obtained by means of the displacement method and the finite element technique. Almost any geometry and structure may be handled because of the availability of linear, triangular, quadrilateral, tetrahedral, hexahedral, conical, triangular torus, and quadrilateral torus elements. The assumption of piecewise linear deflection distribution insures monotonic convergence of the deflections from the stiffer side with decreasing mesh size. The stresses are provided by the best-fit strain tensors in the least squares at the mesh points where the deflections are given. The selection of local coordinate systems whenever necessary is automatic. The core memory is used by means of dynamic memory allocation, an optional mesh-point relabelling scheme and imposition of the boundary conditions during the assembly time.

Utku, S.↗
NASA NTRS1978

Automatic radio-transmission monitor

System continuously monitors radio transmissions stored in memory. If spectrum deviates beyond present limits, alarm is tripped and spectrum is transferred to long-term storage for later analysis. Monitor can be useful in ensuring proper power level and spectral quality and in finding cause of failure. It might also be used to monitor radio-frequency interference or power levels of citizen's-band transmitters.

Bernstein, A. J.↗
NASA NTRS1978

A cycle timer for testing electric vehicles

A cycle timer was developed to assist the driver of an electric vehicle in more accurately following and repeating SAE driving schedules. These schedules require operating an electric vehicle in a selected stop-and-go driving cycle and repeating this cycle pattern until the vehicle ceases to meet the requirements of the cycle. The heart of the system is a programmable read-only memory (PROM) that has the required test profiles permanently recorded on plug-in cards, one card for each different driving schedule. The PROM generates a direct current analog signal that drives a speedometer displayed on one scale of a dual movement meter. The second scale of the dual movement meter displays the actual speed of the vehicle as recorded by the fifth wheel. The vehicle operator controls vehicle speed to match the desired profile speed. The PROM controls the recycle start time as well as the buzzer activation. The cycle programmer is powered by the test vehicle's 12-volt accessory battery, through a 5-volt regulator and a 12-volt dc-to-dc converter.

Soltis, R. F.↗
NASA NTRS1980

DSS command software update

The modifications, additions, and testing results for a version of the Deep Space Station command software, generated for support of the Voyager Saturn encounter, are discussed. The software update requirements included efforts to: (1) recode portions of the software to permit recovery of approximately 2000 words of memory; (2) correct five Voyager Ground data System liens; (3) provide capability to automatically turn off the command processor assembly local printer during periods of low activity; and (4) correct anomalies existing in the software.

Stinnett, W. G.↗
NASA NTRS1985

Deviser - An AI planner for spacecraft operations

The 'Deviser III' automated spacecraft mission planner prototype can plan complete Voyager spacecraft operational sequences consisting of over 100 data capture goals, working 10-50 times faster than a human analyst. The planner generates a loop-free network of actions and events resembling a program evaluation and review technique chart. Actions, events, and inferences are the building blocks from which plans are assembled. It is noted that, for a very large spacecraft mission plan, the backtracking through remembered decision trees entailed by this artificial intelligence system can consume megabite quantities of computer memory.

Vere, S. A.↗
NASA NTRS1987

Energy-Saving RAM-Power Tap

Reverse-flow HEXFET(R) minimizes voltage drop and power dissipation. HEXFET(R) scheme reduces voltage drop by approximately 80 percent. Design for power tap for random-access memory (RAM) has potential application in digital systems.

Bruner, Alan Roy↗
NASA NTRS1990

Shared direct memory access on the Explorer 2-LX

Advances in Expert System technology and Artificial Intelligence have provided a framework for applying automated Intelligence to the solution of problems which were generally perceived as intractable using more classical approaches. As a result, hybrid architectures and parallel processing capability have become more common in computing environments. The Texas Instruments Explorer II-LX is an example of a machine which combines a symbolic processing environment, and a computationally oriented environment in a single chassis for integrated problem solutions. This user's manual is an attempt to make these capabilities more accessible to a wider range of engineers and programmers with problems well suited to solution in such an environment.

Musgrave, Jeffrey L.↗
NASA NTRS1995

Newton-Krylov-Schwarz: An implicit solver for CFD

Newton-Krylov methods and Krylov-Schwarz (domain decomposition) methods have begun to become established in computational fluid dynamics (CFD) over the past decade. The former employ a Krylov method inside of Newton's method in a Jacobian-free manner, through directional differencing. The latter employ an overlapping Schwarz domain decomposition to derive a preconditioner for the Krylov accelerator that relies primarily on local information, for data-parallel concurrency. They may be composed as Newton-Krylov-Schwarz (NKS) methods, which seem particularly well suited for solving nonlinear elliptic systems in high-latency, distributed-memory environments. We give a brief description of this family of algorithms, with an emphasis on domain decomposition iterative aspects. We then describe numerical simulations with Newton-Krylov-Schwarz methods on aerodynamics applications emphasizing comparisons with a standard defect-correction approach, subdomain preconditioner consistency, subdomain preconditioner quality, and the effect of a coarse grid.

Cai, Xiao-Chuan↗
NASA NTRS1996

Photonic Diagnostic Technique For Thin Photoactive Films

Photonic diagnostic technique developed for use in noninvasive, rapid evaluation of thin paraelectric/ferroelectric films. Method proves useful in basic research, on-line monitoring for quality control at any stage of fabrication, and development of novel optoelectronic systems. Used to predict imprint-prone memory cells, and to study time evolution of defects in ferroelectric memories during processing. Plays vital role in enabling high-density ferroelectric memory manufacturing. One potential application lies in use of photoresponse for nondestructive readout of polarization memory states in high-density, high-speed memory devices. In another application, extension of basic concept of method makes possible to develop specially tailored ferrocapacitor to act as programmable detector, wherein remanent polarization used to modulate photoresponse. Large arrays of such detectors useful in optoelectronic processing, computing, and communication.

Thakoor, Sarita↗
NASA NTRS1997

Poster Session

In this session, Poster Session, the discussion focuses on the following topics: Development of correlative measures for the assessment of attention and memory; Biodynamical Responses of the Crewmember Head/Neck System During Emergence Ejection; Fecundation in the Sky, a Ten Years Old Experiment in Microgravity; A Modified Botex Incubator as a Transport System For Developing Crickets into Space; Chromosomal Aberrations in Peripheral Lymphocytes of Cosmonauts and Astronauts after Space Flights; Method for Establishing Long term Bone Marrow; Cultures Under Microgravity Conditions Reproduction Under Simulated Weightlessness --Mammalian in vivo Experiments Under Suspension; Towards Human Movement Analysis Without the Use of Markers; Habitability Requirements For a Cogent Mars Mission; The Saucer Concept for Space Habitats; New Way In Modeling the Growth of the Organism; The Fractionation of Hydrogen and Oxygen Stable Isotopes By Life Support Systems of Space Station "MIR"; and Effect of Space Flight on Neutrophil Function.

Source record↗
NASA NTRS2006

Challenges and Progress in the Development of High-Temperature Shape Memory Alloys Based on NiTiX Compositions for High-Force Actuator Applications

Interest in high-temperature shape memory alloys (HTSMA) has been growing in the aerospace, automotive, process control, and energy industries. However, actual materials development has seriously lagged component design, with current commercial NiTi alloys severely limited in their temperature capability. Additions of Pd, Pt, Au, Hf, and Zr at levels greater than 10 at.% have been shown to increase the transformation temperature of NiTi alloys, but with few exceptions, the shape memory behavior (strain recovery) of these NiTiX systems has been determined only under stress free conditions. Given the limited amount of basic mechanical test data and general lack of information regarding the work attributes of these materials, a program to investigate the mechanical behavior of potential HTSMAs, with transformation temperatures between 100 and 500 C, was initiated. This paper summarizes the results of studies, focusing on both the practical temperature limitations for ternary TiNiPd and TiNiPt systems based on the work output of these alloys and the ability of these alloys to undergo repeated thermal cycling under load without significant permanent deformation or "walking". These issues are ultimately controlled by the detwinning stress of the martensite and resistance to dislocation slip of the individual martensite and austenite phases. Finally, general rules that govern the development of useful, high work output, next-generation HTSMA materials, based on the lessons learned in this work, will be provided

Padula, Santo, II↗
NASA NTRS2014

SpaceCube v2.0 Space Flight Hybrid Reconfigurable Data Processing System

This paper details the design architecture, design methodology, and the advantages of the SpaceCube v2.0 high performance data processing system for space applications. The purpose in building the SpaceCube v2.0 system is to create a superior high performance, reconfigurable, hybrid data processing system that can be used in a multitude of applications including those that require a radiation hardened and reliable solution. The SpaceCube v2.0 system leverages seven years of board design, avionics systems design, and space flight application experiences. This paper shows how SpaceCube v2.0 solves the increasing computing demands of space data processing applications that cannot be attained with a standalone processor approach.The main objective during the design stage is to find a good system balance between power, size, reliability, cost, and data processing capability. These design variables directly impact each other, and it is important to understand how to achieve a suitable balance. This paper will detail how these critical design factors were managed including the construction of an Engineering Model for an experiment on the International Space Station to test out design concepts. We will describe the designs for the processor card, power card, backplane, and a mission unique interface card. The mechanical design for the box will also be detailed since it is critical in meeting the stringent thermal and structural requirements imposed by the processing system. In addition, the mechanical design uses advanced thermal conduction techniques to solve the internal thermal challenges.The SpaceCube v2.0 processing system is based on an extended version of the 3U cPCI standard form factor where each card is 190mm x 100mm in size The typical power draw of the processor card is 8 to 10W and scales with application complexity. The SpaceCube v2.0 data processing card features two Xilinx Virtex-5 QV Field Programmable Gate Arrays (FPGA), eight memory modules, a monitor FPGA with analog monitoring, Ethernet, configurable interconnect to the Xilinx FPGAs including gigabit transceivers, and the necessary voltage regulation. The processor board uses a back-to-back design methodology for common parts that maximizes the board real estate available. This paper will show how to meet the IPC 6012B Class 3A standard with a 22-layer board that has two column grid array devices with 1.0mm pitch. All layout trades such as stack-up options, via selection, and FPGA signal breakout will be discussed with feature size results. The overall board design process will be discussed including parts selection, circuit design, proper signal termination, layout placement and route planning, signal integrity design and verification, and power integrity results. The radiation mitigation techniques will also be detailed including configuration scrubbing options, Xilinx circuit mitigation and FPGA functional monitoring, and memory protection.Finally, this paper will describe how this system is being used to solve the extreme challenges of a robotic satellite servicing mission where typical space-rated processors are not sufficient enough to meet the intensive data processing requirements. The SpaceCube v2.0 is the main payload control computer and is required to control critical subsystems such as autonomous rendezvous and docking using a suite of vision sensors and object avoidance when controlling two robotic arms.

Xilinx FPGA↗
NASA NTRS1990

Integrating Commercial Off-The-Shelf (COTS) graphics and extended memory packages with CLIPS

This paper addresses the question of how to mix CLIPS with graphics and how to overcome PC's memory limitations by using the extended memory available in the computer. By adding graphics and extended memory capabilities, CLIPS can be converted into a complete and powerful system development tool, on the other most economical and popular computer platform. New models of PCs have amazing processing capabilities and graphic resolutions that cannot be ignored and should be used to the fullest of their resources. CLIPS is a powerful expert system development tool, but it cannot be complete without the support of a graphics package needed to create user interfaces and general purpose graphics, or without enough memory to handle large knowledge bases. Now, a well known limitation on the PC's is the usage of real memory which limits CLIPS to use only 640 Kb of real memory, but now that problem can be solved by developing a version of CLIPS that uses extended memory. The user has access of up to 16 MB of memory on 80286 based computers and, practically, all the available memory (4 GB) on computers that use the 80386 processor. So if we give CLIPS a self-configuring graphics package that will automatically detect the graphics hardware and pointing device present in the computer, and we add the availability of the extended memory that exists in the computer (with no special hardware needed), the user will be able to create more powerful systems at a fraction of the cost and on the most popular, portable, and economic platform available such as the PC platform.

Callegari, Andres C.↗
NASA NTRS1995

Exploring the use of I/O nodes for computation in a MIMD multiprocessor

As parallel systems move into the production scientific-computing world, the emphasis will be on cost-effective solutions that provide high throughput for a mix of applications. Cost effective solutions demand that a system make effective use of all of its resources. Many MIMD multiprocessors today, however, distinguish between 'compute' and 'I/O' nodes, the latter having attached disks and being dedicated to running the file-system server. This static division of responsibilities simplifies system management but does not necessarily lead to the best performance in workloads that need a different balance of computation and I/O. Of course, computational processes sharing a node with a file-system service may receive less CPU time, network bandwidth, and memory bandwidth than they would on a computation-only node. In this paper we begin to examine this issue experimentally. We found that high performance I/O does not necessarily require substantial CPU time, leaving plenty of time for application computation. There were some complex file-system requests, however, which left little CPU time available to the application. (The impact on network and memory bandwidth still needs to be determined.) For applications (or users) that cannot tolerate an occasional interruption, we recommend that they continue to use only compute nodes. For tolerant applications needing more cycles than those provided by the compute nodes, we recommend that they take full advantage of both compute and I/O nodes for computation, and that operating systems should make this possible.

Kotz, David↗
NASA NTRS1980

Eight microprocessor-based instrument data systems in the Galileo Orbiter spacecraft

Instrument data systems consist of a microprocessor, 3K bytes of Read Only Memory and 3K bytes of Random Access Memory. It interfaces with the spacecraft data bus through an isolated user interface with a direct memory access bus adaptor, and/or parallel data from instrument devices such as registers, buffers, analog to digital converters, multiplexers, and solid state sensors. These data systems support the spacecraft hardware and software communication protocol, decode and process instrument commands, generate continuous instrument operating modes, control the instrument mechanisms, acquire, process, format, and output instrument science data.

Barry, R. C.↗