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At least 55 records · Page 3

Investigating the Role of Copper in Arsenic Doped CdSeTe Photovoltaic Devices

As part of NREL's development of arsenic doped CdSeTe devices, co-doping with copper has become a common practice and, despite little difference in carrier concentration (often ~1016 cm-3), co-doped devices regularly show improved Voc. Given the critical importance of improving Voc, we are investigating this trend with a wide variety of characterization techniques including SEM, EBSD, SIMS, PL, CL, XPS, TRPL, JVT, KPFM, and DLTS. Together these indicate that Cu facilitates improved absorber-buffer interface properties and potentially improved bulk absorber characteristics, though specific mechanisms have not yet been determined. Despite the improved performance of co-doped devices, Voc is still far below its potential, and we explore the possibility that this limitation is the result of low buffer doping in conjunction with high absorber doping.

arsenic doping↗

Robust passivation of CdSeTe based solar cells using reactively sputtered magnesium zinc oxide

Magnesium zinc oxide (MZO, Mg x Zn 1-x O) is a leading emitter for CdTe-based solar cells due to its transparency and the ability to tune its conduction band offset with the absorber. Devices employing alloyed cadmium selenide telluride (CST, CdSe y Te 1-y ) absorbers achieved high efficiency (>19%) using MZO deposited by reactive sputtering over a broad composition range (3.68–3.92 eV, x: 0.20–0.35). Minimal differences in implied and measured open circuit voltage indicate that the contacts are well passivated and highly selective across the spectrum of MZO employed. Device performance insensitivity to MZO composition, which is not observed in CdTe devices, is attributed to the formation of an oxygenated interface layer. Se volatility creates a group VI deficiency at the interface that drives O migration from the MZO into the absorber. This introduces conductivity in the emitter not present in its as-deposited state, contributing to the exceptional performance observed. It is shown that the quality of device passivation depends on the oxidation state of the as-deposited MZO such that intelligent control and management of the reactive sputtering process is required.

36 MATERIALS SCIENCE↗

Evidence of Buried Junctions in CdSeTe Absorbers

The introduction of selenium band gap gradients has been shown to be a promising path for improving CdTe devices. Controlling maximum selenium concentration during deposition should allow for better device performance. In this work cross-section electron beam induced current (EBIC) maps were measured for CdSeTe/CdTe devices with as-grown selenium concentration between 0 and 20 percent. Measured EBIC profiles show high collection in the middle of the absorber layer, which differs from past EBIC studies of CdSe/CdTe devices. Increasing as-deposited selenium concentrations resulted in increased collection at this mid-absorber location. Combined with a 2-dimensional numerical model, these results suggest a buried homo-junction in the absorber layer of the device. This buried junction may be associated with a number of composition dependent parameters including electron affinity and p-dopability. Understanding this collection profile and its implications for device performance may be key in optimizing CdSeTe/CdTe devices.

CdSeTe↗

Effect of Near-Interface Compensation of CdSeTe Absorber Layers on Solar Cell Performance

Arsenic has been shown to be an effective p-type dopant of CdTe. However, challenges remain in the fabrication of high efficiency CdTe solar cells using As. As-doped CdTe is prone to self-compensation and observed accumulation of dopant atoms in CdTe near the interface with MgZnO (MZO) suggests that this could be occurring. In this study, we use SCAPS 1-D modeling software to investigate the effect of near-interface compensation. We consider three cases: shallow donors, deep recombination centers, and a thin layer of excess positive charge accumulation. All of these cases are shown to have significant effects on the current-voltage characteristics, while the thin charge layer also affects capacitance-voltage measurements.

arsenic↗

Doping CdTe and CdSeTe for higher efficiency

Thin film cadmium telluride is one of the most successful photovoltaic technologies on the market today. Second only to silicon in yearly output and accounting for 40% of U.S. utility-scale photovoltaic installation, CdTe is known for its ease of manufacture, ideal bandgap, and low levelized cost of energy. Despite its commercial success, CdTe underperforms compared to its theoretical potential. The current world record CdTe device is only 21.0% compared to a theoretical maximum of 33.1%. This significant discrepancy in efficiencies can mostly be attributed to the poor open-circuit voltage of CdTe devices. Compared to silicon technologies, CdTe has a large voltage deficiency, exceeding 250 mV.

14 SOLAR ENERGY↗

Quantitative assessment of selenium diffusion and passivation in CdSeTe solar cells probed by spatially resolved cathodoluminescence

The introduction of selenium in CdSeTe/CdTe solar cells has led to improved device performances attributed to the passivation of bulk defects. In this work, high-resolution cathodoluminescence experiments are performed on a series of CdSeTe/CdTe thin films with different Se concentrations to quantify the mechanisms and the passivation role of Se. We demonstrate a universal dependence between the Se concentration and the radiative efficiency and a ten-fold enhancement of the luminescence between CdTe and CdSe 0.4 Te 0.6 . Raw luminescence maps are converted into maps of the Se concentration, revealing its graded profile within the stack. We demonstrate the diffusion of Se along CdTe grain boundaries induced by the cadmium chloride annealing treatment and determine the diffusion coefficients, which are more than eight times higher at grain boundaries than in grain interiors. These results provide microscopic insights into the distribution of Se and its impact on the passivation of CdSeTe/CdTe solar cells.

14 SOLAR ENERGY↗

CdSeTe solar-cell performance with different dopant types

Four doping conditions were explored for CdTe-based solar cells: p-type As and P, n-type Al, and no intentional doping. In each case, the CdTe absorber was alloyed with Se, but only near the normal front-side, light entry for the cells, while the dopants were added from the back. Cells with p-dopants showed efficiencies up to 20% with front-side illumination, but the n-doped and undoped ones were close to zero. With back-side illumination, this was reversed with undoped up to 8% and p-doped ones only about 2%. These results are explained by Kelvin-probe measurements of electric-field profiles, which showed that the diode field was near the front for the higher-efficiency p-doping, but near the back for undoped and n-doped.

14 SOLAR ENERGY↗

Pyrolyzer Assisted Vapor Transport Deposition of Antimony-Doped Cadmium Telluride

In this study, we developed a new method for in situ Sb doping of CdTe thin films combining vapor transport deposition with a Group V pyrolyzer to address Sb doping concentration and doping efficiency. The Sb doped CdSeTe (CdSeTe:Sb) films were deposited in solar cell structures under variations of Sb dopant source heater, vapor pyrolyzer temperature, and Cd vapor excess. Results indicate that although these parameters do not affect the CdTe morphology or crystal structure, they critically influence doping efficiency and trap concentration. Capacitance-voltage measurements show that a higher dopant heater (TD) or pyrolyzer (TP) temperature leads to higher net carrier concentration, achieving a net carrier concentration of 1016 cm-3 and 20% doping efficiency with a TD/TP combination of 600 degrees C/1100 degrees C. By tuning the Cd/Sb flux ratio during CdSeTe:Sb deposition, the lowest defect concentration is achieved at Cd/Sb of 1.4:1, which produced the best VOC CdSeTe:Sb cell. This demonstrates a path to produce high net carrier concentration polycrystalline CdTe thin film with a low concentration of dopant-induced defects.

14 SOLAR ENERGY↗

Diagnosing and overcoming recombination and resistive losses in non-silicon solar cells using a silicon-inspired characterization platform

This project aimed to generate the characterization tools needed for accurate and systematic loss analysis in non-silicon photovoltaic solar cell technologies and, through the use of these tools and analysis techniques, contribute to the development of a novel class of hetero-contacts to II-VI absorbers, with the final goal of demonstrating record-breaking CdSeTe devices. CdSeTe solar cells provide a prime example of the potential impact of the techniques we proposed to develop and implement: record poly-CdSeTe cells have bandgap-voltage deficits (W oc ) of approximately 550 mV, as compared with below 400 mV for all other mature PV technologies. Similarly, these record CdSeTe devices have FFs below 80%, when other mature cells are near or above 85%. Frustratingly, a systematic identification of the origin of these sub-par performances—for example recombination or resistive losses—has been lacking, thus slowing down the development of these technologies. Similarly, it is often asserted that CdSeTe cells need a better back (hole) contact. Although most believe this is true, no one knew—at the start of this project—how high the V oc and FF could be for a given cell if it had a perfect back contact. Such characterization techniques and loss analysis methods exist and are routinely performed on c-Si solar cells (e.g. injection-dependent lifetime, Suns-V oc , transfer length method, etc). Over the years, they have been instrumental in the development of silicon devices that operate at 91% of their theoretical (Auger) limit. Lifetime testing, and the associated reconstruction of the implied-J-V curve, can moreover be performed at every cell-processing step, thus allowing a direct peek into the impact of that step on cell performance. Therefore, adapting these techniques and tools to non-Si devices would greatly improve their learning rate. In this project, we developed a Suns-ERE technique—the equipment, methodology, and know-how—to measure the implied-J-V curve, the pseudo-J-V curve, and the actual J-V curve of a thin-film solar cell, allowing an accurate assessment of the quality of the bulk material and its surface passivation, the selectivity of the contact, and its resistivity. We used this technique to show that the absorber of present CdSeTe solar cells is capable of achieving 1 V Voc,, that passivation layers exist (e.g., Al2O3) that can support such high voltages, and that the barrier is identifying contact layers that are both passivating and carrier-selective. The characterization platform created in this project and the understanding generated using it will accelerate the progress of non-silicon PV technologies. In particular, the project will contribute to CdSeTe solar cells with Voc > 1 V and cell efficiency > 24%. Such cells provide a pathway to module-level efficiencies >23%. As CdSeTe presently competes with silicon on module cost (in $\$ $/W) and yet has significantly more room for efficiency gains, the potential for LCOE reduction is particularly large. For example, CdTe modules with an efficiency of 21% would allow an LCOE below $\$ $0.04kWh -1 in average US climates.

14 SOLAR ENERGY↗

CIGS Technology Advancement via Fundamental Modeling of Defect/Impurity Interactions (Final Technical Report)

The primary goals of the proposed work were to provide modeling tools (and the associated insight which comes along with model development) for design and optimization of CuIn x Ga 1-x Se 2 (CIGS) and CdSeTe (CST) solar cell manufacturing processes and to establish the foundation for comprehensive end-to-end predictive modeling tools to enable optimization of thin film photovoltaic technology for performance, cost, yield, and reliability. The initial focus of efforts within this project was to develop coupled process/optical/device models for CIGS PV technology and to work with Siva Power to apply that TCAD (technology computer-aided design) system to improve the efficiency and reduce manufacturing costs for CIGS solar cells. Our approach to that end was to generate an extensive database of DFT calculations and to use those calculations via statistical thermodynamics methods and Monte Carlo simulation to develop and characterize models for the behavior of native defects as well as intentional and unintentional impurities, including the redistribution of the primary components of CIGS films. Increased effort went toward coupling those models for defect behavior and composition evolution to the performance of multicrystalline CIGS solar cells via prediction of doping level and recombination lifetime as function of manufacturing process. In the second budget period, the project pivoted to developing a similar system for the CdSeTe system, focused especially on understanding the role of Se/Te alloy concentration. Execution of the project resulted in the successful development of TCAD systems for both CIGS and CdSeTe thin film PV within the Synopsys Sentaurus framework by utilizing the Alagator interface. In the first budget period of the project, we developed quantitative models for the major components of CIGS PV and implemented them within a framework that couples process, optical, and device simulation. From the insights we have gained, we identified novel opportunities for enhancing CIGS solar cell performance and have laid the groundwork to further optimize the layer structure, composition profile, and thermal cycles for substantially improved efficiency and lower manufacturing costs. For the CIGS system, process changes to achieve greater than 1% absolute enhancement in efficiency were identified, but testing of those approaches was stymied by lack of a domestic CIGS manufacturing partner after the closure of Siva Power as well as Miasole. For CdSeTe, a fully capable TCAD system only became ready to apply near the end of the project period, so substantial opportunities remain to apply those models to enhance the leading thin film PV technology.

14 SOLAR ENERGY↗

Antimony Chloride Treatments of CdTe-Based Solar Cells

Development of a new SbCl3-based solution treatment for chloride activation of CdTe-based solar cells is described. Activation was confirmed with CdSeTe:Sb devices exhibiting VOC > 550 mV and JSC > 25 mAcm-2. Treatment optimization showed strong effects of annealing time and temperature on cell properties. Material characterization indicated surface conversion of CdSeTe to CdCl2 and Sb2Te3 with SbCl3 treatment. However, no reaction products were formed with treatment under inert conditions, which was coupled with poor device performance. Drying the SbCl3 films at controlled humidity conditions confirmed that exposure to high relative humidity is critical for CdSeTe activation, through hydrolysis of SbCl3. Mechanistic details of SbCl3 speciation during hydrolysis and annealing to activate CdSeTe are discussed.

14 SOLAR ENERGY↗

Optimization of Annealing for WZ-Phase Removal and Densification in Sb-Doped CdSexTe1-x Solar Cells

The impact of high temperature annealing (HTA) treatments on the performance of Sb-doped CdSeTe solar cells containing a CdSe0.25Te0.75/CdTe front stack and a vapor transport (VT) deposited CdTe:Sb absorber was studied. The HTA treatment of the thermally evaporated CdSe0.25Te0.75/CdTe front stack converts the mixed-phase film into a single zinc blende structure through recrystallization of the photo-inactive wurtzite phase. Subsequently, HTA treatment of the full device stack after vapor transport deposition of CdTe:Sb absorber promotes Se-Te intermixing, reduces voids, densifies the full stack and enhances CdTe:Sb grain growth. Comprehensive characterizations revealed that the combined HTA treatments significantly improved film crystallinity, removed the WZ phase in the front stack, enhanced full-stack densification, reduced defect densities, and enhanced carrier dynamics. With HTA treatments, the open-circuit voltage (VOC) of CdSeTe:Sb devices increased from ~ 400 mV to >= 600 mV, and when combined with optimized CdCl2 treatment, VOC reached 849 mV. The net carrier concentrations (NA-ND) of representative devices were NA-ND = 1.5 x 10^15, 1.1 x 10^15, and 3.5 x 10^14 cm-3 for the no-HTA, moderate-HTA, and optimized high-VOC conditions, respectively. Since the highest VOC corresponds to the lowest apparent NA-ND, , which is similar to a Cu-doped-only CdSeTe solar cell (NA-ND ~= 2 x 10^14 cm-3), the data indicate that improved device performance does not result from increased electrically active Sb; instead, it points to structural improvement as the dominant effect of HTA. The findings demonstrate the potential of HTA treatments to improve the structural and electrical properties of CdSeXTe1-X solar cells.

14 SOLAR ENERGY↗

Bias‐Dependent Quantum Efficiency Reveals Recombination Pathways in Thin Film Solar Cells

Identifying where recombination predominantly occurs—whether at the front interface, back interface, or throughout the bulk—is crucial for optimizing CdSeTe solar cells and many other photovoltaic device architectures. Here, a simple and effective diagnostic is demonstrated: measuring external quantum efficiency (QE) under varying forward biases. The drift–diffusion simulations reveal that each recombination pathway leaves a distinct bias-induced signature in the normalized QE: a progressive drop at long wavelengths for back-limited devices, a short-wavelength decline for front-limited devices, and a relatively uniform decrease across all wavelengths for bulk-limited devices. These predictions are validated with experiments on As-doped and Cu-doped CdSeTe devices, with and without passivation layers or different front buffers. In each case, the observed bias-dependent QE spectral changes align with the simulated recombination map. Because this method uses standard QE instrumentation, it offers a broadly accessible and cost-efficient means to diagnose recombination pathways—extending beyond CdSeTe to other thin-film and emerging solar cell technologies. By pinpointing recombination bottlenecks, researchers and manufacturers can strategically refine doping profiles, passivation schemes, and interface designs to further improve device performance.

CdTe↗

The effect of remnant CdSe layers on the performance of CdSeTe/CdTe photovoltaic devices

Thin film CdTe-based photovoltaic devices have achieved high efficiency above 22 %. The recent improvement in efficiency is due to Se alloying in the CdTe absorbers to form a CdSeTe/CdTe structure. The subsequent band gap grading increases the short circuit current density. The Se can be introduced by depositing a precursor thin film of either CdSe or a CdSeTe alloy and then diffusing the Se into the CdTe during the high temperature cadmium chloride activation process. Using CdSe is preferred because it is easier to control the Se concentration. However, during fabrication of the CdSeTe/CdTe devices, the CdSe thickness needs to be precisely controlled to prevent the retention of a CdSe remnant layer after the activation treatment. Retention of a remnant CdSe layer causes a dramatic reduction in device efficiency. In this work, we show that the reduction in efficiency is caused by a number of factors. The remnant CdSe layer is n-type which moves the position of the p-n junction. Also, it is widely thought that the CdSe remnants are photo-inactive. In this work, we clarify that the individual CdSe grains are actually highly photo-active. However, the grain sizes in the CdSe remnant and the adjacent CdSeTe layer are very small resulting in a high grain boundary area. Although the grain boundaries are passivated with chlorine, cathodoluminescence imaging and electrical measurements show that this is only partially effective. Also, EQE measurements show that the remnant CdSe causes parasitic absorption. Overall, the remnant CdSe layer causes a reduction in short circuit current density and device efficiency. The thickness of the CdSe precursor layer and the cadmium chloride activation process conditions must be precisely optimised to ensure that all the CdSe is consumed and inter-diffused to form the CdSeTe alloy for highest efficiency devices.

CdSe remnant↗

Mechanisms for long carrier lifetime in Cd(Se)Te double heterostructures

II–VI semiconductors are used in numerous electro-optical applications. For example, CdTe-based solar technology is cost competitive with other electricity generation sources, yet there is still significant room to improve. Carrier lifetime has historically been well below the radiative recombination limit. Lifetimes reaching beyond 100 ns can significantly enhance performance and enable novel device structures. Here, double heterostructures (DHs) with passivated interfaces demonstrate lifetimes exceeding 1 µs, yet this appears only for CdSeTe and not for CdTe DHs. We compare the passivation mechanisms in CdTe and CdSeTe DHs. CdSeTe lifetimes on the order of 1 µs correspond to a combination of superior intragrain lifetime, extremely low grain boundary recombination and greater Te4+ interfacial presence compared to CdTe.

36 MATERIALS SCIENCE↗