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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 523 records · Page 29
All sourcesNASA NTRSDOE OSTI
DOE OSTI2023

Laser drilling and machining enhancement using gated CW and short pulsed lasers

The present disclosure relates to a laser system for processing a material. The system may make use of a laser configured to intermittently generate a first laser pulse of a first duration and a first average power, at a spot on a surface of the material being processed, and a second laser pulse having a second duration and a second peak power. The second duration may be shorter than the first duration by a factor of at least 100, and directed at the spot. The second laser pulse is generated after the first laser pulse is generated. The first laser pulse is used to heat the spot on the surface of the material, while the second laser pulse induces a melt motion and material ejection of molten material from the melt pool.

Ly, Sonny S.↗
DOE OSTI2022

Universal topological quantum computation with strongly correlated Majorana edge modes

Abstract Majorana-based quantum gates are not complete for performing universal topological quantum computation while Fibonacci-based gates are difficult to be realized electronically and hardly coincide with the conventional quantum circuit models. In reference Hu and Kane (2018 Phys. Rev. Lett. 120 066801), it has been shown that a strongly correlated Majorana edge mode in a chiral topological superconductor can be decomposed into a Fibonacci anyon τ and a thermal operator anyon ɛ in the tricritical Ising model. The deconfinement of τ and ɛ via the interaction between the fermion modes yields the anyon collisions and gives the braiding of either τ or ɛ . With these braidings, the complete members of a set of universal gates, the Pauli gates, the Hadamard gate and extra phase gates for one-qubit as well as controlled-NOT (CNOT) gate for two-qubits, are topologically assembled. Encoding quantum information and reading out the computation results can be carried out through electric signals. With the sparse-dense mixed encodings, we set up the quantum circuit where the CNOT gate turns out to be a probabilistic gate and design the corresponding devices with thin films of the chiral topological superconductor. As an example of the universal topological quantum computing, we show the application to Shor’s integer factorization algorithm.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗
DOE OSTI2021

Extraction of intrinsic contact resistance in organic thin-film transistors with single channel length and high capacitance density

Accurate characterization of the intrinsic contact resistance is important for the optimization of organic thin-film transistors (OTFTs), especially in devices with high gate capacitance density. This study reports on a method for the extraction of the intrinsic, or gate-voltage independent, contact resistance from OTFTs. In contrast to the transfer length method (TLM), this method can be applied to devices with a single geometry. The method is an extension of the previously reported Y-function method and combines the model proposed by S. Luan et al. to analyze the effect of the gate voltage on the contact resistance. Here, this method is first applied to OTFTs with a bottom-gate top-contact geometry having varying gate capacitance density values. The intrinsic contact resistance is found to decrease with increased gate capacitance density with values ranging between 4 kΩcm and under 1 kΩcm when the gate capacitance is changed from 36.6 nF/cm 2 to 231.7 nF/cm 2 , respectively. These values are in good agreement with those obtained using TLM experiments. The new method is also shown to be applicable to OTFTs with top-gate bottom contact geometry.

36 MATERIALS SCIENCE↗
DOE OSTI2023

Electrostatic modulation of the lateral carrier density profile in field effect devices with nonlinear dielectrics

The properties of two-dimensional (2D) electronic systems are often effectively controlled using electrostatic gating. The geometry of such field effect devices influences the effectiveness of the gate and the carrier density profile in the 2D device. Here, in this work, we analyze the gate-induced spatial variations in the lateral carrier density in patterned LaAlO 3 /SrTiO 3 devices. We model the electrostatics of the 2D interface using the Thomas-Fermi approximation and compute the gate-induced charge distribution at the interface. We show that the electric field lines generated by the gate are focused at the edges of the device, causing an increased depletion near its edges. This effect is accentuated in LaAlO 3 /SrTiO 3 due to the large, nonlinear dielectric constant of the substrate, and the large distance between the gate electrode and the interface. We experimentally demonstrate one consequence of this effect by directly imaging current distributions in gated heterostructures, finding that insulating regions nucleate at the edges of the device due to the gate. Our results suggest that device geometry and choice of dielectric materials control the charge distribution in 2D systems.

75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND↗
DOE OSTI2020

Metal oxide semiconductor (MOS) controlled devices and methods of making the same

Metal-Oxide-Semiconductor (MOS) controlled semiconductor devices and methods of making the devices are provided. The devices include a gate which controls current flow through channel regions positioned between source/emitter and drain regions of the device. The devices include a gate oxide layer having a variable thickness. The thickness of the gate oxide layer under the edge of the gate and over the source/emitter regions is different than the thickness over the channel regions of the device. The oxide layer thickness near the edge of the gate can be greater than the oxide layer thickness over the channel regions. The source/emitter regions can be implanted to provide enhanced oxide growth during gate oxide formation. The source/emitter region can include regions that are implanted to provide enhanced oxide growth during gate oxide formation and regions which do not provide enhanced oxide growth during gate oxide formation. The devices can be SiC devices such as SiC MOSFETs and SiC IGBTs.

36 MATERIALS SCIENCE↗
DOE OSTI2022

Metal oxide semiconductor (MOS) controlled devices and methods of making the same

Metal-Oxide-Semiconductor (MOS) controlled semiconductor devices and methods of making the devices are provided. The devices include a gate which controls current flow through channel regions positioned between source/emitter and drain regions of the device.The devices include a gate oxide layer having a variable thickness. The thickness of the gate oxide layer under the edge of the gate and over the source/emitter regions is different than the thickness over the channel regions of the device. The oxide layer thickness near the edge of the gate can be greater than the oxide layer thickness over the channel regions. The source/emitter regions can be implanted to provide enhanced oxide growth during gate oxide formation. The source/emitter region can include regions that are implanted to provide enhanced oxide growth during gate oxide formation and regions which do not provide enhanced oxide growth during gate oxide formation. The devices can be SiC devices such as SiC MOSFETs and SiC IGBTs.

Matocha, Kevin↗