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At least 379 records · Page 21
All sourcesNASA NTRSDOE OSTI
NASA NTRS2003

Low-Power SOI CMOS Transceiver

The work aims at developing a low-power Silicon on Insulator Complementary Metal Oxide Semiconductor (SOI CMOS) Transceiver for deep-space communications. RF Receiver must accomplish the following tasks: (a) Select the desired radio channel and reject other radio signals, (b) Amplify the desired radio signal and translate them back to baseband, and (c) Detect and decode the information with Low BER. In order to minimize cost and achieve high level of integration, receiver architecture should use least number of external filters and passive components. It should also consume least amount of power to minimize battery cost, size, and weight. One of the most stringent requirements for deep-space communication is the low-power operation. Our study identified that two candidate architectures listed in the following meet these requirements: (1) Low-IF receiver, (2) Sub-sampling receiver. The low-IF receiver uses minimum number of external components. Compared to Zero-IF (Direct conversion) architecture, it has less severe offset and flicker noise problems. The Sub-sampling receiver amplifies the RF signal and samples it using track-and-hold Subsampling mixer. These architectures provide low-power solution for the short- range communications missions on Mars. Accomplishments to date include: (1) System-level design and simulation of a Double-Differential PSK receiver, (2) Implementation of Honeywell SOI CMOS process design kit (PDK) in Cadence design tools, (3) Design of test circuits to investigate relationships between layout techniques, geometry, and low-frequency noise in SOI CMOS, (4) Model development and verification of on-chip spiral inductors in SOI CMOS process, (5) Design/implementation of low-power low-noise amplifier (LNA) and mixer for low-IF receiver, and (6) Design/implementation of high-gain LNA for sub-sampling receiver. Our initial results show that substantial improvement in power consumption is achieved using SOI CMOS as compared to standard CMOS process. Potential advantages of SOI CMOS for deep-space communication electronics include: (1) Radiation hardness, (2) Low-power operation, and (3) System-on-Chip (SOC) solutions.

Fujikawa, Gene↗
NASA NTRS2003

High Sensitivity Long-Wavelength Infrared QWIP Focal Plane Array Based Instrument for Remote Sensing of Icy Satellites

GaAs based Quantum Well Infrared Photodetector (QWIP) technology has shown remarkable success in advancing low cost, highly uniform, high-operability, large format multi-color focal plane arrays. QWIPs afford greater flexibility than the usual extrinsically doped semiconductor IR detectors. The wavelength of the peak response and cutoff can be continuously tailored over a range wide enough to enable light detection at any wavelength range between 6 and 20 micron. The spectral band-width of these detectors can be tuned from narrow (Deltalambda/lambda is approximately 10%) to wide (Deltalambda/lambda is approximately 40%) allowing various applications. Furthermore, QWIPs offer low cost per pixel and highly uniform large format focal plane arrays due to mature GaAs/AlGaAs growth and processing technologies. The other advantages of GaAs/AlGaAs based QWIPS are higher yield, lower l/f noise and radiation hardness (1.5 Mrad). In this presentation, we will discuss our recent demonstrations of 640x512 pixel narrow-band, broad-band, multi-band focal plane arrays, and the current status of the development of 1024x1024 pixel long-wavelength infrared QWIP focal plane arrays.

Gunapala, S.↗
NASA NTRS2004

Design and Performance of a Miniature Radar L-Band Transceiver

Radar electronics developed for past JPL space missions historically had been custom designed and as such, given budgetary, time, and risk constraints, had not been optimized for maximum flexibility or miniaturization. To help reduce cost and risk of future radar missions, a generic radar module was conceived. The module includes a 1.25-GHz (L-band) transceiver and incorporates miniature high-density packaging of integrated circuits in die/chip form. The technology challenges include overcoming the effect of miniaturization and high packaging density to achieve the performance, reliability, and environmental ruggedness required for space missions. The module was chosen to have representative (generic) functionality most likely required from an L-band radar. For very large aperture phased-array spaceborne radar missions, the large dimensions of the array suggest the benefit of distributing the radar electronics into the antenna array. For such applications, this technology is essential in order to bring down the cost, mass, and power of the radar electronics module replicated in each panel of the array. For smaller sized arrays, a single module can be combined with the central radar controller and still provide the bene.ts of configuration .exibility, low power, and low mass. We present the design approach for the radar electronics module and the test results for its radio frequency (RF) portion: a miniature, low-power, radiation-hard L-band transceiver.

McWatters, D.↗
NASA NTRS2004

Scientific Data Collection/Analysis: 1994-2004

This custom bibliography from the NASA Scientific and Technical Information Program lists a sampling of records found in the NASA Aeronautics and Space Database. The scope of this topic includes technologies for lightweight, temperature-tolerant, radiation-hard sensors. This area of focus is one of the enabling technologies as defined by NASA s Report of the President s Commission on Implementation of United States Space Exploration Policy, published in June 2004.

Source record↗
NASA NTRS2005

Development of Ultra-High Sensivity Silicon Carbide Detectors

A variety of silicon carbide (SiC) detectors have been developed to study the sensitivity of SiC ultraviolet (UV) detectors, including Schottky photodiodes, p-i-n photodiodes, avalanche photodiodes (APDs), and single photon-counting APDs. Due to the very wide bandgap and thus extremely low leakage current, Sic photo-detectors showed excellent sensitivity. The specific detectivity, D*, of SiC photodiodes are orders of magnitude higher than that of their competitors, such as Si photodiodes, and comparable to the D* of photomultiplier tubes (PMTs). To pursue the ultimate detection sensitivity, SiC APDs and single photon-counting avalanche diodes (SPADs) have also been fabricated. By operating the SiC APDs at a linear mode gain over 10(exp 6), SPADs in UV have been demonstrated. SiC UV detectors have great potential for use in solar blind UV detection and biosensing. Moreover, SiC detectors have excellent radiation hardness and high temperature tolerance which makes them ideal for extreme environment applications such as in space or on the surface of the Moon or Mars.

Yan, Feng↗
NASA NTRS2004

Analysis of Electrical Characteristics of Thin Film Photovoltaic Cells

Solar energy is the most abundant form of energy in many terrestrial and extraterrestrial environments. Often in extraterrestrial environments sunlight is the only readily available form of energy. Thus the ability to efficiently harness solar energy is one of the ultimate goals in the design of space power systems. The essential component that converts solar energy into electrical energy in a solar energy based power system is the photovoltaic cell. Traditionally, photovoltaic cells are based on a single crystal silicon absorber. While silicon is a well understood technology and yields high efficiency, there are inherent disadvantages to using single crystal materials. The requirements of weight, large planar surfaces, and high manufacturing costs make large silicon cells prohibitively expensive for use in certain applications. Because of silicon s disadvantages, there is considerable ongoing research into alternative photovoltaic technologies. In particular, thin film photovoltaic technologies exhibit a promising future in space power systems. While they are less mature than silicon, the better radiation hardness, reduced weight, ease of manufacturing, low material cost, and the ability to use virtually any exposed surface as a substrate makes thin film technologies very attractive for space applications. The research group lead by Dr. Hepp has spent several years researching copper indium disulfide as an absorber material for use in thin film photovoltaic cells. While the group has succeeded in developing a single source precursor for CuInS2 as well as a unique method of aerosol assisted chemical vapor deposition, the resulting cells have not achieved adequate efficiencies. While efficiencies of 11 % have been demonstrated with CuInS2 based cells, the cells produced by this group have shown efficiencies of approximately 1 %. Thus, current research efforts are turning towards the analysis of the individual layers of these cells, as well as the junctions between them, to determine the cause of the poor yields. As a student of electrical engineering with some material science background, my role in this research is to develop techniques for analyzing the electrical characteristics of the CuInS2 cells. My first task was to design a shadow mask to be used to place molybdenum contacts under a layer of CuInS;! in order to analyze the contact resistance between the materials. In addition, I have also analyzed evaporated aluminum top contacts and have tested various methods of increasing their thicknesses in order to decrease series resistance. More recently I have worked with other members of the research group in reviving a vertical cold-wall reactor for experimentation with CuInS2 quantum dots. As part of that project, I have improved the design for a variable frequency and pulse width square wave generator to be used in driving the precursor injection process. My task throughout the remainder of my tenure is to continue to analyze and develop tools for the analysis of electrical properties of the CuInS2 cells with the ultimate goal of discovering ways to improve the efficiency of our photovoltaic cells. Traditionally, photovoltaic cells are based on a single crystal silicon absorber. While The research group lead by Dr. Hepp has spent several years researching copper indium

Kasick, Michael P.↗
NASA NTRS2005

Cu(In,Ga)S2, Thin-Film Solar Cells Prepared by H2S Sulfurization of CuGa-In Precursor

Thin-film CuInS2 solar cell is the leading candidate for space power because of bandgap near the optimum value for AM0 solar radiation outside the earth's atmosphere, excellent radiation hardness, and freedom from intrinsic degradation mechanisms unlike a-Si:H cells. Ultra-lightweight thin-film solar cells deposited on flexible polyimide plastic substrates such as Kapton(trademark), Upilex(trademark), and Apical(trademark) have a potential for achieving specific power of 1000 W/kg, while the state-of-art specific power of the present day solar cells is 66 W/kg. This paper describes the preparation of Cu-rich CuIn(sub 1-x)Ga(sub x)S(sub 2) (CIGS2) thin films and solar cells by a process of sulfurization of CuGa-In precursor similar to that being used for preparation of large-compact-grain CuIn(sub 1-x)Ga(sub x)Se2 thin films and efficient solar cells at FSEC PV Materials Lab.

Dhere, Neelkanth G.↗
NASA NTRS2005

Advances in Single and Multijunction III-V Photovoltaics on Silicon for Space Power

A collaborative research effort at MIT, Ohio State University and NASA has resulted in the demonstration of record quality gallium arsenide (GaAs) based single junction photovoltaic devices on silicon (Si) substrates. The ability to integrate highly efficient, radiation hard III-V based devices on silicon offers the potential for dramatic reductions in cell mass (approx.2x) and increases in cell area. Both of these improvements offer the potential for dramatic reductions in the cost of on-orbit electrical power. Recently, lattice matched InGaP/GaAs and metamorphic InGaP/InGaAs dual junction solar cells were demonstrated by MBE and OMVPE, respectively. Single junction GaAs on Si devices have been integrated into a space flight experiment (MISSES), scheduled to be launched to the International Space Station in March of 2005. I-V performance data from the GaAs/Si will be collected on-orbit and telemetered to ground stations daily. Microcracks in the GaAs epitaxial material, generated because of differences in the thermal expansion coefficient between GaAs and Si, are of concern in the widely varying thermal environment encountered in low Earth orbit. Ground based thermal life cycling (-80 C to + 80 C) equivalent to 1 year in LEO has been conducted on GaAs/Si devices with no discernable degradation in device performance, suggesting that microcracks may not limit the ability to field GaAs/Si in harsh thermal environments. Recent advances in the development and testing of III-V photovoltaic devices on Si will be presented.

Wilt, David M.↗
NASA NTRS2001

Enabling technology for NASA's Europa Orbiter mission

The authors will describe the drivers for the subsystem requirements in the Europa Orbiter mission, in particular the mission criticality of the IMU and the predicted natural space radiation environments that require enabling technologies to be identified. Descriptions of the Europa IMU and the HRG technology are given with emphasis on the inherent radiation hardness in the HRG principle of operation and sensor construction, as well as the steps taken to further harden the sensor electronics.

inertial measurement unit inertial reference unit ↗
NASA NTRS1997

(abstract) 9 (micro)m Cutoff 640x480 Quantum Well Infrared Photodetector (QWIP) Focal Plane Array Camera

Long wavelength infrared (LWIR) detectors, 8 (micro)m to 12 (micro)m, are of great interest for a variety of ground-based and space-borne applications. These applications have placed stringent requirements on the performance of the infrared detectors and arrays including high detectivity, low dark current, uniformity, radiation hardness, and low power dissipation. I will discuss the development and progress of GaAs based long-wavelength quantum well infrared photodetectors (QWIPs) to meet those stringent requirements and the demonstration of a 9 (micro)m cutoff 640x480 QUIP focal plane array camera. The noise equivalent temperature difference of the focal plane array is 25 mK at 300 K background and the operating temperature is 70 K.

long wavelength infrared detectors LWIR detector a↗
NASA NTRS1995

16 Infrared Hot Electron Transistor

Very long wavelength infrared (VWIR) photodetectors, 14 20 , are of a great interest for variety of space-borne applications. These space applications have placed stringent requirements on the performance of the infrared detectors and arrays including high detectivity, low dark current, uniformity, radiation hardness and lower power dissipation. I will discuss the development and progress of AlxGal- xAs/GaAs VWIR quantum well infrared photodetectors (QWIPs) to meet those stringent requirements and the demonstration of a 15 128x128 QWIP focal plane array camera. The noise equivalent temperature difference of the focal plane array is 30 mK at 300 K background, and operating temperature is 45 K.

Electron Transistor↗
NASA NTRS2006

Application of Solar-Electric Propulsion to Robotic and Human Missions in Near-Earth Space

Solar-electric propulsion (SEP) is becoming of interest for application to a wide range of missions. The benefits of SEP are strongly influenced by system element performance, especially that for the power system. Solar array performance is increasing rapidly and promises to continue to do so for another 10 to 20 years (Fig. 1). At the same time, cost per watt is decreasing. Radiation hardness is increasing. New concepts for how to design a SEP are emerging. These improvements lead to changes in the best ways to apply SEP technology to missions, and broadening of the practical uses of SEP technology compared to competing technologies. This paper addresses the evolving characteristics of SEP technology from the point of view of mission design, and how mission profile characteristics can be designed to best take advantage of evolving SEP characteristics. Mission concepts include robotic lunar landers and orbiters; scientific planetary spacecraft; delivery of spacecraft to geosynchronous orbit from inclined and low-inclination launch orbits; and lunar cargo delivery from Earth orbit to lunar orbit. Expendable and re-usable SEP profiles are considered. Flight control considerations are abstracted from recent papers by the author to describe how these influence SEP design and operations.

Woodcock, Gordon↗
NASA NTRS2007

Materials-of-Construction Radiation Sensitivity for a Fission Surface Power Convertor

A fission reactor combined with a free-piston Stirling convertor is one of many credible approaches for producing electrical power in space applications. This study assumes dual-opposed free-piston Stirling engines/linear alternators that will operate nominally at 825 K hot-end and 425 K cold-end temperatures. The baseline design options, temperature profiles, and materials of construction discussed here are based on historical designs as well as modern convertors operating at lower power levels. This notional design indicates convertors primarily made of metallic components that experience minimal change in mechanical properties for fast neutron fluences less than 10(sup 20) neutrons per square centimeter. However, these radiation effects can impact the magnetic and electrical properties of metals at much lower fluences than are crucial for mechanical property integrity. Moreover, a variety of polymeric materials are also used in common free-piston Stirling designs for bonding, seals, lubrication, insulation and others. Polymers can be affected adversely by radiation doses as low as 10(sup 5) - 10(sup 10) rad. Additionally, the absorbing dose rate, radiation hardness, and the resulting effect (either hardening or softening) varies depending on the nature of the particular polymer. The classes of polymers currently used in convertor fabrication are discussed along possible substitution options. Thus, the materials of construction of prototypic Stirling convertor engines have been considered and the component materials susceptible to damage at the lowest neutron fluences have been identified.

Bowman, Cheryl L.↗
NASA NTRS2001

Integrated semiconductor-magnetic random access memory system

The present disclosure describes a non-volatile magnetic random access memory (RAM) system having a semiconductor control circuit and a magnetic array element. The integrated magnetic RAM system uses CMOS control circuit to read and write data magnetoresistively. The system provides a fast access, non-volatile, radiation hard, high density RAM for high speed computing.

Katti, Romney R.↗
NASA NTRS2000

Programmable Logic Application Notes

This column will be provided each quarter as a source for reliability, radiation results, NASA capabilities, and other information on programmable logic devices and related applications. This quarter will continue a series of notes concentrating on analysis techniques with this issue's section discussing: Digital Timing Analysis Tools and Techniques. Articles in this issue include: SX and SX-A Series Devices Power Sequencing; JTAG and SXISX-AISX-S Series Devices; Analysis Techniques (i.e., notes on digital timing analysis tools and techniques); Status of the Radiation Hard reconfigurable Field Programmable Gate Array Program, Input Transition Times; Apollo Guidance Computer Logic Study; RT54SX32S Prototype Data Sets; A54SX32A - 0.22 micron/UMC Test Results; Ramtron FM1608 FRAM; and Analysis of VHDL Code and Synthesizer Output.

Katz, Richard↗
NASA NTRS2008

Fast Electromechanical Switches Based on Carbon Nanotubes

Electrostatically actuated nanoelectromechanical switches based on carbon nanotubes have been fabricated and tested in a continuing effort to develop high-speed switches for a variety of stationary and portable electronic equipment. As explained below, these devices offer advantages over electrostatically actuated microelectromechanical switches, which, heretofore, have represented the state of the art of rapid, highly miniaturized electromechanical switches. Potential applications for these devices include computer memories, cellular telephones, communication networks, scientific instrumentation, and general radiation-hard electronic equipment. A representative device of the present type includes a single-wall carbon nanotube suspended over a trench about 130 nm wide and 20 nm deep in an electrically insulating material. The ends of the carbon nanotube are connected to metal electrodes, denoted the source and drain electrodes. At bottom of the trench is another metal electrode, denoted the pull electrode (see figure). In the off or open switch state, no voltage is applied, and the nanotube remains out of contact with the pull electrode. When a sufficiently large electric potential (switching potential) is applied between the pull electrode and either or both of the source and drain electrodes, the resulting electrostatic attraction bends and stretches the nanotube into contact with the pull electrode, thereby putting the switch into the "on" or "closed" state, in which substantial current (typically as much as hundreds of nanoamperes) is conducted. Devices of this type for use in initial experiments were fabricated on a thermally oxidized Si wafer, onto which Nb was sputter-deposited for use as the pull-electrode layer. Nb was chosen because its refractory nature would enable it to withstand the chemical and thermal conditions to be subsequently imposed for growing carbon nanotubes. A 200- nm-thick layer of SiO2 was formed on top of the Nb layer by plasma-enhanced chemical vapor deposition. In the device regions, the SiO2 layer was patterned to thin it to the 20-nm trench depth. The trenches were then patterned by electron- beam lithography and formed by reactive- ion etching of the pattern through the 20-nm-thick SiO2 to the Nb layer.

Kaul, Anupama↗
NASA NTRS2008

Nano-Multiplication-Region Avalanche Photodiodes and Arrays

Nano-multiplication-region avalanche photodiodes (NAPDs), and imaging arrays of NAPDs integrated with complementary metal oxide/semiconductor (CMOS) active-pixel-sensor integrated circuitry, are being developed for applications in which there are requirements for high-sensitivity (including photoncounting) detection and imaging at wavelengths from about 250 to 950 nm. With respect to sensitivity and to such other characteristics as speed, geometric array format, radiation hardness, power demand of associated circuitry, size, weight, and robustness, NAPDs and arrays thereof are expected to be superior to prior photodetectors and arrays including CMOS active-pixel sensors (APSs), charge-coupled devices (CCDs), traditional APDs, and microchannelplate/ CCD combinations. Figure 1 depicts a conceptual NAPD array, integrated with APS circuitry, fabricated on a thick silicon-on-insulator wafer (SOI). Figure 2 presents selected aspects of the structure of a typical single pixel, which would include a metal oxide/semiconductor field-effect transistor (MOSFET) integrated with the NAPD. The NAPDs would reside in silicon islands formed on the buried oxide (BOX) layer of the SOI wafer. The silicon islands would be surrounded by oxide-filled insulation trenches, which, together with the BOX layer, would constitute an oxide embedding structure. There would be two kinds of silicon islands: NAPD islands for the NAPDs and MOSFET islands for in-pixel and global CMOS circuits. Typically, the silicon islands would be made between 5 and 10 m thick, but, if necessary, the thickness could be chosen outside this range. The side walls of the silicon islands would be heavily doped with electron-acceptor impurities (p+-doped) to form anodes for the photodiodes and guard layers for the MOSFETs. A nanoscale reach-through structure at the front (top in the figures) central position of each NAPD island would contain the APD multiplication region. Typically, the reach-through structure would be about 0.1 microns in diameter and between 0.3 and 0.4 nm high. The top layer in the reach-through structure would be heavily doped with electron-donor impurities (n+-doped) to make it act as a cathode. A layer beneath the cathode, between 0.1 and 0.2 nm thick, would be p-doped to a concentration .10(exp 17)cu cm. A thin n+-doped polysilicon pad would be formed on the top of the cathode to protect the cathode against erosion during a metal-silicon alloying step that would be part of the process of fabricating the array.

Zheng, Xinyu↗